Edit: /usr/bin/lspci (94288B)
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Internal bug: Accessing non-read configuration byte at position %x Flags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)
Status: D%d NoSoftRst%c PME-Enable%c DSel=%d DScale=%d PME%c
HyperTransport: Slave or Primary Interface !!! Possibly incomplete decoding Command: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c Link Control 0: CFlE%c CST%c CFE%c
UESta: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
UEMsk: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
UESvrt: DLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c MalfTLP%c ECRC%c UnsupReq%c ACSViol%c
CESta: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c AdvNonFatalErr%c
CEMsk: RxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c AdvNonFatalErr%c
AERCap: First Error Pointer: %02x, ECRCGenCap%c ECRCGenEn%c ECRCChkCap%c ECRCChkEn%c
MultHdrRecCap%c MultHdrRecEn%c TLPPfxPres%c HdrLogCap%c
HeaderLog: %08x %08x %08x %08x
RootCmd: CERptEn%c NFERptEn%c FERptEn%c
RootSta: CERcvd%c MultCERcvd%c UERcvd%c MultUERcvd%c
FirstFatal%c NonFatalMsg%c FatalMsg%c IntMsg %d
DpcCap: INT Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c
DpcCtl: Trigger:%x Cmpl%c INT%c ErrCor%c PoisonedTLP%c SwTrigger%c DL_ActiveErr%c
DpcSta: Trigger%c Reason:%02x INT%c RPBusy%c TriggerExt:%02x RP PIO ErrPtr:%02x
Caps: LPEVC=%d RefClk=%s PATEntryBits=%d
Port Arbitration Table [%x]
Caps: PATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c
Ctrl: Enable%c ID=%d ArbSelect=%s TC/VC=%02x
Status: NegoPending%c InProgress%c
Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x
Desc: PortNumber=%02x ComponentID=%02x EltType=%s
Addr: %02x:%02x.%d CfgSpace=%08x%08x
Root Complex Internal Link Root Complex Event Collector Multi-Function Virtual Channel Root Complex Register Block ACSCap: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c
ACSCtl: SrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c DirectTrans%c
Alternative Routing-ID Interpretation (ARI) ARICap: MFVC%c ACS%c, Next Function: %d
ARICtl: MFVC%c ACS%c, Function Group: %d
Address Translation Service (ATS) ATSCap: Invalidate Queue Depth: %02x
ATSCtl: Enable%c, Smallest Translation Unit: %02x
Single Root I/O Virtualization (SR-IOV) IOVCap: Migration%c, Interrupt Message Number: %03x
IOVCtl: Enable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c
Function Dependency Link: %02x
%08x (%s-bit, %sprefetchable)
VF Migration: offset: %08x, BIR: %x
Multi-Root I/O Virtualization McastCtl: NumGroups %d, Enable%c
McastBAR: IndexPos %d, BaseAddr %016lx
McastReceiveVec: %016lx
McastBlockAllVec: %016lx
McastBlockUntransVec: %016lx
McastOverlayBAR: OverlaySize %d PRISta: RF%c UPRGI%c Stopped%c
Page Request Capacity: %08x, Page Request Allocation: %08x
Interrupt vector mode supported Device specific mode supported Steering table in TPH capability structure Steering table in MSI-X table Reserved steering table location Max no snoop latency: %lldns
LnkCtl3: LnkEquIntrruptEn%c PerformEqu%c
Process Address Space ID (PASID) PASIDCap: Exec%c Priv%c, Max PASID Width: %02x
PASIDCtl: Enable%c Exec%c Priv%c
PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c L1_PM_Substates%c
PortCommonModeRestoreTime=%dus L1SubCtl1: PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c
Requester:%c Responder:%c Root:%c
Vendor=%04x ID=%04x Rev=%d Len=%d CXLCap: Cache%c IO%c Mem%c Mem HW Init%c HDMCount %d Viral%c
CXLCtl: Cache%c IO%c Mem%c Cache SF Cov %d Cache SF Gran %d Cache Clean%c Viral%c
Lane Margining at the Receiver Native PCIe Enclosure Management Desc: TargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c
800-1200mV(full-swing)/400-700mV(half-swing) 200-400mV(full-swing)/100-200mV(half-swing) Link Up - Present and DRS Received Status: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s
Command: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s
Slot ID: %d slots, First%c, chassis %02x
MSI: Enable%c Count=%d/%d Maskable%c 64bit%c
Masking: %08x Pending: %08x
Command: DPERE%c ERO%c RBC=%d OST=%d
Status: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c DC=%s DMMRBC=%u DMOST=%u DMCRS=%u RSCEM%c 266MHz%c 533MHz%c
Secondary Status: 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c Freq=%s
Status: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c
Upstream: Capacity=%u CommitmentLimit=%u
Downstream: Capacity=%u CommitmentLimit=%u
HyperTransport: Interrupt Discovery and Configuration HyperTransport: Revision ID: %u.%02u
HyperTransport: UnitID Clumping HyperTransport: Extended Configuration Space Access HyperTransport: Address Mapping HyperTransport: MSI Mapping Enable%c Fixed%c
Mapping Address Base: %016llx
HyperTransport: X86 (reserved) BAR=%d offset=%08x size=%08x Debug port: BAR=%d offset=%04x
CompactPCI central resource control PCI-Express to PCI/PCI-X Bridge PCI/PCI-X to PCI-Express Bridge (Slot%c) Root Complex Integrated Endpoint DevCap: MaxPayload %d bytes, PhantFunc %d DevCtl: CorrErr%c NonFatalErr%c FatalErr%c UnsupReq%c
RlxdOrd%c ExtTag%c PhantFunc%c AuxPwr%c NoSnoop%c
MaxPayload %d bytes, MaxReadReq %d bytes
DevSta: CorrErr%c NonFatalErr%c FatalErr%c UnsupReq%c AuxPwr%c TransPend%c
LnkCap: Port #%d, Speed %s, Width x%d, ASPM %s ClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c
Disabled%c CommClk%c
ExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c
LnkSta: Speed %s (%s), Width x%d (%s)
TrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c
SltCap: AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c
Slot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c
SltCtl: Enable: AttnBtn%c PwrFlt%c MRL%c PresDet%c CmdCplt%c HPIrq%c LinkChg%c
Control: AttnInd %s, PwrInd %s, Power%c Interlock%c
SltSta: Status: AttnBtn%c PowerFlt%c MRL%c CmdCplt%c PresDet%c Interlock%c
Changed: MRL%c PresDet%c LinkState%c
RootCtl: ErrCorrectable%c ErrNon-Fatal%c ErrFatal%c PMEIntEna%c CRSVisible%c
RootSta: PME ReqID %04x, PMEStatus%c PMEPending%c
DevCap2: Completion Timeout: %s, TimeoutDis%c NROPrPrP%c LTR%c
10BitTagComp%c 10BitTagReq%c OBFF %s, ExtFmt%c EETLPPrefix%c
EmergencyPowerReduction %s, EmergencyPowerReductionInit%c DevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c OBFF %s, LnkCap2: Supported Link Speeds: %s, Crosslink%c Retimer%c 2Retimers%c DRS%c
LnkCtl2: Target Link Speed: %s, EnterCompliance%c SpeedDis%c
Transmit Margin: %s, EnterModifiedCompliance%c ComplianceSOS%c
Compliance De-emphasis: %s
LnkSta2: Current De-emphasis Level: %s, EqualizationComplete%c EqualizationPhase1%c
EqualizationPhase2%c EqualizationPhase3%c LinkEqualizationRequest%c
Retimer%c 2Retimers%c CrosslinkRes: %s , DRS%c
DownstreamComp: %s
MSI-X: Enable%c Count=%d Masked%c
Vector table: BAR=%d offset=%08x
Enhanced Allocation (EA): NumEntries=%u , secondary=%d, subordinate=%d Entry %u: Enable%c Writable%c EntrySize=%u
BAR Equivalent Indicator: lspci: libkmod lookup failed: error %d
lspci: Unable to initialize libkmod context
lspci: Unable to load libkmod resources: error %d
%s/devices/%04x:%02x:%02x.%d/driver show_driver: sysfs device name too long, why? !!! Invalid class %04x for header type %02x
!!! Unknown header type %02x
Control: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c
Status: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c SERR%c TAbort%c Reset%c FastB2B%c
PriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c
Memory window %d: %08x-%08x%s%s
BridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c
16-bit legacy interface ports at %04x
Discovered device %02x:%02x.%d
Unknown hardware configuration type %s No such PCI access method: %s (see `-A help' for a list) Invalid PCI access parameter syntax: %s Unrecognized PCI access parameter: %s (see `-O help' for a list) Bus mapping mode does not recognize bus topology WARNING: Bus mapping can be reliable only with direct hardware access enabled.
Tree: bridge %04x:%02x:%02x.%d: %02x -> %02x-%02x
I/O space VF memory space, prefetchable entry unavailable for use /%02x:%02x.%d /%02x.%d %04x: %dMB %dGB %dTB %dPB %dEB %s: %016lx-%016lx %08x-%08x [size=%u%s] [disabled] " \\ \x%02x %s: %s (rev %02x) (prog-if %02x [%s] DeviceName: %s Subsystem: %s
non- 32-bit 64-bit low-1M type 3 Region %d: I/O ports at %04lx [virtual] %08lx (%s, %sprefetchable) [enhanced] Expansion ROM at [disabled by cmd] Power Management version %d
Bridge: PM%c B3%c
DUL%c Revision ID: %u.%02u
Link Frequency 0: %s
Link Frequency 1: %s
Bus Number: %02x
Link Frequency: %s
Read-only Read/write bad good large small Vital Product Data End Product Name: %s fields:
[ ] %s: %d byte(s) free
Not readable No end tag found x%d BAR %d: current size: , supported: 32 64 Capabilities: [%03x v%d Null Advanced Error Reporting ErrorSrc: ERR_COR: %04x ERR_FATAL/NONFATAL: %04x
Downstream Port Containment Source: %04x
Virtual Channel ??%d %c%s%c
Ctrl: ArbSelect=%s
Status: InProgress%c
VC%d: Arb: Port Arbitration Table Power Budgeting Root Complex Link Link%d: Addr: %08x%08x
Vendor Specific Information: ID=%04x Rev=%d Len=%03x
Access Control Services IOVSta: Migration%c
Initial VFs: %d, Total VFs: %d, Number of VFs: %d, VF offset: %d, stride: %d, Device ID: %04x
Supported Page Size: %08x, System Page Size: %08x
Region %d: Memory at Multicast McastCap: MaxGroups %d , WindowSz %d (%d bytes) , ECRCRegen%c
(disabled) , BaseAddr %016lx
Page Request Interface (PRI) PRICtl: Enable%c Reset%c
Physical %s Resizable BAR
Dynamic Power Allocation Transaction Processing Hints Extended requester support No steering table available Latency Tolerance Reporting Max snoop latency: %lldns
Secondary PCI Express LaneErrStat: LaneErr at lane: Protocol Multiplexing LN Requester L1 PM Substates L1SubCap: PortTPowerOnTime= T_CommonMode=%dus LTR1.2_Threshold= LTR1.2_Threshold=%lldns L1SubCtl2: T_PwrOn= Precision Time Measurement PTMCap: PTMClockGranularity: Unimplemented Greater than 254ns %huns
PTMControl: Enabled:%c RootSelected:%c
PTMEffectiveGranularity: Unknown PCI Express over M_PHY FRS Queueing Readiness Time Reporting Designated Vendor-Specific: : CXL CXLSta: Viral%c
Virtual Data Link Feature Physical Layer 16.0 GT/s Hierarchy ID Extended Capability ID %#02x
T_PwrOn=%dus PortTPowerOnTime=%dus
MemMapped Config simple CommonCfg Notify ISR DeviceCfg not supported L0s 2.5GT/s unknown downgraded ok strange Not Supported Range A Range B Range AB Range BC Range ABC Range BCD Range ABCD Via message Via WAKE# Via message/WAKE# Form Factor Dev Specific Reserved 64byte cachelines 128byte cachelines TPHComp+ ExtTPHComp- TPHComp+ ExtTPHComp+ TPHComp- ExtTPHComp- Disabled Via message A Via message B 50us to 50ms 50us to 100us 1ms to 10ms 16ms to 55ms 65ms to 210ms 260ms to 900ms 1s to 3.5s 4s to 13s 17s to 64s RsvdP 2.5-32GT/s 2.5-16GT/s 2.5-8GT/s 2.5-5GT/s -6dB -3.5dB Normal Operating Range unsupported Upstream Port Downstream Port incomplete Link Down - Not Determined Link Down - Not Present Link Down - Present Link Up - Present L0s L1 Capabilities: [%02x] AGP version %x.%x
CompactPCI hot-swap PCI-X non-bridge device PCI-X bridge device HyperTransport: Switch HyperTransport: DirectRoute HyperTransport: VCSet HyperTransport: Retry Mode HyperTransport: #%02x
VirtIO: %s
multiplier=%08x Len=%02x
Hot-plug capable AGP3 Secure device Express (v%d) Legacy Endpoint Root Port (Slot%c) Downstream Port (Slot%c) Root Complex Event Collector , MSI %02x
Unknown type %d , Latency L0s %s, L1 %s ExtTag%c AttnBtn%c AttnInd%c PwrInd%c RBE%c FLReset%c SlotPowerLimit %.3fW BrConfRtry%c , Exit Latency L0s %s %sL1 %s LnkCtl: ASPM %s; RCB %d bytes, RootCap: CRSVisible%c
, MaxEETLPPrefixes %d
FRS%c LN System CLS %s, ARIFwd%c
Routing%c 32bit%c 64bit%c 128bitCAS%c AtomicOpsCtl: ReqEn%c EgressBlck%c , Selectable De-emphasis: %s PBA: BAR=%d offset=%08x
SATA HBA v%d.%d BAR%d Offset=%08x
InCfgSpace BAR??%d
PCI Advanced Features AFCap: TP%c FLR%c
AFCtrl: FLR%c
AFStatus: TP%c
resource behind function not indicated expansion ROM VF-BAR %u reserved PrimaryProperties: [%02x]
SecondaryProperties: Base: MaxOffset: Capability ID %#02x [%04x]
Address: %08x Data: %04x
AtomicOpsCap: %02x.%x -[%02x]- -[%02x-%02x]- %s -- +- \- +-[%04x:%02x]- \-[%04x:%02x]- %04x:%02x: sysfs.path Slot: Device: Class: %s
SVendor: %s
SDevice: %s
PhySlot: %s
Rev: %02x
ProgIf: %02x
Driver: %s
Module: %s
NUMANode: %d
DTNode: %s
IOMMUGroup: %s
-r%02x -p%02x "" "" Kernel modules: Kernel driver in use: %s
%s %s slow medium fast ?? (prefetchable) Physical Slot: %s
Device tree node: %s
Latency: %d ( %dns min %dns max , Cache Line Size: %d bytes NUMA node: %d
IOMMU group: %s
Flags: bus master, VGA palette snoop, stepping, fast Back2Back, 66MHz, user-definable features, %s devsel , latency %d , IRQ %d , NUMA node %d , IOMMU group %s BIST is running BIST result: %02x
I/O behind bridge Memory behind bridge I/O window %d: %08x-%08x%s
Secondary status: SERR Mapping bus %02x
But it was filtered out. --version lspci version 3.7.0 -s: %s -d: %s dump.name help Known PCI access methods:
Known PCI access parameters:
%-20s %s (%s)
Summary of buses:
%02x: Entered via %02x:%02x.%d
Primary host bus Secondary host bus (?) %02x.%d Bridge to %02x-%02x L0s Enabled L0s L1 Enabled <1us <2us <4us <8us <16us <32us <64us unlimited <64ns <128ns <256ns <512ns On Blink Off conv 66MHz 100MHz 133MHz ?4 ?5 ?6 ?7 200MHz 300MHz 400MHz 500MHz 600MHz 800MHz 1.0GHz 1.2GHz 1.4GHz 1.6GHz [a] [b] [c] [d] [e] Vend 8bit 16bit [2] 32bit 4bit [6] N/C Extended capability Engineering changes Manufacture ID Part number Read-write area Serial number Asset tag Vendor specific System specific CCIN Feature code FRU Network address Firmware version Product specific 0@343RRPPPP3hP PH >== =<<<<6 E6 L6 6
6 6 .6 h( S6 V6 \6 `6 e6 k6 r6 y6 |6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 7 CP 7 EC 7 MN .7 PN =7 RV }* RW I7 SN Y7 YA g7 V q7 Y 7 CC 7 FC 7 FN 7 NA 7 RM 7 Z 7 h(
h h o h
m o o o o o L k 0 @ P ` p ! ! ! 0! @! P! `! p! ! ! ! ! ! ! ! ! " " " 0" @" P" `" p" " " " " " " " " # # # 0# @# P# `# p# # # # # # # # p nvbxs:d:tPi:mgp:qkMDQA:GO:H:F: Usage: lspci []
Basic display modes:
-mm Produce machine-readable output (single -m for an obsolete format)
-t Show bus tree
Display options:
-v Be verbose (-vv or -vvv for higher verbosity)
-k Show kernel drivers handling each device
-x Show hex-dump of the standard part of the config space
-xxx Show hex-dump of the whole config space (dangerous; root only)
-xxxx Show hex-dump of the 4096-byte extended config space (root only)
-b Bus-centric view (addresses and IRQ's as seen by the bus)
-D Always show domain numbers
-P Display bridge path in addition to bus and device number
-PP Display bus path in addition to bus and device number
Resolving of device ID's to names:
-n Show numeric ID's
-nn Show both textual and numeric ID's (names & numbers)
-q Query the PCI ID database for unknown ID's via DNS
-qq As above, but re-query locally cached entries
-Q Query the PCI ID database for all ID's via DNS
Selection of devices:
-s [[[[]:]]:][][.[]] Show only devices in selected slots
-d []:[][:] Show only devices with specified ID's
Other options:
-i Use specified ID database instead of %s
-p Look up kernel modules in a given file instead of default modules.pcimap
-M Enable `bus mapping' mode (dangerous; root only)
PCI access options:
-A Use the specified PCI access method (see `-A help' for a list)
-O = Set PCI access parameter (see `-O help' for a list)
-G Enable PCI access debugging
-H Use direct hardware access ( = 1 or 2)
-F Read PCI configuration dump from a given file
/usr/lib/debug/.dwz/x86_64-linux-gnu/pciutils.debug MiT[B")SU2!fa86cb793905a5a0b47cdee195865836c9a39a.debug .shstrtab .interp .note.gnu.property .note.gnu.build-id .note.ABI-tag .gnu.hash .dynsym .dynstr .gnu.version .gnu.version_r .rela.dyn .rela.plt .init .plt.got .plt.sec .text .fini .rodata .eh_frame_hdr .eh_frame .init_array .fini_array .data.rel.ro .dynamic .data .bss .gnu_debugaltlink .gnu_debuglink 8 8 0 & h h $ 9 G o $ Q Y h
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