FM / include

/usr/lib/gcc/x86_64-linux-gnu/9/include/

/usr/lib/gcc/x86_64-linux-gnu/9/include

Name	Size	Mode	Actions
sanitizer/	-	0755	rm
adxintrin.h	2831	0644	edit dl rm
ammintrin.h	3216	0644	edit dl rm
avx2intrin.h	58632	0644	edit dl rm
avx512bitalgintrin.h	8850	0644	edit dl rm
avx512bwintrin.h	101510	0644	edit dl rm
avx512cdintrin.h	5822	0644	edit dl rm
avx512dqintrin.h	85374	0644	edit dl rm
avx512erintrin.h	12965	0644	edit dl rm
avx512fintrin.h	512201	0644	edit dl rm
avx512ifmaintrin.h	3430	0644	edit dl rm
avx512ifmavlintrin.h	5385	0644	edit dl rm
avx512pfintrin.h	10288	0644	edit dl rm
avx512vbmi2intrin.h	19810	0644	edit dl rm
avx512vbmi2vlintrin.h	37120	0644	edit dl rm
avx512vbmiintrin.h	4921	0644	edit dl rm
avx512vbmivlintrin.h	8364	0644	edit dl rm
avx512vlbwintrin.h	143849	0644	edit dl rm
avx512vldqintrin.h	61317	0644	edit dl rm
avx512vlintrin.h	425487	0644	edit dl rm
avx512vnniintrin.h	4969	0644	edit dl rm
avx512vnnivlintrin.h	8244	0644	edit dl rm
avx512vpopcntdqintrin.h	3110	0644	edit dl rm
avx512vpopcntdqvlintrin.h	4667	0644	edit dl rm
avx5124fmapsintrin.h	6535	0644	edit dl rm
avx5124vnniwintrin.h	4256	0644	edit dl rm
avxintrin.h	50613	0644	edit dl rm
backtrace-supported.h	2982	0644	edit dl rm
backtrace.h	9080	0644	edit dl rm
bmi2intrin.h	3388	0644	edit dl rm
bmiintrin.h	5628	0644	edit dl rm
bmmintrin.h	1154	0644	edit dl rm
cet.h	2665	0644	edit dl rm
cetintrin.h	3333	0644	edit dl rm
cldemoteintrin.h	1614	0644	edit dl rm
clflushoptintrin.h	1663	0644	edit dl rm
clwbintrin.h	1585	0644	edit dl rm
clzerointrin.h	1491	0644	edit dl rm
cpuid.h	9069	0644	edit dl rm
cross-stdarg.h	2558	0644	edit dl rm
emmintrin.h	51412	0644	edit dl rm
f16cintrin.h	3410	0644	edit dl rm
float.h	16979	0644	edit dl rm
fma4intrin.h	9132	0644	edit dl rm
fmaintrin.h	10116	0644	edit dl rm
fxsrintrin.h	2056	0644	edit dl rm
gcov.h	1394	0644	edit dl rm
gfniintrin.h	15050	0644	edit dl rm
ia32intrin.h	7873	0644	edit dl rm
immintrin.h	6463	0644	edit dl rm
iso646.h	1272	0644	edit dl rm
ISO_Fortran_binding.h	8471	0644	edit dl rm
limits.h	6089	0644	edit dl rm
lwpintrin.h	3400	0644	edit dl rm
lzcntintrin.h	2398	0644	edit dl rm
mm3dnow.h	7076	0644	edit dl rm
mmintrin.h	31354	0644	edit dl rm
mm_malloc.h	1783	0644	edit dl rm
movdirintrin.h	2347	0644	edit dl rm
mwaitxintrin.h	1747	0644	edit dl rm
nmmintrin.h	1288	0644	edit dl rm
omp.h	7435	0644	edit dl rm
openacc.h	5570	0644	edit dl rm
pconfigintrin.h	2348	0644	edit dl rm
pkuintrin.h	1741	0644	edit dl rm
pmmintrin.h	4368	0644	edit dl rm
popcntintrin.h	1750	0644	edit dl rm
prfchwintrin.h	1447	0644	edit dl rm
quadmath.h	9358	0644	edit dl rm
quadmath_weak.h	3208	0644	edit dl rm
rdseedintrin.h	2017	0644	edit dl rm
rtmintrin.h	2733	0644	edit dl rm
sgxintrin.h	7091	0644	edit dl rm
shaintrin.h	3204	0644	edit dl rm
smmintrin.h	28405	0644	edit dl rm
stdalign.h	1210	0644	edit dl rm
stdarg.h	4072	0644	edit dl rm
stdatomic.h	9321	0644	edit dl rm
stdbool.h	1524	0644	edit dl rm
stddef.h	12959	0644	edit dl rm
stdfix.h	6000	0644	edit dl rm
stdint-gcc.h	9457	0644	edit dl rm
stdint.h	328	0644	edit dl rm
stdnoreturn.h	1136	0644	edit dl rm
syslimits.h	330	0644	edit dl rm
tbmintrin.h	5242	0644	edit dl rm
tmmintrin.h	8343	0644	edit dl rm
unwind.h	10905	0644	edit dl rm
vaesintrin.h	3473	0644	edit dl rm
varargs.h	139	0644	edit dl rm
vpclmulqdqintrin.h	2727	0644	edit dl rm
waitpkgintrin.h	1999	0644	edit dl rm
wbnoinvdintrin.h	1620	0644	edit dl rm
wmmintrin.h	4656	0644	edit dl rm
x86intrin.h	1429	0644	edit dl rm
xmmintrin.h	42387	0644	edit dl rm
xopintrin.h	28568	0644	edit dl rm
xsavecintrin.h	1821	0644	edit dl rm
xsaveintrin.h	2472	0644	edit dl rm
xsaveoptintrin.h	1851	0644	edit dl rm
xsavesintrin.h	2157	0644	edit dl rm
xtestintrin.h	1687	0644	edit dl rm

Edit: /usr/lib/gcc/x86_64-linux-gnu/9/include/gfniintrin.h (15050B)

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

GCC is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

Under Section 7 of GPL version 3, you are granted additional
   permissions described in the GCC Runtime Library Exception, version
   3.1, as published by the Free Software Foundation.

You should have received a copy of the GNU General Public License and
   a copy of the GCC Runtime Library Exception along with this program;
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
   <http://www.gnu.org/licenses/>.  */

#ifndef _IMMINTRIN_H_INCLUDED
#error "Never use <gfniintrin.h> directly; include <immintrin.h> instead."
#endif

#ifndef _GFNIINTRIN_H_INCLUDED
#define _GFNIINTRIN_H_INCLUDED

#if !defined(__GFNI__) || !defined(__SSE2__)
#pragma GCC push_options
#pragma GCC target("gfni,sse2")
#define __DISABLE_GFNI__
#endif /* __GFNI__ */

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_gf2p8mul_epi8 (__m128i __A, __m128i __B)
{
  return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A,
						   (__v16qi) __B);
}

#ifdef __OPTIMIZE__
extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_gf2p8affineinv_epi64_epi8 (__m128i __A, __m128i __B, const int __C)
{
  return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
							   (__v16qi) __B,
							    __C);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_gf2p8affine_epi64_epi8 (__m128i __A, __m128i __B, const int __C)
{
  return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi) __A,
							(__v16qi) __B, __C);
}
#else
#define _mm_gf2p8affineinv_epi64_epi8(A, B, C)				   \
  ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \
					   (__v16qi)(__m128i)(B), (int)(C)))
#define _mm_gf2p8affine_epi64_epi8(A, B, C)				   \
  ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi)(__m128i)(A),   \
					   (__v16qi)(__m128i)(B), (int)(C)))
#endif

#ifdef __DISABLE_GFNI__
#undef __DISABLE_GFNI__
#pragma GCC pop_options
#endif /* __DISABLE_GFNI__ */

#if !defined(__GFNI__) || !defined(__AVX__)
#pragma GCC push_options
#pragma GCC target("gfni,avx")
#define __DISABLE_GFNIAVX__
#endif /* __GFNIAVX__ */

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_gf2p8mul_epi8 (__m256i __A, __m256i __B)
{
  return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi ((__v32qi) __A,
						    (__v32qi) __B);
}

#ifdef __OPTIMIZE__
extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_gf2p8affineinv_epi64_epi8 (__m256i __A, __m256i __B, const int __C)
{
  return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi ((__v32qi) __A,
							   (__v32qi) __B,
							    __C);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_gf2p8affine_epi64_epi8 (__m256i __A, __m256i __B, const int __C)
{
  return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi) __A,
							(__v32qi) __B, __C);
}
#else
#define _mm256_gf2p8affineinv_epi64_epi8(A, B, C)			   \
  ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \
						    (__v32qi)(__m256i)(B), \
						    (int)(C)))
#define _mm256_gf2p8affine_epi64_epi8(A, B, C)				   \
  ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi)(__m256i)(A),   \
					(   __v32qi)(__m256i)(B), (int)(C)))
#endif

#ifdef __DISABLE_GFNIAVX__
#undef __DISABLE_GFNIAVX__
#pragma GCC pop_options
#endif /* __GFNIAVX__ */

#if !defined(__GFNI__) || !defined(__AVX512VL__)
#pragma GCC push_options
#pragma GCC target("gfni,avx512vl")
#define __DISABLE_GFNIAVX512VL__
#endif /* __GFNIAVX512VL__ */

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_gf2p8mul_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D)
{
  return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __C,
							 (__v16qi) __D,
							 (__v16qi)__A, __B);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_gf2p8mul_epi8 (__mmask16 __A, __m128i __B, __m128i __C)
{
  return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __B,
			(__v16qi) __C, (__v16qi) _mm_setzero_si128 (), __A);
}

#ifdef __OPTIMIZE__
extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_gf2p8affineinv_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C,
				    __m128i __D, const int __E)
{
  return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __C,
								(__v16qi) __D,
								 __E,
								(__v16qi)__A,
								 __B);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_gf2p8affineinv_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C,
				     const int __D)
{
  return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __B,
						(__v16qi) __C, __D,
						(__v16qi) _mm_setzero_si128 (),
						 __A);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_mask_gf2p8affine_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C,
				 __m128i __D, const int __E)
{
  return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __C,
					(__v16qi) __D, __E, (__v16qi)__A, __B);
}

extern __inline __m128i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_maskz_gf2p8affine_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C,
				  const int __D)
{
  return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __B,
		     (__v16qi) __C, __D, (__v16qi) _mm_setzero_si128 (), __A);
}
#else
#define _mm_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) 		   \
  ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask(		   \
			(__v16qi)(__m128i)(C), (__v16qi)(__m128i)(D),      \
			(int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B)))
#define _mm_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \
  ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask(		   \
			(__v16qi)(__m128i)(B), (__v16qi)(__m128i)(C),	   \
			(int)(D), (__v16qi)(__m128i) _mm_setzero_si128 (), \
			(__mmask16)(A)))
#define _mm_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \
  ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(C),\
      (__v16qi)(__m128i)(D), (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B)))
#define _mm_maskz_gf2p8affine_epi64_epi8(A, B, C, D)			    \
  ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(B),\
		(__v16qi)(__m128i)(C), (int)(D),			    \
		(__v16qi)(__m128i) _mm_setzero_si128 (), (__mmask16)(A)))
#endif

#ifdef __DISABLE_GFNIAVX512VL__
#undef __DISABLE_GFNIAVX512VL__
#pragma GCC pop_options
#endif /* __GFNIAVX512VL__ */

#if !defined(__GFNI__) || !defined(__AVX512VL__) || !defined(__AVX512BW__)
#pragma GCC push_options
#pragma GCC target("gfni,avx512vl,avx512bw")
#define __DISABLE_GFNIAVX512VLBW__
#endif /* __GFNIAVX512VLBW__ */

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_gf2p8mul_epi8 (__m256i __A, __mmask32 __B, __m256i __C,
			   __m256i __D)
{
  return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __C,
							 (__v32qi) __D,
							 (__v32qi)__A, __B);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_gf2p8mul_epi8 (__mmask32 __A, __m256i __B, __m256i __C)
{
  return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __B,
			(__v32qi) __C, (__v32qi) _mm256_setzero_si256 (), __A);
}

#ifdef __OPTIMIZE__
extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_gf2p8affineinv_epi64_epi8 (__m256i __A, __mmask32 __B,
				       __m256i __C, __m256i __D, const int __E)
{
  return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __C,
								(__v32qi) __D,
							 	 __E,
								(__v32qi)__A,
								 __B);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_gf2p8affineinv_epi64_epi8 (__mmask32 __A, __m256i __B,
					__m256i __C, const int __D)
{
  return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __B,
				      (__v32qi) __C, __D,
				      (__v32qi) _mm256_setzero_si256 (), __A);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_mask_gf2p8affine_epi64_epi8 (__m256i __A, __mmask32 __B, __m256i __C,
				    __m256i __D, const int __E)
{
  return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __C,
							     (__v32qi) __D,
							      __E,
							     (__v32qi)__A,
							      __B);
}

extern __inline __m256i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm256_maskz_gf2p8affine_epi64_epi8 (__mmask32 __A, __m256i __B,
				     __m256i __C, const int __D)
{
  return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __B,
		(__v32qi) __C, __D, (__v32qi)_mm256_setzero_si256 (), __A);
}
#else
#define _mm256_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E)		\
  ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask(		\
	(__v32qi)(__m256i)(C), (__v32qi)(__m256i)(D), (int)(E),		\
	(__v32qi)(__m256i)(A), (__mmask32)(B)))
#define _mm256_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D)		\
  ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask(		\
	(__v32qi)(__m256i)(B), (__v32qi)(__m256i)(C), (int)(D),		\
	(__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A)))
#define _mm256_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) 		    \
  ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(C),\
	(__v32qi)(__m256i)(D), (int)(E), (__v32qi)(__m256i)(A), (__mmask32)(B)))
#define _mm256_maskz_gf2p8affine_epi64_epi8(A, B, C, D)			    \
  ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(B),\
	 (__v32qi)(__m256i)(C), (int)(D),				    \
	 (__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A)))
#endif

#ifdef __DISABLE_GFNIAVX512VLBW__
#undef __DISABLE_GFNIAVX512VLBW__
#pragma GCC pop_options
#endif /* __GFNIAVX512VLBW__ */

#if !defined(__GFNI__) || !defined(__AVX512F__) || !defined(__AVX512BW__)
#pragma GCC push_options
#pragma GCC target("gfni,avx512f,avx512bw")
#define __DISABLE_GFNIAVX512FBW__
#endif /* __GFNIAVX512FBW__ */

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_gf2p8mul_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
			   __m512i __D)
{
  return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __C,
					(__v64qi) __D, (__v64qi)__A, __B);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_gf2p8mul_epi8 (__mmask64 __A, __m512i __B, __m512i __C)
{
  return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __B,
			(__v64qi) __C, (__v64qi) _mm512_setzero_si512 (), __A);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_gf2p8mul_epi8 (__m512i __A, __m512i __B)
{
  return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi ((__v64qi) __A,
						    (__v64qi) __B);
}

#ifdef __OPTIMIZE__
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_gf2p8affineinv_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
				       __m512i __D, const int __E)
{
  return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __C,
								(__v64qi) __D,
								 __E,
								(__v64qi)__A,
								 __B);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_gf2p8affineinv_epi64_epi8 (__mmask64 __A, __m512i __B,
					__m512i __C, const int __D)
{
  return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __B,
				(__v64qi) __C, __D,
				(__v64qi) _mm512_setzero_si512 (), __A);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_gf2p8affineinv_epi64_epi8 (__m512i __A, __m512i __B, const int __C)
{
  return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ((__v64qi) __A,
							   (__v64qi) __B, __C);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_gf2p8affine_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C,
				    __m512i __D, const int __E)
{
  return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __C,
					(__v64qi) __D, __E, (__v64qi)__A, __B);
}

extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_gf2p8affine_epi64_epi8 (__mmask64 __A, __m512i __B, __m512i __C,
				     const int __D)
{
  return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __B,
		  (__v64qi) __C, __D, (__v64qi) _mm512_setzero_si512 (), __A);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_gf2p8affine_epi64_epi8 (__m512i __A, __m512i __B, const int __C)
{
  return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi) __A,
							(__v64qi) __B, __C);
}
#else
#define _mm512_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) 		\
  ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask(		\
	(__v64qi)(__m512i)(C), (__v64qi)(__m512i)(D), (int)(E),		\
	(__v64qi)(__m512i)(A), (__mmask64)(B)))
#define _mm512_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D)		\
  ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask(		\
	(__v64qi)(__m512i)(B), (__v64qi)(__m512i)(C), (int)(D),		\
	(__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A)))
#define _mm512_gf2p8affineinv_epi64_epi8(A, B, C)			\
  ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi (			\
	(__v64qi)(__m512i)(A), (__v64qi)(__m512i)(B), (int)(C)))
#define _mm512_mask_gf2p8affine_epi64_epi8(A, B, C, D, E)		    \
  ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(C),\
     (__v64qi)(__m512i)(D), (int)(E), (__v64qi)(__m512i)(A), (__mmask64)(B)))
#define _mm512_maskz_gf2p8affine_epi64_epi8(A, B, C, D)			    \
  ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(B),\
	 (__v64qi)(__m512i)(C), (int)(D),				    \
	 (__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A)))
#define _mm512_gf2p8affine_epi64_epi8(A, B, C)				    \
  ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi)(__m512i)(A),    \
	 (__v64qi)(__m512i)(B), (int)(C)))
#endif

#ifdef __DISABLE_GFNIAVX512FBW__
#undef __DISABLE_GFNIAVX512FBW__
#pragma GCC pop_options
#endif /* __GFNIAVX512FBW__ */

#endif /* _GFNIINTRIN_H_INCLUDED */

/* Copyright (C) 2017-2019 Free Software Foundation, Inc. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. Under Section 7 of GPL version 3, you are granted additional permissions described in the GCC Runtime Library Exception, version 3.1, as published by the Free Software Foundation. You should have received a copy of the GNU General Public License and a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ #ifndef _IMMINTRIN_H_INCLUDED #error "Never use directly; include instead." #endif #ifndef _GFNIINTRIN_H_INCLUDED #define _GFNIINTRIN_H_INCLUDED #if !defined(__GFNI__) || !defined(__SSE2__) #pragma GCC push_options #pragma GCC target("gfni,sse2") #define __DISABLE_GFNI__ #endif /* __GFNI__ */ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_gf2p8mul_epi8 (__m128i __A, __m128i __B) { return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A, (__v16qi) __B); } #ifdef __OPTIMIZE__ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_gf2p8affineinv_epi64_epi8 (__m128i __A, __m128i __B, const int __C) { return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A, (__v16qi) __B, __C); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_gf2p8affine_epi64_epi8 (__m128i __A, __m128i __B, const int __C) { return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi) __A, (__v16qi) __B, __C); } #else #define _mm_gf2p8affineinv_epi64_epi8(A, B, C) \ ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A), \ (__v16qi)(__m128i)(B), (int)(C))) #define _mm_gf2p8affine_epi64_epi8(A, B, C) \ ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi ((__v16qi)(__m128i)(A), \ (__v16qi)(__m128i)(B), (int)(C))) #endif #ifdef __DISABLE_GFNI__ #undef __DISABLE_GFNI__ #pragma GCC pop_options #endif /* __DISABLE_GFNI__ */ #if !defined(__GFNI__) || !defined(__AVX__) #pragma GCC push_options #pragma GCC target("gfni,avx") #define __DISABLE_GFNIAVX__ #endif /* __GFNIAVX__ */ extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_gf2p8mul_epi8 (__m256i __A, __m256i __B) { return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi ((__v32qi) __A, (__v32qi) __B); } #ifdef __OPTIMIZE__ extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_gf2p8affineinv_epi64_epi8 (__m256i __A, __m256i __B, const int __C) { return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi ((__v32qi) __A, (__v32qi) __B, __C); } extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_gf2p8affine_epi64_epi8 (__m256i __A, __m256i __B, const int __C) { return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi) __A, (__v32qi) __B, __C); } #else #define _mm256_gf2p8affineinv_epi64_epi8(A, B, C) \ ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A), \ (__v32qi)(__m256i)(B), \ (int)(C))) #define _mm256_gf2p8affine_epi64_epi8(A, B, C) \ ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi ((__v32qi)(__m256i)(A), \ ( __v32qi)(__m256i)(B), (int)(C))) #endif #ifdef __DISABLE_GFNIAVX__ #undef __DISABLE_GFNIAVX__ #pragma GCC pop_options #endif /* __GFNIAVX__ */ #if !defined(__GFNI__) || !defined(__AVX512VL__) #pragma GCC push_options #pragma GCC target("gfni,avx512vl") #define __DISABLE_GFNIAVX512VL__ #endif /* __GFNIAVX512VL__ */ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_gf2p8mul_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D) { return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __C, (__v16qi) __D, (__v16qi)__A, __B); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_maskz_gf2p8mul_epi8 (__mmask16 __A, __m128i __B, __m128i __C) { return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi_mask ((__v16qi) __B, (__v16qi) __C, (__v16qi) _mm_setzero_si128 (), __A); } #ifdef __OPTIMIZE__ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_gf2p8affineinv_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D, const int __E) { return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __C, (__v16qi) __D, __E, (__v16qi)__A, __B); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_maskz_gf2p8affineinv_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C, const int __D) { return (__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask ((__v16qi) __B, (__v16qi) __C, __D, (__v16qi) _mm_setzero_si128 (), __A); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_mask_gf2p8affine_epi64_epi8 (__m128i __A, __mmask16 __B, __m128i __C, __m128i __D, const int __E) { return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __C, (__v16qi) __D, __E, (__v16qi)__A, __B); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_maskz_gf2p8affine_epi64_epi8 (__mmask16 __A, __m128i __B, __m128i __C, const int __D) { return (__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask ((__v16qi) __B, (__v16qi) __C, __D, (__v16qi) _mm_setzero_si128 (), __A); } #else #define _mm_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \ ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask( \ (__v16qi)(__m128i)(C), (__v16qi)(__m128i)(D), \ (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B))) #define _mm_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \ ((__m128i) __builtin_ia32_vgf2p8affineinvqb_v16qi_mask( \ (__v16qi)(__m128i)(B), (__v16qi)(__m128i)(C), \ (int)(D), (__v16qi)(__m128i) _mm_setzero_si128 (), \ (__mmask16)(A))) #define _mm_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \ ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(C),\ (__v16qi)(__m128i)(D), (int)(E), (__v16qi)(__m128i)(A), (__mmask16)(B))) #define _mm_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \ ((__m128i) __builtin_ia32_vgf2p8affineqb_v16qi_mask((__v16qi)(__m128i)(B),\ (__v16qi)(__m128i)(C), (int)(D), \ (__v16qi)(__m128i) _mm_setzero_si128 (), (__mmask16)(A))) #endif #ifdef __DISABLE_GFNIAVX512VL__ #undef __DISABLE_GFNIAVX512VL__ #pragma GCC pop_options #endif /* __GFNIAVX512VL__ */ #if !defined(__GFNI__) || !defined(__AVX512VL__) || !defined(__AVX512BW__) #pragma GCC push_options #pragma GCC target("gfni,avx512vl,avx512bw") #define __DISABLE_GFNIAVX512VLBW__ #endif /* __GFNIAVX512VLBW__ */ extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_gf2p8mul_epi8 (__m256i __A, __mmask32 __B, __m256i __C, __m256i __D) { return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __C, (__v32qi) __D, (__v32qi)__A, __B); } extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_maskz_gf2p8mul_epi8 (__mmask32 __A, __m256i __B, __m256i __C) { return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi_mask ((__v32qi) __B, (__v32qi) __C, (__v32qi) _mm256_setzero_si256 (), __A); } #ifdef __OPTIMIZE__ extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_gf2p8affineinv_epi64_epi8 (__m256i __A, __mmask32 __B, __m256i __C, __m256i __D, const int __E) { return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __C, (__v32qi) __D, __E, (__v32qi)__A, __B); } extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_maskz_gf2p8affineinv_epi64_epi8 (__mmask32 __A, __m256i __B, __m256i __C, const int __D) { return (__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask ((__v32qi) __B, (__v32qi) __C, __D, (__v32qi) _mm256_setzero_si256 (), __A); } extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_mask_gf2p8affine_epi64_epi8 (__m256i __A, __mmask32 __B, __m256i __C, __m256i __D, const int __E) { return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __C, (__v32qi) __D, __E, (__v32qi)__A, __B); } extern __inline __m256i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm256_maskz_gf2p8affine_epi64_epi8 (__mmask32 __A, __m256i __B, __m256i __C, const int __D) { return (__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask ((__v32qi) __B, (__v32qi) __C, __D, (__v32qi)_mm256_setzero_si256 (), __A); } #else #define _mm256_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \ ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask( \ (__v32qi)(__m256i)(C), (__v32qi)(__m256i)(D), (int)(E), \ (__v32qi)(__m256i)(A), (__mmask32)(B))) #define _mm256_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \ ((__m256i) __builtin_ia32_vgf2p8affineinvqb_v32qi_mask( \ (__v32qi)(__m256i)(B), (__v32qi)(__m256i)(C), (int)(D), \ (__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A))) #define _mm256_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \ ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(C),\ (__v32qi)(__m256i)(D), (int)(E), (__v32qi)(__m256i)(A), (__mmask32)(B))) #define _mm256_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \ ((__m256i) __builtin_ia32_vgf2p8affineqb_v32qi_mask((__v32qi)(__m256i)(B),\ (__v32qi)(__m256i)(C), (int)(D), \ (__v32qi)(__m256i) _mm256_setzero_si256 (), (__mmask32)(A))) #endif #ifdef __DISABLE_GFNIAVX512VLBW__ #undef __DISABLE_GFNIAVX512VLBW__ #pragma GCC pop_options #endif /* __GFNIAVX512VLBW__ */ #if !defined(__GFNI__) || !defined(__AVX512F__) || !defined(__AVX512BW__) #pragma GCC push_options #pragma GCC target("gfni,avx512f,avx512bw") #define __DISABLE_GFNIAVX512FBW__ #endif /* __GFNIAVX512FBW__ */ extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_gf2p8mul_epi8 (__m512i __A, __mmask64 __B, __m512i __C, __m512i __D) { return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __C, (__v64qi) __D, (__v64qi)__A, __B); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_maskz_gf2p8mul_epi8 (__mmask64 __A, __m512i __B, __m512i __C) { return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi_mask ((__v64qi) __B, (__v64qi) __C, (__v64qi) _mm512_setzero_si512 (), __A); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_gf2p8mul_epi8 (__m512i __A, __m512i __B) { return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi ((__v64qi) __A, (__v64qi) __B); } #ifdef __OPTIMIZE__ extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_gf2p8affineinv_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C, __m512i __D, const int __E) { return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __C, (__v64qi) __D, __E, (__v64qi)__A, __B); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_maskz_gf2p8affineinv_epi64_epi8 (__mmask64 __A, __m512i __B, __m512i __C, const int __D) { return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask ((__v64qi) __B, (__v64qi) __C, __D, (__v64qi) _mm512_setzero_si512 (), __A); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_gf2p8affineinv_epi64_epi8 (__m512i __A, __m512i __B, const int __C) { return (__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ((__v64qi) __A, (__v64qi) __B, __C); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_mask_gf2p8affine_epi64_epi8 (__m512i __A, __mmask64 __B, __m512i __C, __m512i __D, const int __E) { return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __C, (__v64qi) __D, __E, (__v64qi)__A, __B); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_maskz_gf2p8affine_epi64_epi8 (__mmask64 __A, __m512i __B, __m512i __C, const int __D) { return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask ((__v64qi) __B, (__v64qi) __C, __D, (__v64qi) _mm512_setzero_si512 (), __A); } extern __inline __m512i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm512_gf2p8affine_epi64_epi8 (__m512i __A, __m512i __B, const int __C) { return (__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi) __A, (__v64qi) __B, __C); } #else #define _mm512_mask_gf2p8affineinv_epi64_epi8(A, B, C, D, E) \ ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask( \ (__v64qi)(__m512i)(C), (__v64qi)(__m512i)(D), (int)(E), \ (__v64qi)(__m512i)(A), (__mmask64)(B))) #define _mm512_maskz_gf2p8affineinv_epi64_epi8(A, B, C, D) \ ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi_mask( \ (__v64qi)(__m512i)(B), (__v64qi)(__m512i)(C), (int)(D), \ (__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A))) #define _mm512_gf2p8affineinv_epi64_epi8(A, B, C) \ ((__m512i) __builtin_ia32_vgf2p8affineinvqb_v64qi ( \ (__v64qi)(__m512i)(A), (__v64qi)(__m512i)(B), (int)(C))) #define _mm512_mask_gf2p8affine_epi64_epi8(A, B, C, D, E) \ ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(C),\ (__v64qi)(__m512i)(D), (int)(E), (__v64qi)(__m512i)(A), (__mmask64)(B))) #define _mm512_maskz_gf2p8affine_epi64_epi8(A, B, C, D) \ ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi_mask((__v64qi)(__m512i)(B),\ (__v64qi)(__m512i)(C), (int)(D), \ (__v64qi)(__m512i) _mm512_setzero_si512 (), (__mmask64)(A))) #define _mm512_gf2p8affine_epi64_epi8(A, B, C) \ ((__m512i) __builtin_ia32_vgf2p8affineqb_v64qi ((__v64qi)(__m512i)(A), \ (__v64qi)(__m512i)(B), (int)(C))) #endif #ifdef __DISABLE_GFNIAVX512FBW__ #undef __DISABLE_GFNIAVX512FBW__ #pragma GCC pop_options #endif /* __GFNIAVX512FBW__ */ #endif /* _GFNIINTRIN_H_INCLUDED */