/usr/src/linux-headers-5.15.0-181/arch/alpha/include/asm
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a.out.h5740644editdlrm
agp.h4900644editdlrm
agp_backend.h9480644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h5050644editdlrm
atomic.h87490644editdlrm
barrier.h5070644editdlrm
bitops.h90390644editdlrm
bug.h5710644editdlrm
cache.h5070644editdlrm
cacheflush.h20390644editdlrm
checksum.h20120644editdlrm
cmpxchg.h19280644editdlrm
compiler.h1580644editdlrm
console.h10840644editdlrm
core_apecs.h173380644editdlrm
core_cia.h158170644editdlrm
core_irongate.h67930644editdlrm
core_lca.h116500644editdlrm
core_marvel.h93820644editdlrm
core_mcpcia.h117470644editdlrm
core_polaris.h29870644editdlrm
core_t2.h195950644editdlrm
core_titan.h114710644editdlrm
core_tsunami.h84850644editdlrm
core_wildfire.h86550644editdlrm
delay.h2640644editdlrm
device.h1290644editdlrm
div64.h310644editdlrm
dma-mapping.h3420644editdlrm
dma.h126640644editdlrm
elf.h57650644editdlrm
emergency-restart.h1490644editdlrm
err_common.h33160644editdlrm
err_ev6.h1160644editdlrm
err_ev7.h44720644editdlrm
extable.h14590644editdlrm
floppy.h31710644editdlrm
fpu.h18200644editdlrm
ftrace.h120644editdlrm
futex.h20170644editdlrm
gct.h10420644editdlrm
hardirq.h2230644editdlrm
hwrpb.h70660644editdlrm
hw_irq.h3020644editdlrm
io.h148730644editdlrm
io_trivial.h32060644editdlrm
irq.h23630644editdlrm
irqflags.h11940644editdlrm
irq_regs.h340644editdlrm
jensen.h86030644editdlrm
Kbuild1410644editdlrm
kdebug.h320644editdlrm
linkage.h2560644editdlrm
local.h26540644editdlrm
machvec.h36210644editdlrm
mc146818rtc.h6800644editdlrm
mce.h41350644editdlrm
mmu.h2030644editdlrm
mmu_context.h72410644editdlrm
module.h3290644editdlrm
page.h23970644editdlrm
pal.h51270644editdlrm
param.h2840644editdlrm
parport.h5360644editdlrm
pci.h27330644editdlrm
percpu.h5270644editdlrm
perf_event.h1050644editdlrm
pgalloc.h7610644editdlrm
pgtable.h125770644editdlrm
processor.h16770644editdlrm
ptrace.h7540644editdlrm
rwonce.h8120644editdlrm
serial.h10340644editdlrm
setup.h14650644editdlrm
sfp-machine.h29290644editdlrm
shmparam.h1910644editdlrm
signal.h6270644editdlrm
smp.h13770644editdlrm
socket.h3100644editdlrm
sparsemem.h4100644editdlrm
special_insns.h9250644editdlrm
spinlock.h29150644editdlrm
spinlock_types.h4130644editdlrm
string.h24810644editdlrm
switch_to.h4060644editdlrm
syscall.h3790644editdlrm
termios.h30540644editdlrm
thread_info.h37490644editdlrm
timex.h8270644editdlrm
tlb.h2570644editdlrm
tlbflush.h34240644editdlrm
topology.h2710644editdlrm
types.h1430644editdlrm
uaccess.h97670644editdlrm
ucontext.h3480644editdlrm
unistd.h5610644editdlrm
user.h21920644editdlrm
vga.h20500644editdlrm
vmalloc.h930644editdlrm
word-at-a-time.h13760644editdlrm
wrperfmon.h26230644editdlrm
xchg.h52870644editdlrm
xor.h218330644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/alpha/include/asm/bitops.h (9039B)
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ALPHA_BITOPS_H #define _ALPHA_BITOPS_H #ifndef _LINUX_BITOPS_H #error only can be included directly #endif #include #include /* * Copyright 1994, Linus Torvalds. */ /* * These have to be done with inline assembly: that way the bit-setting * is guaranteed to be atomic. All bit operations return 0 if the bit * was cleared before the operation and != 0 if it was not. * * To get proper branch prediction for the main line, we must branch * forward to code at the end of this object's .text section, then * branch back to restart the operation. * * bit 0 is the LSB of addr; bit 64 is the LSB of (addr+1). */ static inline void set_bit(unsigned long nr, volatile void * addr) { unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( "1: ldl_l %0,%3\n" " bis %0,%2,%0\n" " stl_c %0,%1\n" " beq %0,2f\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m) :"Ir" (1UL << (nr & 31)), "m" (*m)); } /* * WARNING: non atomic version. */ static inline void __set_bit(unsigned long nr, volatile void * addr) { int *m = ((int *) addr) + (nr >> 5); *m |= 1 << (nr & 31); } static inline void clear_bit(unsigned long nr, volatile void * addr) { unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( "1: ldl_l %0,%3\n" " bic %0,%2,%0\n" " stl_c %0,%1\n" " beq %0,2f\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m) :"Ir" (1UL << (nr & 31)), "m" (*m)); } static inline void clear_bit_unlock(unsigned long nr, volatile void * addr) { smp_mb(); clear_bit(nr, addr); } /* * WARNING: non atomic version. */ static __inline__ void __clear_bit(unsigned long nr, volatile void * addr) { int *m = ((int *) addr) + (nr >> 5); *m &= ~(1 << (nr & 31)); } static inline void __clear_bit_unlock(unsigned long nr, volatile void * addr) { smp_mb(); __clear_bit(nr, addr); } static inline void change_bit(unsigned long nr, volatile void * addr) { unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( "1: ldl_l %0,%3\n" " xor %0,%2,%0\n" " stl_c %0,%1\n" " beq %0,2f\n" ".subsection 2\n" "2: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m) :"Ir" (1UL << (nr & 31)), "m" (*m)); } /* * WARNING: non atomic version. */ static __inline__ void __change_bit(unsigned long nr, volatile void * addr) { int *m = ((int *) addr) + (nr >> 5); *m ^= 1 << (nr & 31); } static inline int test_and_set_bit(unsigned long nr, volatile void *addr) { unsigned long oldbit; unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( #ifdef CONFIG_SMP " mb\n" #endif "1: ldl_l %0,%4\n" " and %0,%3,%2\n" " bne %2,2f\n" " xor %0,%3,%0\n" " stl_c %0,%1\n" " beq %0,3f\n" "2:\n" #ifdef CONFIG_SMP " mb\n" #endif ".subsection 2\n" "3: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m), "=&r" (oldbit) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); return oldbit != 0; } static inline int test_and_set_bit_lock(unsigned long nr, volatile void *addr) { unsigned long oldbit; unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( "1: ldl_l %0,%4\n" " and %0,%3,%2\n" " bne %2,2f\n" " xor %0,%3,%0\n" " stl_c %0,%1\n" " beq %0,3f\n" "2:\n" #ifdef CONFIG_SMP " mb\n" #endif ".subsection 2\n" "3: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m), "=&r" (oldbit) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); return oldbit != 0; } /* * WARNING: non atomic version. */ static inline int __test_and_set_bit(unsigned long nr, volatile void * addr) { unsigned long mask = 1 << (nr & 0x1f); int *m = ((int *) addr) + (nr >> 5); int old = *m; *m = old | mask; return (old & mask) != 0; } static inline int test_and_clear_bit(unsigned long nr, volatile void * addr) { unsigned long oldbit; unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( #ifdef CONFIG_SMP " mb\n" #endif "1: ldl_l %0,%4\n" " and %0,%3,%2\n" " beq %2,2f\n" " xor %0,%3,%0\n" " stl_c %0,%1\n" " beq %0,3f\n" "2:\n" #ifdef CONFIG_SMP " mb\n" #endif ".subsection 2\n" "3: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m), "=&r" (oldbit) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); return oldbit != 0; } /* * WARNING: non atomic version. */ static inline int __test_and_clear_bit(unsigned long nr, volatile void * addr) { unsigned long mask = 1 << (nr & 0x1f); int *m = ((int *) addr) + (nr >> 5); int old = *m; *m = old & ~mask; return (old & mask) != 0; } static inline int test_and_change_bit(unsigned long nr, volatile void * addr) { unsigned long oldbit; unsigned long temp; int *m = ((int *) addr) + (nr >> 5); __asm__ __volatile__( #ifdef CONFIG_SMP " mb\n" #endif "1: ldl_l %0,%4\n" " and %0,%3,%2\n" " xor %0,%3,%0\n" " stl_c %0,%1\n" " beq %0,3f\n" #ifdef CONFIG_SMP " mb\n" #endif ".subsection 2\n" "3: br 1b\n" ".previous" :"=&r" (temp), "=m" (*m), "=&r" (oldbit) :"Ir" (1UL << (nr & 31)), "m" (*m) : "memory"); return oldbit != 0; } /* * WARNING: non atomic version. */ static __inline__ int __test_and_change_bit(unsigned long nr, volatile void * addr) { unsigned long mask = 1 << (nr & 0x1f); int *m = ((int *) addr) + (nr >> 5); int old = *m; *m = old ^ mask; return (old & mask) != 0; } static inline int test_bit(int nr, const volatile void * addr) { return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL; } /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. * * Do a binary search on the bits. Due to the nature of large * constants on the alpha, it is worthwhile to split the search. */ static inline unsigned long ffz_b(unsigned long x) { unsigned long sum, x1, x2, x4; x = ~x & -~x; /* set first 0 bit, clear others */ x1 = x & 0xAA; x2 = x & 0xCC; x4 = x & 0xF0; sum = x2 ? 2 : 0; sum += (x4 != 0) * 4; sum += (x1 != 0); return sum; } static inline unsigned long ffz(unsigned long word) { #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) /* Whee. EV67 can calculate it directly. */ return __kernel_cttz(~word); #else unsigned long bits, qofs, bofs; bits = __kernel_cmpbge(word, ~0UL); qofs = ffz_b(bits); bits = __kernel_extbl(word, qofs); bofs = ffz_b(bits); return qofs*8 + bofs; #endif } /* * __ffs = Find First set bit in word. Undefined if no set bit exists. */ static inline unsigned long __ffs(unsigned long word) { #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) /* Whee. EV67 can calculate it directly. */ return __kernel_cttz(word); #else unsigned long bits, qofs, bofs; bits = __kernel_cmpbge(0, word); qofs = ffz_b(bits); bits = __kernel_extbl(word, qofs); bofs = ffz_b(~bits); return qofs*8 + bofs; #endif } #ifdef __KERNEL__ /* * ffs: find first bit set. This is defined the same way as * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above __ffs. */ static inline int ffs(int word) { int result = __ffs(word) + 1; return word ? result : 0; } /* * fls: find last bit set. */ #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) static inline int fls64(unsigned long word) { return 64 - __kernel_ctlz(word); } #else extern const unsigned char __flsm1_tab[256]; static inline int fls64(unsigned long x) { unsigned long t, a, r; t = __kernel_cmpbge (x, 0x0101010101010101UL); a = __flsm1_tab[t]; t = __kernel_extbl (x, a); r = a*8 + __flsm1_tab[t] + (x != 0); return r; } #endif static inline unsigned long __fls(unsigned long x) { return fls64(x) - 1; } static inline int fls(unsigned int x) { return fls64(x); } /* * hweightN: returns the hamming weight (i.e. the number * of bits set) of a N-bit word */ #if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) /* Whee. EV67 can calculate it directly. */ static inline unsigned long __arch_hweight64(unsigned long w) { return __kernel_ctpop(w); } static inline unsigned int __arch_hweight32(unsigned int w) { return __arch_hweight64(w); } static inline unsigned int __arch_hweight16(unsigned int w) { return __arch_hweight64(w & 0xffff); } static inline unsigned int __arch_hweight8(unsigned int w) { return __arch_hweight64(w & 0xff); } #else #include #endif #include #endif /* __KERNEL__ */ #include #ifdef __KERNEL__ /* * Every architecture must define this function. It's the fastest * way of searching a 100-bit bitmap. It's guaranteed that at least * one of the 100 bits is cleared. */ static inline unsigned long sched_find_first_bit(const unsigned long b[2]) { unsigned long b0, b1, ofs, tmp; b0 = b[0]; b1 = b[1]; ofs = (b0 ? 0 : 64); tmp = (b0 ? b0 : b1); return __ffs(tmp) + ofs; } #include #include #endif /* __KERNEL__ */ #endif /* _ALPHA_BITOPS_H */