FM / asm

/usr/src/linux-headers-5.15.0-181/arch/arc/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/arc/include/asm

Name	Size	Mode	Actions
arcregs.h	9477	0644	edit dl rm
asm-offsets.h	165	0644	edit dl rm
asserts.h	958	0644	edit dl rm
atomic-llsc.h	2864	0644	edit dl rm
atomic-spinlock.h	2569	0644	edit dl rm
atomic.h	1153	0644	edit dl rm
atomic64-arcv2.h	6095	0644	edit dl rm
barrier.h	1376	0644	edit dl rm
bitops.h	3885	0644	edit dl rm
bug.h	819	0644	edit dl rm
cache.h	3604	0644	edit dl rm
cacheflush.h	3824	0644	edit dl rm
checksum.h	2371	0644	edit dl rm
cmpxchg.h	3188	0644	edit dl rm
current.h	549	0644	edit dl rm
delay.h	1896	0644	edit dl rm
disasm.h	3813	0644	edit dl rm
dma.h	313	0644	edit dl rm
dsp-impl.h	3860	0644	edit dl rm
dsp.h	796	0644	edit dl rm
dwarf.h	746	0644	edit dl rm
elf.h	1935	0644	edit dl rm
entry-arcv2.h	7419	0644	edit dl rm
entry-compact.h	8810	0644	edit dl rm
entry.h	6687	0644	edit dl rm
exec.h	264	0644	edit dl rm
fb.h	411	0644	edit dl rm
fpu.h	1125	0644	edit dl rm
futex.h	3611	0644	edit dl rm
highmem.h	1422	0644	edit dl rm
hugepage.h	2071	0644	edit dl rm
io.h	6291	0644	edit dl rm
irq.h	679	0644	edit dl rm
irqflags-arcv2.h	3491	0644	edit dl rm
irqflags-compact.h	4293	0644	edit dl rm
irqflags.h	363	0644	edit dl rm
jump_label.h	1976	0644	edit dl rm
Kbuild	153	0644	edit dl rm
kdebug.h	254	0644	edit dl rm
kgdb.h	1239	0644	edit dl rm
kprobes.h	1186	0644	edit dl rm
linkage.h	1484	0644	edit dl rm
mach_desc.h	1943	0644	edit dl rm
mmu-arcv2.h	2494	0644	edit dl rm
mmu.h	387	0644	edit dl rm
mmu_context.h	5568	0644	edit dl rm
module.h	428	0644	edit dl rm
page.h	3313	0644	edit dl rm
pci.h	360	0644	edit dl rm
perf_event.h	6879	0644	edit dl rm
pgalloc.h	2888	0644	edit dl rm
pgtable-bits-arcv2.h	4896	0644	edit dl rm
pgtable-levels.h	5626	0644	edit dl rm
pgtable.h	780	0644	edit dl rm
processor.h	3253	0644	edit dl rm
ptrace.h	3759	0644	edit dl rm
sections.h	261	0644	edit dl rm
segment.h	476	0644	edit dl rm
serial.h	498	0644	edit dl rm
setup.h	1274	0644	edit dl rm
shmparam.h	296	0644	edit dl rm
smp.h	3823	0644	edit dl rm
spinlock.h	8580	0644	edit dl rm
spinlock_types.h	905	0644	edit dl rm
stacktrace.h	1178	0644	edit dl rm
string.h	1036	0644	edit dl rm
switch_to.h	553	0644	edit dl rm
syscall.h	1738	0644	edit dl rm
syscalls.h	547	0644	edit dl rm
thread_info.h	3339	0644	edit dl rm
timex.h	362	0644	edit dl rm
tlb.h	262	0644	edit dl rm
tlbflush.h	1654	0644	edit dl rm
uaccess.h	17019	0644	edit dl rm
unaligned.h	625	0644	edit dl rm
unwind.h	3446	0644	edit dl rm
vermagic.h	157	0644	edit dl rm
vmalloc.h	87	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/arc/include/asm/irqflags-compact.h (4293B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 */

#ifndef __ASM_IRQFLAGS_ARCOMPACT_H
#define __ASM_IRQFLAGS_ARCOMPACT_H

/* vineetg: March 2010 : local_irq_save( ) optimisation
 *  -Remove explicit mov of current status32 into reg, that is not needed
 *  -Use BIC  insn instead of INVERTED + AND
 *  -Conditionally disable interrupts (if they are not enabled, don't disable)
*/

#include <asm/arcregs.h>

/* status32 Reg bits related to Interrupt Handling */
#define STATUS_E1_BIT		1	/* Int 1 enable */
#define STATUS_E2_BIT		2	/* Int 2 enable */
#define STATUS_A1_BIT		3	/* Int 1 active */
#define STATUS_A2_BIT		4	/* Int 2 active */
#define STATUS_AE_BIT		5	/* Exception active */

#define STATUS_E1_MASK		(1<<STATUS_E1_BIT)
#define STATUS_E2_MASK		(1<<STATUS_E2_BIT)
#define STATUS_A1_MASK		(1<<STATUS_A1_BIT)
#define STATUS_A2_MASK		(1<<STATUS_A2_BIT)
#define STATUS_AE_MASK		(1<<STATUS_AE_BIT)
#define STATUS_IE_MASK		(STATUS_E1_MASK | STATUS_E2_MASK)

/* Other Interrupt Handling related Aux regs */
#define AUX_IRQ_LEV		0x200	/* IRQ Priority: L1 or L2 */
#define AUX_IRQ_HINT		0x201	/* For generating Soft Interrupts */
#define AUX_IRQ_LV12		0x43	/* interrupt level register */

#define AUX_IENABLE		0x40c
#define AUX_ITRIGGER		0x40d
#define AUX_IPULSE		0x415

#define ISA_INIT_STATUS_BITS	STATUS_IE_MASK

#ifndef __ASSEMBLY__

/******************************************************************
 * IRQ Control Macros
 *
 * All of them have "memory" clobber (compiler barrier) which is needed to
 * ensure that LD/ST requiring irq safetly (R-M-W when LLSC is not available)
 * are redone after IRQs are re-enabled (and gcc doesn't reuse stale register)
 *
 * Noted at the time of Abilis Timer List corruption
 *	Orig Bug + Rejected solution	: https://lkml.org/lkml/2013/3/29/67
 *	Reasoning			: https://lkml.org/lkml/2013/4/8/15
 *
 ******************************************************************/

/*
 * Save IRQ state and disable IRQs
 */
static inline long arch_local_irq_save(void)
{
	unsigned long temp, flags;

__asm__ __volatile__(
	"	lr  %1, [status32]	\n"
	"	bic %0, %1, %2		\n"
	"	and.f 0, %1, %2	\n"
	"	flag.nz %0		\n"
	: "=r"(temp), "=r"(flags)
	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
	: "memory", "cc");

return flags;
}

/*
 * restore saved IRQ state
 */
static inline void arch_local_irq_restore(unsigned long flags)
{

__asm__ __volatile__(
	"	flag %0			\n"
	:
	: "r"(flags)
	: "memory");
}

/*
 * Unconditionally Enable IRQs
 */
#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
extern void arch_local_irq_enable(void);
#else
static inline void arch_local_irq_enable(void)
{
	unsigned long temp;

__asm__ __volatile__(
	"	lr   %0, [status32]	\n"
	"	or   %0, %0, %1		\n"
	"	flag %0			\n"
	: "=&r"(temp)
	: "n"((STATUS_E1_MASK | STATUS_E2_MASK))
	: "cc", "memory");
}
#endif

/*
 * Unconditionally Disable IRQs
 */
static inline void arch_local_irq_disable(void)
{
	unsigned long temp;

__asm__ __volatile__(
	"	lr  %0, [status32]	\n"
	"	and %0, %0, %1		\n"
	"	flag %0			\n"
	: "=&r"(temp)
	: "n"(~(STATUS_E1_MASK | STATUS_E2_MASK))
	: "memory");
}

/*
 * save IRQ state
 */
static inline long arch_local_save_flags(void)
{
	unsigned long temp;

__asm__ __volatile__(
	"	lr  %0, [status32]	\n"
	: "=&r"(temp)
	:
	: "memory");

return temp;
}

/*
 * Query IRQ state
 */
static inline int arch_irqs_disabled_flags(unsigned long flags)
{
	return !(flags & (STATUS_E1_MASK
#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
			| STATUS_E2_MASK
#endif
		));
}

static inline int arch_irqs_disabled(void)
{
	return arch_irqs_disabled_flags(arch_local_save_flags());
}

#else

#ifdef CONFIG_TRACE_IRQFLAGS

.macro TRACE_ASM_IRQ_DISABLE
	bl	trace_hardirqs_off
.endm

.macro TRACE_ASM_IRQ_ENABLE
	bl	trace_hardirqs_on
.endm

#else

.macro TRACE_ASM_IRQ_DISABLE
.endm

.macro TRACE_ASM_IRQ_ENABLE
.endm

#endif

.macro IRQ_DISABLE  scratch
	lr	\scratch, [status32]
	bic	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
	flag	\scratch
	TRACE_ASM_IRQ_DISABLE
.endm

.macro IRQ_ENABLE  scratch
	TRACE_ASM_IRQ_ENABLE
	lr	\scratch, [status32]
	or	\scratch, \scratch, (STATUS_E1_MASK | STATUS_E2_MASK)
	flag	\scratch
.endm

#endif	/* __ASSEMBLY__ */

#endif

/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) */ #ifndef __ASM_IRQFLAGS_ARCOMPACT_H #define __ASM_IRQFLAGS_ARCOMPACT_H /* vineetg: March 2010 : local_irq_save( ) optimisation * -Remove explicit mov of current status32 into reg, that is not needed * -Use BIC insn instead of INVERTED + AND * -Conditionally disable interrupts (if they are not enabled, don't disable) */ #include /* status32 Reg bits related to Interrupt Handling */ #define STATUS_E1_BIT 1 /* Int 1 enable */ #define STATUS_E2_BIT 2 /* Int 2 enable */ #define STATUS_A1_BIT 3 /* Int 1 active */ #define STATUS_A2_BIT 4 /* Int 2 active */ #define STATUS_AE_BIT 5 /* Exception active */ #define STATUS_E1_MASK (1<