/usr/src/linux-headers-5.15.0-181/arch/arm/include/asm
NameSizeModeActions
hardware/-0755rm
mach/-0755rm
vdso/-0755rm
xen/-0755rm
archrandom.h1920644editdlrm
arch_gicv3.h63270644editdlrm
arch_timer.h31240644editdlrm
arm-cci.h5350644editdlrm
asm-offsets.h350644editdlrm
assembler.h131060644editdlrm
atomic.h125360644editdlrm
auxvec.h290644editdlrm
barrier.h29100644editdlrm
bitops.h76270644editdlrm
bitrev.h4510644editdlrm
bL_switcher.h21860644editdlrm
bug.h26200644editdlrm
bugs.h2970644editdlrm
cache.h7940644editdlrm
cacheflush.h157940644editdlrm
cachetype.h27790644editdlrm
checksum.h40260644editdlrm
clocksource.h1610644editdlrm
cmpxchg.h63280644editdlrm
compiler.h9780644editdlrm
cp15.h33020644editdlrm
cpu.h3870644editdlrm
cpufeature.h12910644editdlrm
cpuidle.h16280644editdlrm
cputype.h87660644editdlrm
cti.h37030644editdlrm
dcc.h6230644editdlrm
delay.h29030644editdlrm
device.h6360644editdlrm
div64.h26400644editdlrm
dma-direct.h13410644editdlrm
dma-iommu.h9080644editdlrm
dma-mapping.h47140644editdlrm
dma.h42870644editdlrm
dmi.h3780644editdlrm
domain.h37510644editdlrm
ecard.h61190644editdlrm
edac.h9950644editdlrm
efi.h25010644editdlrm
elf.h46360644editdlrm
entry-macro-multi.S3360644editdlrm
exception.h4160644editdlrm
fb.h3750644editdlrm
fiq.h13910644editdlrm
firmware.h17280644editdlrm
fixmap.h18810644editdlrm
floppy.h23180644editdlrm
fncpy.h25520644editdlrm
fpstate.h14780644editdlrm
ftrace.h18210644editdlrm
futex.h43570644editdlrm
glue-cache.h35150644editdlrm
glue-df.h21100644editdlrm
glue-pf.h10050644editdlrm
glue-proc.h44240644editdlrm
glue.h6130644editdlrm
gpio.h6150644editdlrm
hardirq.h2460644editdlrm
highmem.h23790644editdlrm
hugetlb-3level.h6900644editdlrm
hugetlb.h5130644editdlrm
hwcap.h3780644editdlrm
hw_breakpoint.h38110644editdlrm
hw_irq.h3490644editdlrm
hypervisor.h2240644editdlrm
ide.h5660644editdlrm
idmap.h3590644editdlrm
insn.h6360644editdlrm
io.h150270644editdlrm
irq.h8870644editdlrm
irqflags.h39690644editdlrm
irq_work.h2340644editdlrm
jump_label.h10090644editdlrm
kasan.h7080644editdlrm
kasan_def.h27260644editdlrm
Kbuild1860644editdlrm
kexec-internal.h2720644editdlrm
kexec.h22550644editdlrm
kgdb.h27830644editdlrm
kprobes.h22480644editdlrm
krait-l2-accessors.h2310644editdlrm
linkage.h2160644editdlrm
mc146818rtc.h7200644editdlrm
mcpm.h120610644editdlrm
mcs_spinlock.h5700644editdlrm
memblock.h2480644editdlrm
memory.h109450644editdlrm
mmu.h9530644editdlrm
mmu_context.h34610644editdlrm
module.h12160644editdlrm
module.lds.h1340644editdlrm
mpu.h33000644editdlrm
mtd-xip.h5200644editdlrm
neon.h10410644editdlrm
nwflash.h1950644editdlrm
opcodes-sec.h3500644editdlrm
opcodes-virt.h6840644editdlrm
opcodes.h81180644editdlrm
outercache.h32680644editdlrm
page-nommu.h8110644editdlrm
page.h34480644editdlrm
paravirt.h4770644editdlrm
patch.h4380644editdlrm
pci.h7940644editdlrm
percpu.h10690644editdlrm
perf_event.h7080644editdlrm
pgalloc.h33730644editdlrm
pgtable-2level-hwdef.h33850644editdlrm
pgtable-2level-types.h12780644editdlrm
pgtable-2level.h86450644editdlrm
pgtable-3level-hwdef.h34350644editdlrm
pgtable-3level-types.h13310644editdlrm
pgtable-3level.h81480644editdlrm
pgtable-hwdef.h3210644editdlrm
pgtable-nommu.h19790644editdlrm
pgtable.h104920644editdlrm
probes.h13320644editdlrm
proc-fns.h47540644editdlrm
processor.h31660644editdlrm
procinfo.h11520644editdlrm
prom.h5520644editdlrm
psci.h3790644editdlrm
ptdump.h9230644editdlrm
ptrace.h48410644editdlrm
seccomp.h2810644editdlrm
sections.h6220644editdlrm
secure_cntvoff.h1520644editdlrm
setup.h7730644editdlrm
set_memory.h7200644editdlrm
shmparam.h4190644editdlrm
signal.h5590644editdlrm
smp.h28390644editdlrm
smp_plat.h25350644editdlrm
smp_scu.h13520644editdlrm
smp_twd.h5900644editdlrm
sparsemem.h7160644editdlrm
spectre.h9060644editdlrm
spinlock.h56450644editdlrm
spinlock_types.h5410644editdlrm
stackprotector.h13570644editdlrm
stacktrace.h7420644editdlrm
string.h21650644editdlrm
suspend.h3690644editdlrm
swab.h10050644editdlrm
switch_to.h10580644editdlrm
sync_bitops.h15140644editdlrm
syscall.h23470644editdlrm
system_info.h7630644editdlrm
system_misc.h10050644editdlrm
tcm.h9250644editdlrm
therm.h6550644editdlrm
thread_info.h49740644editdlrm
thread_notify.h10860644editdlrm
timex.h4310644editdlrm
tlb.h14420644editdlrm
tlbflush.h179090644editdlrm
tls.h31660644editdlrm
topology.h11390644editdlrm
traps.h9110644editdlrm
uaccess-asm.h27030644editdlrm
uaccess.h174310644editdlrm
ucontext.h27450644editdlrm
unified.h9790644editdlrm
unistd.h15780644editdlrm
unwind.h11730644editdlrm
uprobes.h9480644editdlrm
user.h43020644editdlrm
v7m.h32330644editdlrm
vdso.h5070644editdlrm
vdso_datapage.h4440644editdlrm
vermagic.h8000644editdlrm
vfp.h29690644editdlrm
vfpmacros.h20740644editdlrm
vga.h3050644editdlrm
virt.h18550644editdlrm
vmalloc.h870644editdlrm
vmlinux.lds.h44900644editdlrm
word-at-a-time.h21280644editdlrm
xor.h52040644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/arm/include/asm/opcodes.h (8118B)
/* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/arm/include/asm/opcodes.h */ #ifndef __ASM_ARM_OPCODES_H #define __ASM_ARM_OPCODES_H #ifndef __ASSEMBLY__ #include extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr); #endif #define ARM_OPCODE_CONDTEST_FAIL 0 #define ARM_OPCODE_CONDTEST_PASS 1 #define ARM_OPCODE_CONDTEST_UNCOND 2 /* * Assembler opcode byteswap helpers. * These are only intended for use by this header: don't use them directly, * because they will be suboptimal in most cases. */ #define ___asm_opcode_swab32(x) ( \ (((x) << 24) & 0xFF000000) \ | (((x) << 8) & 0x00FF0000) \ | (((x) >> 8) & 0x0000FF00) \ | (((x) >> 24) & 0x000000FF) \ ) #define ___asm_opcode_swab16(x) ( \ (((x) << 8) & 0xFF00) \ | (((x) >> 8) & 0x00FF) \ ) #define ___asm_opcode_swahb32(x) ( \ (((x) << 8) & 0xFF00FF00) \ | (((x) >> 8) & 0x00FF00FF) \ ) #define ___asm_opcode_swahw32(x) ( \ (((x) << 16) & 0xFFFF0000) \ | (((x) >> 16) & 0x0000FFFF) \ ) #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF) #define ___asm_opcode_identity16(x) ((x) & 0xFFFF) /* * Opcode byteswap helpers * * These macros help with converting instructions between a canonical integer * format and in-memory representation, in an endianness-agnostic manner. * * __mem_to_opcode_*() convert from in-memory representation to canonical form. * __opcode_to_mem_*() convert from canonical form to in-memory representation. * * * Canonical instruction representation: * * ARM: 0xKKLLMMNN * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8 * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8 * * There is no way to distinguish an ARM instruction in canonical representation * from a Thumb instruction (just as these cannot be distinguished in memory). * Where this distinction is important, it needs to be tracked separately. * * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not * represent any valid Thumb-2 instruction. For this range, * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false. * * The ___asm variants are intended only for use by this header, in situations * involving inline assembler. For .S files, the normal __opcode_*() macros * should do the right thing. */ #ifdef __ASSEMBLY__ #define ___opcode_swab32(x) ___asm_opcode_swab32(x) #define ___opcode_swab16(x) ___asm_opcode_swab16(x) #define ___opcode_swahb32(x) ___asm_opcode_swahb32(x) #define ___opcode_swahw32(x) ___asm_opcode_swahw32(x) #define ___opcode_identity32(x) ___asm_opcode_identity32(x) #define ___opcode_identity16(x) ___asm_opcode_identity16(x) #else /* ! __ASSEMBLY__ */ #include #include #define ___opcode_swab32(x) swab32(x) #define ___opcode_swab16(x) swab16(x) #define ___opcode_swahb32(x) swahb32(x) #define ___opcode_swahw32(x) swahw32(x) #define ___opcode_identity32(x) ((u32)(x)) #define ___opcode_identity16(x) ((u16)(x)) #endif /* ! __ASSEMBLY__ */ #ifdef CONFIG_CPU_ENDIAN_BE8 #define __opcode_to_mem_arm(x) ___opcode_swab32(x) #define __opcode_to_mem_thumb16(x) ___opcode_swab16(x) #define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x) #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x) #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x) #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x) #else /* ! CONFIG_CPU_ENDIAN_BE8 */ #define __opcode_to_mem_arm(x) ___opcode_identity32(x) #define __opcode_to_mem_thumb16(x) ___opcode_identity16(x) #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x) #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x) #ifndef CONFIG_CPU_ENDIAN_BE32 /* * On BE32 systems, using 32-bit accesses to store Thumb instructions will not * work in all cases, due to alignment constraints. For now, a correct * version is not provided for BE32. */ #define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x) #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x) #endif #endif /* ! CONFIG_CPU_ENDIAN_BE8 */ #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) #ifndef CONFIG_CPU_ENDIAN_BE32 #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) #endif /* Operations specific to Thumb opcodes */ /* Instruction size checks: */ #define __opcode_is_thumb32(x) ( \ ((x) & 0xF8000000) == 0xE8000000 \ || ((x) & 0xF0000000) == 0xF0000000 \ ) #define __opcode_is_thumb16(x) ( \ ((x) & 0xFFFF0000) == 0 \ && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \ ) /* Operations to construct or split 32-bit Thumb instructions: */ #define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16)) #define __opcode_thumb32_second(x) (___opcode_identity16(x)) #define __opcode_thumb32_compose(first, second) ( \ (___opcode_identity32(___opcode_identity16(first)) << 16) \ | ___opcode_identity32(___opcode_identity16(second)) \ ) #define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16)) #define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x)) #define ___asm_opcode_thumb32_compose(first, second) ( \ (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \ | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \ ) /* * Opcode injection helpers * * In rare cases it is necessary to assemble an opcode which the * assembler does not support directly, or which would normally be * rejected because of the CFLAGS or AFLAGS used to build the affected * file. * * Before using these macros, consider carefully whether it is feasible * instead to change the build flags for your file, or whether it really * makes sense to support old assembler versions when building that * particular kernel feature. * * The macros defined here should only be used where there is no viable * alternative. * * * __inst_arm(x): emit the specified ARM opcode * __inst_thumb16(x): emit the specified 16-bit Thumb opcode * __inst_thumb32(x): emit the specified 32-bit Thumb opcode * * __inst_arm_thumb16(arm, thumb): emit either the specified arm or * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2 * kernel is being built * * __inst_arm_thumb32(arm, thumb): emit either the specified arm or * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2 * kernel is being built * * * Note that using these macros directly is poor practice. Instead, you * should use them to define human-readable wrapper macros to encode the * instructions that you care about. In code which might run on ARMv7 or * above, you can usually use the __inst_arm_thumb{16,32} macros to * specify the ARM and Thumb alternatives at the same time. This ensures * that the correct opcode gets emitted depending on the instruction set * used for the kernel build. * * Look at opcodes-virt.h for an example of how to use these macros. */ #include #define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x)) #define __inst_thumb32(x) ___inst_thumb32( \ ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \ ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \ ) #define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x)) #ifdef CONFIG_THUMB2_KERNEL #define __inst_arm_thumb16(arm_opcode, thumb_opcode) \ __inst_thumb16(thumb_opcode) #define __inst_arm_thumb32(arm_opcode, thumb_opcode) \ __inst_thumb32(thumb_opcode) #else #define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode) #define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode) #endif /* Helpers for the helpers. Don't use these directly. */ #ifdef __ASSEMBLY__ #define ___inst_arm(x) .long x #define ___inst_thumb16(x) .short x #define ___inst_thumb32(first, second) .short first, second #else #define ___inst_arm(x) ".long " __stringify(x) "\n\t" #define ___inst_thumb16(x) ".short " __stringify(x) "\n\t" #define ___inst_thumb32(first, second) \ ".short " __stringify(first) ", " __stringify(second) "\n\t" #endif #endif /* __ASM_ARM_OPCODES_H */