/usr/src/linux-headers-5.15.0-181/arch/ia64/include/asm
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acenv.h11530644editdlrm
acpi-ext.h4440644editdlrm
acpi.h27720644editdlrm
agp.h8630644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h8920644editdlrm
asmmacro.h33720644editdlrm
atomic.h63900644editdlrm
barrier.h24140644editdlrm
bitops.h111120644editdlrm
bug.h4040644editdlrm
cache.h7520644editdlrm
cacheflush.h9030644editdlrm
checksum.h17460644editdlrm
clocksource.h2760644editdlrm
cmpxchg.h4790644editdlrm
cpu.h4560644editdlrm
cputime.h6480644editdlrm
current.h4180644editdlrm
cyclone.h4420644editdlrm
delay.h17380644editdlrm
device.h2360644editdlrm
div64.h310644editdlrm
dma-mapping.h3820644editdlrm
dma.h3510644editdlrm
dmi.h3430644editdlrm
early_ioremap.h4280644editdlrm
efi.h3740644editdlrm
elf.h100250644editdlrm
emergency-restart.h1490644editdlrm
esi.h8870644editdlrm
exception.h6090644editdlrm
export.h1150644editdlrm
extable.h3300644editdlrm
fb.h5690644editdlrm
fpswa.h19250644editdlrm
ftrace.h7480644editdlrm
futex.h26160644editdlrm
gcc_intrin.h3680644editdlrm
hardirq.h5610644editdlrm
hugetlb.h9330644editdlrm
hw_irq.h57760644editdlrm
idle.h2000644editdlrm
intrinsics.h3060644editdlrm
io.h75270644editdlrm
iommu.h5050644editdlrm
iommu_table.h1750644editdlrm
iosapic.h27520644editdlrm
irq.h9600644editdlrm
irqflags.h20960644editdlrm
irq_regs.h340644editdlrm
irq_remapping.h1420644editdlrm
Kbuild1390644editdlrm
kdebug.h10110644editdlrm
kexec.h16060644editdlrm
kprobes.h31480644editdlrm
kregs.h68900644editdlrm
libata-portmap.h2250644editdlrm
linkage.h3980644editdlrm
local.h310644editdlrm
mca.h60090644editdlrm
mca_asm.h73560644editdlrm
meminit.h17510644editdlrm
mman.h4320644editdlrm
mmiowb.h4330644editdlrm
mmu.h3740644editdlrm
mmu_context.h53040644editdlrm
mmzone.h8690644editdlrm
module.h11540644editdlrm
module.lds.h3940644editdlrm
msidef.h14380644editdlrm
nodedata.h18980644editdlrm
numa.h23380644editdlrm
page.h58560644editdlrm
pal.h546740644editdlrm
param.h4390644editdlrm
parport.h5340644editdlrm
patch.h12140644editdlrm
pci.h20070644editdlrm
percpu.h13540644editdlrm
pgalloc.h15690644editdlrm
pgtable.h198460644editdlrm
processor.h178760644editdlrm
ptrace.h52580644editdlrm
sal.h271890644editdlrm
sections.h16790644editdlrm
serial.h4460644editdlrm
shmparam.h4450644editdlrm
signal.h7490644editdlrm
smp.h25140644editdlrm
sparsemem.h7850644editdlrm
spinlock.h71490644editdlrm
spinlock_types.h4750644editdlrm
string.h6590644editdlrm
switch_to.h27020644editdlrm
syscall.h18200644editdlrm
termios.h19230644editdlrm
thread_info.h49060644editdlrm
timex.h15020644editdlrm
tlb.h15770644editdlrm
tlbflush.h31650644editdlrm
topology.h14080644editdlrm
types.h8280644editdlrm
uaccess.h97300644editdlrm
uncached.h3140644editdlrm
unistd.h9870644editdlrm
unwind.h58730644editdlrm
user.h22990644editdlrm
ustack.h4030644editdlrm
vermagic.h3410644editdlrm
vga.h6490644editdlrm
vmalloc.h900644editdlrm
xor.h7430644editdlrm
xtp.h9380644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/ia64/include/asm/futex.h (2616B)
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_FUTEX_H #define _ASM_FUTEX_H #include #include #include #define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \ do { \ register unsigned long r8 __asm ("r8") = 0; \ __asm__ __volatile__( \ " mf;; \n" \ "[1:] " insn ";; \n" \ " .xdata4 \"__ex_table\", 1b-., 2f-. \n" \ "[2:]" \ : "+r" (r8), "=r" (oldval) \ : "r" (uaddr), "r" (oparg) \ : "memory"); \ ret = r8; \ } while (0) #define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \ do { \ register unsigned long r8 __asm ("r8") = 0; \ int val, newval; \ do { \ __asm__ __volatile__( \ " mf;; \n" \ "[1:] ld4 %3=[%4];; \n" \ " mov %2=%3 \n" \ insn ";; \n" \ " mov ar.ccv=%2;; \n" \ "[2:] cmpxchg4.acq %1=[%4],%3,ar.ccv;; \n" \ " .xdata4 \"__ex_table\", 1b-., 3f-.\n" \ " .xdata4 \"__ex_table\", 2b-., 3f-.\n" \ "[3:]" \ : "+r" (r8), "=r" (val), "=&r" (oldval), \ "=&r" (newval) \ : "r" (uaddr), "r" (oparg) \ : "memory"); \ if (unlikely (r8)) \ break; \ } while (unlikely (val != oldval)); \ ret = r8; \ } while (0) static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) { int oldval = 0, ret; if (!access_ok(uaddr, sizeof(u32))) return -EFAULT; switch (op) { case FUTEX_OP_SET: __futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ADD: __futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg); break; case FUTEX_OP_OR: __futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ANDN: __futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr, ~oparg); break; case FUTEX_OP_XOR: __futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg); break; default: ret = -ENOSYS; } if (!ret) *oval = oldval; return ret; } static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32 newval) { if (!access_ok(uaddr, sizeof(u32))) return -EFAULT; { register unsigned long r8 __asm ("r8") = 0; unsigned long prev; __asm__ __volatile__( " mf;; \n" " mov ar.ccv=%4;; \n" "[1:] cmpxchg4.acq %1=[%2],%3,ar.ccv \n" " .xdata4 \"__ex_table\", 1b-., 2f-. \n" "[2:]" : "+r" (r8), "=&r" (prev) : "r" (uaddr), "r" (newval), "rO" ((long) (unsigned) oldval) : "memory"); *uval = prev; return r8; } } #endif /* _ASM_FUTEX_H */