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/usr/src/linux-headers-5.15.0-181/arch/ia64/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/ia64/include/asm

Name	Size	Mode	Actions
native/	-	0755	rm
sn/	-	0755	rm
uv/	-	0755	rm
acenv.h	1153	0644	edit dl rm
acpi-ext.h	444	0644	edit dl rm
acpi.h	2772	0644	edit dl rm
agp.h	863	0644	edit dl rm
asm-offsets.h	35	0644	edit dl rm
asm-prototypes.h	892	0644	edit dl rm
asmmacro.h	3372	0644	edit dl rm
atomic.h	6390	0644	edit dl rm
barrier.h	2414	0644	edit dl rm
bitops.h	11112	0644	edit dl rm
bug.h	404	0644	edit dl rm
cache.h	752	0644	edit dl rm
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checksum.h	1746	0644	edit dl rm
clocksource.h	276	0644	edit dl rm
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cpu.h	456	0644	edit dl rm
cputime.h	648	0644	edit dl rm
current.h	418	0644	edit dl rm
cyclone.h	442	0644	edit dl rm
delay.h	1738	0644	edit dl rm
device.h	236	0644	edit dl rm
div64.h	31	0644	edit dl rm
dma-mapping.h	382	0644	edit dl rm
dma.h	351	0644	edit dl rm
dmi.h	343	0644	edit dl rm
early_ioremap.h	428	0644	edit dl rm
efi.h	374	0644	edit dl rm
elf.h	10025	0644	edit dl rm
emergency-restart.h	149	0644	edit dl rm
esi.h	887	0644	edit dl rm
exception.h	609	0644	edit dl rm
export.h	115	0644	edit dl rm
extable.h	330	0644	edit dl rm
fb.h	569	0644	edit dl rm
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ftrace.h	748	0644	edit dl rm
futex.h	2616	0644	edit dl rm
gcc_intrin.h	368	0644	edit dl rm
hardirq.h	561	0644	edit dl rm
hugetlb.h	933	0644	edit dl rm
hw_irq.h	5776	0644	edit dl rm
idle.h	200	0644	edit dl rm
intrinsics.h	306	0644	edit dl rm
io.h	7527	0644	edit dl rm
iommu.h	505	0644	edit dl rm
iommu_table.h	175	0644	edit dl rm
iosapic.h	2752	0644	edit dl rm
irq.h	960	0644	edit dl rm
irqflags.h	2096	0644	edit dl rm
irq_regs.h	34	0644	edit dl rm
irq_remapping.h	142	0644	edit dl rm
Kbuild	139	0644	edit dl rm
kdebug.h	1011	0644	edit dl rm
kexec.h	1606	0644	edit dl rm
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kregs.h	6890	0644	edit dl rm
libata-portmap.h	225	0644	edit dl rm
linkage.h	398	0644	edit dl rm
local.h	31	0644	edit dl rm
mca.h	6009	0644	edit dl rm
mca_asm.h	7356	0644	edit dl rm
meminit.h	1751	0644	edit dl rm
mman.h	432	0644	edit dl rm
mmiowb.h	433	0644	edit dl rm
mmu.h	374	0644	edit dl rm
mmu_context.h	5304	0644	edit dl rm
mmzone.h	869	0644	edit dl rm
module.h	1154	0644	edit dl rm
module.lds.h	394	0644	edit dl rm
msidef.h	1438	0644	edit dl rm
nodedata.h	1898	0644	edit dl rm
numa.h	2338	0644	edit dl rm
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param.h	439	0644	edit dl rm
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patch.h	1214	0644	edit dl rm
pci.h	2007	0644	edit dl rm
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pgalloc.h	1569	0644	edit dl rm
pgtable.h	19846	0644	edit dl rm
processor.h	17876	0644	edit dl rm
ptrace.h	5258	0644	edit dl rm
sal.h	27189	0644	edit dl rm
sections.h	1679	0644	edit dl rm
serial.h	446	0644	edit dl rm
shmparam.h	445	0644	edit dl rm
signal.h	749	0644	edit dl rm
smp.h	2514	0644	edit dl rm
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spinlock_types.h	475	0644	edit dl rm
string.h	659	0644	edit dl rm
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syscall.h	1820	0644	edit dl rm
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types.h	828	0644	edit dl rm
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uncached.h	314	0644	edit dl rm
unistd.h	987	0644	edit dl rm
unwind.h	5873	0644	edit dl rm
user.h	2299	0644	edit dl rm
ustack.h	403	0644	edit dl rm
vermagic.h	341	0644	edit dl rm
vga.h	649	0644	edit dl rm
vmalloc.h	90	0644	edit dl rm
xor.h	743	0644	edit dl rm
xtp.h	938	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/ia64/include/asm/iosapic.h (2752B)

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_IA64_IOSAPIC_H
#define __ASM_IA64_IOSAPIC_H

#define	IOSAPIC_REG_SELECT	0x0
#define	IOSAPIC_WINDOW		0x10
#define	IOSAPIC_EOI		0x40

#define	IOSAPIC_VERSION		0x1

/*
 * Redirection table entry
 */
#define	IOSAPIC_RTE_LOW(i)	(0x10+i*2)
#define	IOSAPIC_RTE_HIGH(i)	(0x11+i*2)

#define	IOSAPIC_DEST_SHIFT		16

/*
 * Delivery mode
 */
#define	IOSAPIC_DELIVERY_SHIFT		8
#define	IOSAPIC_FIXED			0x0
#define	IOSAPIC_LOWEST_PRIORITY	0x1
#define	IOSAPIC_PMI			0x2
#define	IOSAPIC_NMI			0x4
#define	IOSAPIC_INIT			0x5
#define	IOSAPIC_EXTINT			0x7

/*
 * Interrupt polarity
 */
#define	IOSAPIC_POLARITY_SHIFT		13
#define	IOSAPIC_POL_HIGH		0
#define	IOSAPIC_POL_LOW		1

/*
 * Trigger mode
 */
#define	IOSAPIC_TRIGGER_SHIFT		15
#define	IOSAPIC_EDGE			0
#define	IOSAPIC_LEVEL			1

/*
 * Mask bit
 */

#define	IOSAPIC_MASK_SHIFT		16
#define	IOSAPIC_MASK			(1<<IOSAPIC_MASK_SHIFT)

#define IOSAPIC_VECTOR_MASK		0xffffff00

#ifndef __ASSEMBLY__

#define NR_IOSAPICS			256

#define iosapic_pcat_compat_init	ia64_native_iosapic_pcat_compat_init
#define __iosapic_read			__ia64_native_iosapic_read
#define __iosapic_write			__ia64_native_iosapic_write
#define iosapic_get_irq_chip		ia64_native_iosapic_get_irq_chip

extern void __init ia64_native_iosapic_pcat_compat_init(void);
extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);

static inline unsigned int
__ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg)
{
	writel(reg, iosapic + IOSAPIC_REG_SELECT);
	return readl(iosapic + IOSAPIC_WINDOW);
}

static inline void
__ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val)
{
	writel(reg, iosapic + IOSAPIC_REG_SELECT);
	writel(val, iosapic + IOSAPIC_WINDOW);
}

static inline void iosapic_eoi(char __iomem *iosapic, u32 vector)
{
	writel(vector, iosapic + IOSAPIC_EOI);
}

extern void __init iosapic_system_init (int pcat_compat);
extern int iosapic_init (unsigned long address, unsigned int gsi_base);
extern int iosapic_remove (unsigned int gsi_base);
extern int gsi_to_irq (unsigned int gsi);
extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity,
				  unsigned long trigger);
extern void iosapic_unregister_intr (unsigned int irq);
extern void iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi,
				      unsigned long polarity,
				      unsigned long trigger);
extern int __init iosapic_register_platform_intr (u32 int_type,
					   unsigned int gsi,
					   int pmi_vector,
					   u16 eid, u16 id,
					   unsigned long polarity,
					   unsigned long trigger);

#ifdef CONFIG_NUMA
extern void map_iosapic_to_node (unsigned int, int);
#endif

# endif /* !__ASSEMBLY__ */
#endif /* __ASM_IA64_IOSAPIC_H */

/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_IA64_IOSAPIC_H #define __ASM_IA64_IOSAPIC_H #define IOSAPIC_REG_SELECT 0x0 #define IOSAPIC_WINDOW 0x10 #define IOSAPIC_EOI 0x40 #define IOSAPIC_VERSION 0x1 /* * Redirection table entry */ #define IOSAPIC_RTE_LOW(i) (0x10+i*2) #define IOSAPIC_RTE_HIGH(i) (0x11+i*2) #define IOSAPIC_DEST_SHIFT 16 /* * Delivery mode */ #define IOSAPIC_DELIVERY_SHIFT 8 #define IOSAPIC_FIXED 0x0 #define IOSAPIC_LOWEST_PRIORITY 0x1 #define IOSAPIC_PMI 0x2 #define IOSAPIC_NMI 0x4 #define IOSAPIC_INIT 0x5 #define IOSAPIC_EXTINT 0x7 /* * Interrupt polarity */ #define IOSAPIC_POLARITY_SHIFT 13 #define IOSAPIC_POL_HIGH 0 #define IOSAPIC_POL_LOW 1 /* * Trigger mode */ #define IOSAPIC_TRIGGER_SHIFT 15 #define IOSAPIC_EDGE 0 #define IOSAPIC_LEVEL 1 /* * Mask bit */ #define IOSAPIC_MASK_SHIFT 16 #define IOSAPIC_MASK (1<