/usr/src/linux-headers-5.15.0-181/arch/microblaze/include/asm
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asm-compat.h5180644editdlrm
asm-offsets.h350644editdlrm
barrier.h3130644editdlrm
cache.h5100644editdlrm
cacheflush.h32090644editdlrm
checksum.h8060644editdlrm
cpuinfo.h20430644editdlrm
current.h7140644editdlrm
delay.h21380644editdlrm
dma.h4320644editdlrm
elf.h6020644editdlrm
entry.h10180644editdlrm
exceptions.h19280644editdlrm
fixmap.h18740644editdlrm
flat.h19820644editdlrm
ftrace.h6420644editdlrm
futex.h21790644editdlrm
hash.h24290644editdlrm
highmem.h18000644editdlrm
io.h16910644editdlrm
irq.h3760644editdlrm
irqflags.h25290644editdlrm
Kbuild2500644editdlrm
kgdb.h7390644editdlrm
mmu.h40500644editdlrm
mmu_context.h720644editdlrm
mmu_context_mm.h38930644editdlrm
module.h7040644editdlrm
page.h40760644editdlrm
pci-bridge.h44730644editdlrm
pci.h19860644editdlrm
pgalloc.h10420644editdlrm
pgtable.h145260644editdlrm
processor.h26930644editdlrm
ptrace.h5910644editdlrm
pvr.h87910644editdlrm
registers.h15080644editdlrm
seccomp.h2560644editdlrm
sections.h5010644editdlrm
setup.h8230644editdlrm
string.h4940644editdlrm
switch_to.h4930644editdlrm
syscall.h23460644editdlrm
thread_info.h39790644editdlrm
timex.h2660644editdlrm
tlbflush.h15790644editdlrm
uaccess.h81210644editdlrm
unistd.h10510644editdlrm
unwind.h6110644editdlrm
vmalloc.h1080644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/microblaze/include/asm/futex.h (2179B)
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_MICROBLAZE_FUTEX_H #define _ASM_MICROBLAZE_FUTEX_H #ifdef __KERNEL__ #include #include #include #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ ({ \ __asm__ __volatile__ ( \ "1: lwx %0, %2, r0; " \ insn \ "2: swx %1, %2, r0; \ addic %1, r0, 0; \ bnei %1, 1b; \ 3: \ .section .fixup,\"ax\"; \ 4: brid 3b; \ addik %1, r0, %3; \ .previous; \ .section __ex_table,\"a\"; \ .word 1b,4b,2b,4b; \ .previous;" \ : "=&r" (oldval), "=&r" (ret) \ : "r" (uaddr), "i" (-EFAULT), "r" (oparg) \ ); \ }) static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) { int oldval = 0, ret; if (!access_ok(uaddr, sizeof(u32))) return -EFAULT; switch (op) { case FUTEX_OP_SET: __futex_atomic_op("or %1,%4,%4;", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ADD: __futex_atomic_op("add %1,%0,%4;", ret, oldval, uaddr, oparg); break; case FUTEX_OP_OR: __futex_atomic_op("or %1,%0,%4;", ret, oldval, uaddr, oparg); break; case FUTEX_OP_ANDN: __futex_atomic_op("andn %1,%0,%4;", ret, oldval, uaddr, oparg); break; case FUTEX_OP_XOR: __futex_atomic_op("xor %1,%0,%4;", ret, oldval, uaddr, oparg); break; default: ret = -ENOSYS; } if (!ret) *oval = oldval; return ret; } static inline int futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 oldval, u32 newval) { int ret = 0, cmp; u32 prev; if (!access_ok(uaddr, sizeof(u32))) return -EFAULT; __asm__ __volatile__ ("1: lwx %1, %3, r0; \ cmp %2, %1, %4; \ bnei %2, 3f; \ 2: swx %5, %3, r0; \ addic %2, r0, 0; \ bnei %2, 1b; \ 3: \ .section .fixup,\"ax\"; \ 4: brid 3b; \ addik %0, r0, %6; \ .previous; \ .section __ex_table,\"a\"; \ .word 1b,4b,2b,4b; \ .previous;" \ : "+r" (ret), "=&r" (prev), "=&r"(cmp) \ : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)); *uval = prev; return ret; } #endif /* __KERNEL__ */ #endif