/usr/src/linux-headers-5.15.0-181/arch/nds32/include/asm
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assembler.h5980644editdlrm
barrier.h4310644editdlrm
bitfield.h471270644editdlrm
cache.h2760644editdlrm
cacheflush.h19860644editdlrm
cache_info.h3150644editdlrm
current.h3040644editdlrm
delay.h9380644editdlrm
elf.h60210644editdlrm
fixmap.h8310644editdlrm
fpu.h31950644editdlrm
fpuemu.h12720644editdlrm
ftrace.h11610644editdlrm
futex.h24830644editdlrm
highmem.h16240644editdlrm
io.h24740644editdlrm
irqflags.h8480644editdlrm
Kbuild1940644editdlrm
l2_cache.h47910644editdlrm
linkage.h2640644editdlrm
memory.h27130644editdlrm
mmu.h2130644editdlrm
mmu_context.h14090644editdlrm
nds32.h20180644editdlrm
nds32_fpu_inst.h25100644editdlrm
page.h15910644editdlrm
perf_event.h4450644editdlrm
pgalloc.h14190644editdlrm
pgtable.h116760644editdlrm
pmu.h133500644editdlrm
proc-fns.h16680644editdlrm
processor.h24050644editdlrm
ptrace.h16860644editdlrm
sfp-machine.h44630644editdlrm
shmparam.h4620644editdlrm
stacktrace.h8840644editdlrm
string.h4710644editdlrm
suspend.h2580644editdlrm
swab.h8100644editdlrm
syscall.h54960644editdlrm
syscalls.h5100644editdlrm
thread_info.h23900644editdlrm
tlb.h2490644editdlrm
tlbflush.h11440644editdlrm
uaccess.h82720644editdlrm
unistd.h1560644editdlrm
vdso.h4290644editdlrm
vdso_datapage.h11040644editdlrm
vdso_timer_info.h3570644editdlrm
vermagic.h2140644editdlrm
vmalloc.h930644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/nds32/include/asm/mmu_context.h (1409B)
/* SPDX-License-Identifier: GPL-2.0 */ // Copyright (C) 2005-2017 Andes Technology Corporation #ifndef __ASM_NDS32_MMU_CONTEXT_H #define __ASM_NDS32_MMU_CONTEXT_H #include #include #include #include #define init_new_context init_new_context static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm) { mm->context.id = 0; return 0; } #define CID_BITS 9 extern spinlock_t cid_lock; extern unsigned int cpu_last_cid; static inline void __new_context(struct mm_struct *mm) { unsigned int cid; unsigned long flags; spin_lock_irqsave(&cid_lock, flags); cid = cpu_last_cid; cpu_last_cid += 1 << TLB_MISC_offCID; if (cpu_last_cid == 0) cpu_last_cid = 1 << TLB_MISC_offCID << CID_BITS; if ((cid & TLB_MISC_mskCID) == 0) flush_tlb_all(); spin_unlock_irqrestore(&cid_lock, flags); mm->context.id = cid; } static inline void check_context(struct mm_struct *mm) { if (unlikely ((mm->context.id ^ cpu_last_cid) >> TLB_MISC_offCID >> CID_BITS)) __new_context(mm); } static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) { unsigned int cpu = smp_processor_id(); if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) { check_context(next); cpu_switch_mm(next); } } #include #endif