/usr/src/linux-headers-5.15.0-181/arch/parisc/include/asm/
/usr/src/linux-headers-5.15.0-181/arch/parisc/include/asm
NameSizeModeActions
agp.h5960644editdlrm
alternative.h19540644editdlrm
asm-offsets.h350644editdlrm
asmregs.h24780644editdlrm
assembly.h124960644editdlrm
atomic.h57180644editdlrm
barrier.h25630644editdlrm
bitops.h55780644editdlrm
bug.h24080644editdlrm
cache.h20840644editdlrm
cacheflush.h37730644editdlrm
checksum.h47150644editdlrm
cmpxchg.h37830644editdlrm
compat.h39730644editdlrm
compat_ucontext.h5910644editdlrm
delay.h5330644editdlrm
dma-mapping.h10120644editdlrm
dma.h58490644editdlrm
dwarf.h4560644editdlrm
eisa_bus.h4920644editdlrm
eisa_eeprom.h43180644editdlrm
elf.h143810644editdlrm
fb.h4910644editdlrm
fixmap.h16110644editdlrm
floppy.h61930644editdlrm
ftrace.h6410644editdlrm
futex.h26660644editdlrm
grfioctl.h40900644editdlrm
hardirq.h9760644editdlrm
hardware.h42390644editdlrm
hash.h51940644editdlrm
hugetlb.h13310644editdlrm
ide.h11200644editdlrm
io.h83070644editdlrm
irq.h11710644editdlrm
irqflags.h10460644editdlrm
jump_label.h9900644editdlrm
kbdleds.h4770644editdlrm
Kbuild1750644editdlrm
kexec.h8270644editdlrm
kgdb.h13180644editdlrm
kprobes.h12840644editdlrm
ldcw.h25700644editdlrm
led.h13620644editdlrm
linkage.h7380644editdlrm
machdep.h3490644editdlrm
mckinley.h2700644editdlrm
mmu.h1950644editdlrm
mmu_context.h23550644editdlrm
mmzone.h2020644editdlrm
module.h5270644editdlrm
page.h55330644editdlrm
parisc-device.h19640644editdlrm
parport.h3580644editdlrm
patch.h4450644editdlrm
pci.h59560644editdlrm
pdc.h42690644editdlrm
pdcpat.h169680644editdlrm
pdc_chassis.h147450644editdlrm
perf.h19360644editdlrm
perf_event.h1520644editdlrm
pgalloc.h17220644editdlrm
pgtable.h170340644editdlrm
prefetch.h11470644editdlrm
processor.h94860644editdlrm
psw.h24640644editdlrm
ptrace.h16030644editdlrm
ropes.h100600644editdlrm
rt_sigframe.h7450644editdlrm
runway.h3200644editdlrm
seccomp.h6510644editdlrm
sections.h4940644editdlrm
serial.h1240644editdlrm
shmparam.h2630644editdlrm
signal.h6850644editdlrm
smp.h12760644editdlrm
socket.h3100644editdlrm
sparsemem.h3450644editdlrm
special_insns.h15540644editdlrm
spinlock.h31820644editdlrm
spinlock_types.h7010644editdlrm
string.h2470644editdlrm
superio.h33330644editdlrm
switch_to.h3320644editdlrm
syscall.h14770644editdlrm
termios.h17610644editdlrm
thread_info.h31430644editdlrm
timex.h4030644editdlrm
tlb.h2880644editdlrm
tlbflush.h19750644editdlrm
topology.h9000644editdlrm
traps.h5980644editdlrm
uaccess.h62530644editdlrm
ucontext.h3270644editdlrm
unaligned.h3070644editdlrm
unistd.h57760644editdlrm
unwind.h27230644editdlrm
vmalloc.h960644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/parisc/include/asm/barrier.h (2563B)
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_BARRIER_H #define __ASM_BARRIER_H #include #ifndef __ASSEMBLY__ /* The synchronize caches instruction executes as a nop on systems in which all memory references are performed in order. */ #define synchronize_caches() asm volatile("sync" \ ALTERNATIVE(ALT_COND_NO_SMP, INSN_NOP) \ : : : "memory") #if defined(CONFIG_SMP) #define mb() do { synchronize_caches(); } while (0) #define rmb() mb() #define wmb() mb() #define dma_rmb() mb() #define dma_wmb() mb() #else #define mb() barrier() #define rmb() barrier() #define wmb() barrier() #define dma_rmb() barrier() #define dma_wmb() barrier() #endif #define __smp_mb() mb() #define __smp_rmb() mb() #define __smp_wmb() mb() #define __smp_store_release(p, v) \ do { \ typeof(p) __p = (p); \ union { typeof(*p) __val; char __c[1]; } __u = \ { .__val = (__force typeof(*p)) (v) }; \ compiletime_assert_atomic_type(*p); \ switch (sizeof(*p)) { \ case 1: \ asm volatile("stb,ma %0,0(%1)" \ : : "r"(*(__u8 *)__u.__c), "r"(__p) \ : "memory"); \ break; \ case 2: \ asm volatile("sth,ma %0,0(%1)" \ : : "r"(*(__u16 *)__u.__c), "r"(__p) \ : "memory"); \ break; \ case 4: \ asm volatile("stw,ma %0,0(%1)" \ : : "r"(*(__u32 *)__u.__c), "r"(__p) \ : "memory"); \ break; \ case 8: \ if (IS_ENABLED(CONFIG_64BIT)) \ asm volatile("std,ma %0,0(%1)" \ : : "r"(*(__u64 *)__u.__c), "r"(__p) \ : "memory"); \ break; \ } \ } while (0) #define __smp_load_acquire(p) \ ({ \ union { typeof(*p) __val; char __c[1]; } __u; \ typeof(p) __p = (p); \ compiletime_assert_atomic_type(*p); \ switch (sizeof(*p)) { \ case 1: \ asm volatile("ldb,ma 0(%1),%0" \ : "=r"(*(__u8 *)__u.__c) : "r"(__p) \ : "memory"); \ break; \ case 2: \ asm volatile("ldh,ma 0(%1),%0" \ : "=r"(*(__u16 *)__u.__c) : "r"(__p) \ : "memory"); \ break; \ case 4: \ asm volatile("ldw,ma 0(%1),%0" \ : "=r"(*(__u32 *)__u.__c) : "r"(__p) \ : "memory"); \ break; \ case 8: \ if (IS_ENABLED(CONFIG_64BIT)) \ asm volatile("ldd,ma 0(%1),%0" \ : "=r"(*(__u64 *)__u.__c) : "r"(__p) \ : "memory"); \ break; \ } \ __u.__val; \ }) #include #endif /* !__ASSEMBLY__ */ #endif /* __ASM_BARRIER_H */