/usr/src/linux-headers-5.15.0-181/arch/sparc/include/asm
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adi.h1380644editdlrm
adi_64.h8120644editdlrm
agp.h4340644editdlrm
apb.h10820644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h7290644editdlrm
asm.h11010644editdlrm
asmmacro.h11830644editdlrm
atomic.h2190644editdlrm
atomic_32.h17600644editdlrm
atomic_64.h18490644editdlrm
auxio.h3100644editdlrm
auxio_32.h26150644editdlrm
auxio_64.h32530644editdlrm
backoff.h27560644editdlrm
barrier.h2230644editdlrm
barrier_32.h1600644editdlrm
barrier_64.h20040644editdlrm
bbc.h99960644editdlrm
bitext.h6310644editdlrm
bitops.h2190644editdlrm
bitops_32.h28530644editdlrm
bitops_64.h16750644editdlrm
btext.h1450644editdlrm
bug.h5880644editdlrm
cache.h6300644editdlrm
cacheflush.h3730644editdlrm
cacheflush_32.h19510644editdlrm
cacheflush_64.h25570644editdlrm
cachetlb_32.h8820644editdlrm
chafsr.h97100644editdlrm
checksum.h3310644editdlrm
checksum_32.h57910644editdlrm
checksum_64.h38550644editdlrm
chmctrl.h80960644editdlrm
clock.h2310644editdlrm
clocksource.h4070644editdlrm
cmpxchg.h2230644editdlrm
cmpxchg_32.h24830644editdlrm
cmpxchg_64.h52880644editdlrm
compat.h38900644editdlrm
compat_signal.h5650644editdlrm
contregs.h19410644editdlrm
cpudata.h3780644editdlrm
cpudata_32.h7290644editdlrm
cpudata_64.h11530644editdlrm
cpu_type.h5790644editdlrm
current.h9910644editdlrm
dcr.h7280644editdlrm
dcu.h15200644editdlrm
delay.h2150644editdlrm
delay_32.h9070644editdlrm
delay_64.h4030644editdlrm
device.h5650644editdlrm
dma-mapping.h3360644editdlrm
dma.h49890644editdlrm
ebus_dma.h10980644editdlrm
ecc.h44480644editdlrm
eeprom.h2540644editdlrm
elf.h2070644editdlrm
elf_32.h32670644editdlrm
elf_64.h68480644editdlrm
estate.h22870644editdlrm
extable.h7230644editdlrm
fb.h6800644editdlrm
fbio.h23150644editdlrm
fhc.h45330644editdlrm
floppy.h2190644editdlrm
floppy_32.h97960644editdlrm
floppy_64.h193920644editdlrm
fpumacro.h7100644editdlrm
ftrace.h8010644editdlrm
futex.h2150644editdlrm
futex_32.h820644editdlrm
futex_64.h21600644editdlrm
hardirq.h2230644editdlrm
hardirq_32.h3340644editdlrm
hardirq_64.h4120644editdlrm
head.h2110644editdlrm
head_32.h26170644editdlrm
head_64.h21840644editdlrm
hibernate.h4210644editdlrm
highmem.h19660644editdlrm
hugetlb.h15920644editdlrm
hvtramp.h7820644editdlrm
hw_irq.h880644editdlrm
hypervisor.h1176490644editdlrm
ide.h22220644editdlrm
idprom.h6560644editdlrm
intr_queue.h7940644editdlrm
io-unit.h24690644editdlrm
io.h6200644editdlrm
ioctls.h3580644editdlrm
iommu-common.h14450644editdlrm
iommu.h2150644editdlrm
iommu_32.h58650644editdlrm
iommu_64.h24890644editdlrm
io_32.h34300644editdlrm
io_64.h110760644editdlrm
irq.h2070644editdlrm
irqflags.h2270644editdlrm
irqflags_32.h10580644editdlrm
irqflags_64.h19520644editdlrm
irq_32.h5260644editdlrm
irq_64.h31050644editdlrm
jump_label.h10360644editdlrm
Kbuild1770644editdlrm
kdebug.h2190644editdlrm
kdebug_32.h20410644editdlrm
kdebug_64.h3930644editdlrm
kgdb.h10140644editdlrm
kprobes.h14100644editdlrm
ldc.h44750644editdlrm
leon.h78440644editdlrm
leon_amba.h82800644editdlrm
leon_pci.h5120644editdlrm
lsu.h10620644editdlrm
machines.h15400644editdlrm
mbus.h29960644editdlrm
mc146818rtc.h2980644editdlrm
mc146818rtc_32.h6990644editdlrm
mc146818rtc_64.h6890644editdlrm
mdesc.h30660644editdlrm
memctrl.h3110644editdlrm
mman.h26330644editdlrm
mmu.h2070644editdlrm
mmu_32.h2090644editdlrm
mmu_64.h39670644editdlrm
mmu_context.h2390644editdlrm
mmu_context_32.h10820644editdlrm
mmu_context_64.h54810644editdlrm
mmzone.h3630644editdlrm
mxcc.h44290644editdlrm
nmi.h3540644editdlrm
ns87303.h32990644editdlrm
obio.h64100644editdlrm
openprom.h74750644editdlrm
oplib.h2150644editdlrm
oplib_32.h60620644editdlrm
oplib_64.h83570644editdlrm
page.h2740644editdlrm
page_32.h38260644editdlrm
page_64.h47530644editdlrm
parport.h58190644editdlrm
pbm.h15050644editdlrm
pci.h13670644editdlrm
pcic.h59040644editdlrm
pcr.h18930644editdlrm
percpu.h2190644editdlrm
percpu_32.h1680644editdlrm
percpu_64.h5410644editdlrm
perf_event.h8020644editdlrm
pgalloc.h2230644editdlrm
pgalloc_32.h18230644editdlrm
pgalloc_64.h27640644editdlrm
pgtable.h2230644editdlrm
pgtable_32.h110210644editdlrm
pgtable_64.h323690644editdlrm
pgtsrmmu.h48790644editdlrm
pil.h11090644editdlrm
processor.h2310644editdlrm
processor_32.h28360644editdlrm
processor_64.h75770644editdlrm
prom.h17760644editdlrm
psr.h14140644editdlrm
ptrace.h42940644editdlrm
qrwlock.h2050644editdlrm
qspinlock.h2150644editdlrm
ross.h56550644editdlrm
sbi.h34250644editdlrm
scratchpad.h5470644editdlrm
seccomp.h2250644editdlrm
sections.h2890644editdlrm
setup.h15520644editdlrm
sfafsr.h32160644editdlrm
sfp-machine.h2390644editdlrm
sfp-machine_32.h69540644editdlrm
sfp-machine_64.h31780644editdlrm
shmparam.h2270644editdlrm
shmparam_32.h2530644editdlrm
shmparam_64.h3060644editdlrm
sigcontext.h26160644editdlrm
signal.h3510644editdlrm
smp.h2070644editdlrm
smp_32.h33680644editdlrm
smp_64.h17910644editdlrm
sparsemem.h2950644editdlrm
spinlock.h2270644editdlrm
spinlock_32.h43240644editdlrm
spinlock_64.h4090644editdlrm
spinlock_types.h5490644editdlrm
spitfire.h99670644editdlrm
stacktrace.h1660644editdlrm
starfire.h4180644editdlrm
string.h12540644editdlrm
string_32.h4050644editdlrm
string_64.h4090644editdlrm
sunbpp.h33460644editdlrm
swift.h31470644editdlrm
switch_to.h2310644editdlrm
switch_to_32.h36160644editdlrm
switch_to_64.h26400644editdlrm
syscall.h34640644editdlrm
syscalls.h2990644editdlrm
termbits.h1980644editdlrm
termios.h50630644editdlrm
thread_info.h2390644editdlrm
thread_info_32.h37730644editdlrm
thread_info_64.h81950644editdlrm
timer.h2150644editdlrm
timer_32.h12110644editdlrm
timer_64.h24480644editdlrm
timex.h2150644editdlrm
timex_32.h2660644editdlrm
timex_64.h4230644editdlrm
tlb.h2070644editdlrm
tlbflush.h2270644editdlrm
tlbflush_32.h6210644editdlrm
tlbflush_64.h17760644editdlrm
tlb_32.h1380644editdlrm
tlb_64.h10560644editdlrm
topology.h2270644editdlrm
topology_32.h1700644editdlrm
topology_64.h15460644editdlrm
traps.h5770644editdlrm
trap_block.h67860644editdlrm
tsb.h124570644editdlrm
tsunami.h18900644editdlrm
ttable.h208270644editdlrm
turbosparc.h38660644editdlrm
uaccess.h3900644editdlrm
uaccess_32.h70320644editdlrm
uaccess_64.h61420644editdlrm
unistd.h17970644editdlrm
upa.h38080644editdlrm
uprobes.h13040644editdlrm
user.h1020644editdlrm
vaddrs.h20660644editdlrm
vdso.h4910644editdlrm
vga.h9640644editdlrm
viking.h83410644editdlrm
vio.h120970644editdlrm
visasm.h15440644editdlrm
vmalloc.h930644editdlrm
vvar.h15770644editdlrm
winmacro.h47670644editdlrm
xor.h2070644editdlrm
xor_32.h70860644editdlrm
xor_64.h21560644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/sparc/include/asm/leon.h (7844B)
/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com) Gaisler Research * Copyright (C) 2004 Stefan Holst (mail@s-holst.de) Uni-Stuttgart * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB */ #ifndef LEON_H_INCLUDE #define LEON_H_INCLUDE /* mmu register access, ASI_LEON_MMUREGS */ #define LEON_CNR_CTRL 0x000 #define LEON_CNR_CTXP 0x100 #define LEON_CNR_CTX 0x200 #define LEON_CNR_F 0x300 #define LEON_CNR_FADDR 0x400 #define LEON_CNR_CTX_NCTX 256 /*number of MMU ctx */ #define LEON_CNR_CTRL_TLBDIS 0x80000000 #define LEON_MMUTLB_ENT_MAX 64 /* * diagnostic access from mmutlb.vhd: * 0: pte address * 4: pte * 8: additional flags */ #define LEON_DIAGF_LVL 0x3 #define LEON_DIAGF_WR 0x8 #define LEON_DIAGF_WR_SHIFT 3 #define LEON_DIAGF_HIT 0x10 #define LEON_DIAGF_HIT_SHIFT 4 #define LEON_DIAGF_CTX 0x1fe0 #define LEON_DIAGF_CTX_SHIFT 5 #define LEON_DIAGF_VALID 0x2000 #define LEON_DIAGF_VALID_SHIFT 13 /* irq masks */ #define LEON_HARD_INT(x) (1 << (x)) /* irq 0-15 */ #define LEON_IRQMASK_R 0x0000fffe /* bit 15- 1 of lregs.irqmask */ #define LEON_IRQPRIO_R 0xfffe0000 /* bit 31-17 of lregs.irqmask */ #define LEON_MCFG2_SRAMDIS 0x00002000 #define LEON_MCFG2_SDRAMEN 0x00004000 #define LEON_MCFG2_SRAMBANKSZ 0x00001e00 /* [12-9] */ #define LEON_MCFG2_SRAMBANKSZ_SHIFT 9 #define LEON_MCFG2_SDRAMBANKSZ 0x03800000 /* [25-23] */ #define LEON_MCFG2_SDRAMBANKSZ_SHIFT 23 #define LEON_TCNT0_MASK 0x7fffff #define ASI_LEON3_SYSCTRL 0x02 #define ASI_LEON3_SYSCTRL_ICFG 0x08 #define ASI_LEON3_SYSCTRL_DCFG 0x0c #define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1 << 27) #define ASI_LEON3_SYSCTRL_CFG_SSIZE(c) (1 << ((c >> 20) & 0xf)) #ifndef __ASSEMBLY__ /* do a physical address bypass write, i.e. for 0x80000000 */ static inline void leon_store_reg(unsigned long paddr, unsigned long value) { __asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r"(value), "r"(paddr), "i"(ASI_LEON_BYPASS) : "memory"); } /* do a physical address bypass load, i.e. for 0x80000000 */ static inline unsigned long leon_load_reg(unsigned long paddr) { unsigned long retval; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r"(retval) : "r"(paddr), "i"(ASI_LEON_BYPASS)); return retval; } /* macro access for leon_load_reg() and leon_store_reg() */ #define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x))) #define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v))) #define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x)) #define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v)) void leon_switch_mm(void); void leon_init_IRQ(void); static inline unsigned long sparc_leon3_get_dcachecfg(void) { unsigned int retval; __asm__ __volatile__("lda [%1] %2, %0\n\t" : "=r"(retval) : "r"(ASI_LEON3_SYSCTRL_DCFG), "i"(ASI_LEON3_SYSCTRL)); return retval; } /* enable snooping */ static inline void sparc_leon3_enable_snooping(void) { __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t" "set 0x800000, %%l2\n\t" "or %%l2, %%l1, %%l2\n\t" "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2"); }; static inline int sparc_leon3_snooping_enabled(void) { u32 cctrl; __asm__ __volatile__("lda [%%g0] 2, %0\n\t" : "=r"(cctrl)); return ((cctrl >> 23) & 1) && ((cctrl >> 17) & 1); }; static inline void sparc_leon3_disable_cache(void) { __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t" "set 0x00000f, %%l2\n\t" "andn %%l2, %%l1, %%l2\n\t" "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2"); }; static inline unsigned long sparc_leon3_asr17(void) { u32 asr17; __asm__ __volatile__ ("rd %%asr17, %0\n\t" : "=r"(asr17)); return asr17; }; static inline int sparc_leon3_cpuid(void) { return sparc_leon3_asr17() >> 28; } #endif /*!__ASSEMBLY__*/ #ifdef CONFIG_SMP # define LEON3_IRQ_IPI_DEFAULT 13 # define LEON3_IRQ_TICKER (leon3_gptimer_irq) # define LEON3_IRQ_CROSS_CALL 15 #endif #if defined(PAGE_SIZE_LEON_8K) #define LEON_PAGE_SIZE_LEON 1 #elif defined(PAGE_SIZE_LEON_16K) #define LEON_PAGE_SIZE_LEON 2) #else #define LEON_PAGE_SIZE_LEON 0 #endif #if LEON_PAGE_SIZE_LEON == 0 /* [ 8, 6, 6 ] + 12 */ #define LEON_PGD_SH 24 #define LEON_PGD_M 0xff #define LEON_PMD_SH 18 #define LEON_PMD_SH_V (LEON_PGD_SH-2) #define LEON_PMD_M 0x3f #define LEON_PTE_SH 12 #define LEON_PTE_M 0x3f #elif LEON_PAGE_SIZE_LEON == 1 /* [ 7, 6, 6 ] + 13 */ #define LEON_PGD_SH 25 #define LEON_PGD_M 0x7f #define LEON_PMD_SH 19 #define LEON_PMD_SH_V (LEON_PGD_SH-1) #define LEON_PMD_M 0x3f #define LEON_PTE_SH 13 #define LEON_PTE_M 0x3f #elif LEON_PAGE_SIZE_LEON == 2 /* [ 6, 6, 6 ] + 14 */ #define LEON_PGD_SH 26 #define LEON_PGD_M 0x3f #define LEON_PMD_SH 20 #define LEON_PMD_SH_V (LEON_PGD_SH-0) #define LEON_PMD_M 0x3f #define LEON_PTE_SH 14 #define LEON_PTE_M 0x3f #elif LEON_PAGE_SIZE_LEON == 3 /* [ 4, 7, 6 ] + 15 */ #define LEON_PGD_SH 28 #define LEON_PGD_M 0x0f #define LEON_PMD_SH 21 #define LEON_PMD_SH_V (LEON_PGD_SH-0) #define LEON_PMD_M 0x7f #define LEON_PTE_SH 15 #define LEON_PTE_M 0x3f #else #error cannot determine LEON_PAGE_SIZE_LEON #endif #define LEON3_XCCR_SETS_MASK 0x07000000UL #define LEON3_XCCR_SSIZE_MASK 0x00f00000UL #define LEON2_CCR_DSETS_MASK 0x03000000UL #define LEON2_CFG_SSIZE_MASK 0x00007000UL #ifndef __ASSEMBLY__ struct vm_area_struct; unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr); void leon_flush_icache_all(void); void leon_flush_dcache_all(void); void leon_flush_cache_all(void); void leon_flush_tlb_all(void); extern int leon_flush_during_switch; int leon_flush_needed(void); void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page); /* struct that hold LEON3 cache configuration registers */ struct leon3_cacheregs { unsigned long ccr; /* 0x00 - Cache Control Register */ unsigned long iccr; /* 0x08 - Instruction Cache Configuration Register */ unsigned long dccr; /* 0x0c - Data Cache Configuration Register */ }; #include #include struct device_node; struct task_struct; unsigned int leon_build_device_irq(unsigned int real_irq, irq_flow_handler_t flow_handler, const char *name, int do_ack); void leon_update_virq_handling(unsigned int virq, irq_flow_handler_t flow_handler, const char *name, int do_ack); void leon_init_timers(void); void leon_node_init(struct device_node *dp, struct device_node ***nextp); void init_leon(void); void poke_leonsparc(void); void leon3_getCacheRegs(struct leon3_cacheregs *regs); extern int leon3_ticker_irq; #ifdef CONFIG_SMP int leon_smp_nrcpus(void); void leon_clear_profile_irq(int cpu); void leon_smp_done(void); void leon_boot_cpus(void); int leon_boot_one_cpu(int i, struct task_struct *); void leon_init_smp(void); void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu); irqreturn_t leon_percpu_timer_interrupt(int irq, void *unused); extern unsigned int smpleon_ipi[]; extern unsigned int linux_trap_ipi15_leon[]; extern int leon_ipi_irq; #endif /* CONFIG_SMP */ #endif /* __ASSEMBLY__ */ /* macros used in leon_mm.c */ #define PFN(x) ((x) >> PAGE_SHIFT) #define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base))) #define _SRMMU_PTE_PMASK_LEON 0xffffffff /* * On LEON PCI Memory space is mapped 1:1 with physical address space. * * I/O space is located at low 64Kbytes in PCI I/O space. The I/O addresses * are converted into CPU addresses to virtual addresses that are mapped with * MMU to the PCI Host PCI I/O space window which are translated to the low * 64Kbytes by the Host controller. */ #endif