/usr/src/linux-headers-5.15.0-181/arch/sparc/include/uapi/asm
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apc.h17450644editdlrm
asi.h153670644editdlrm
auxvec.h3480644editdlrm
bitsperlong.h3240644editdlrm
byteorder.h1910644editdlrm
display7seg.h19450644editdlrm
envctrl.h34940644editdlrm
errno.h55390644editdlrm
fbio.h79040644editdlrm
fcntl.h17900644editdlrm
ioctl.h26460644editdlrm
ioctls.h61330644editdlrm
ipcbuf.h8080644editdlrm
Kbuild890644editdlrm
mman.h10080644editdlrm
msgbuf.h12180644editdlrm
openpromio.h21660644editdlrm
oradax.h20130644editdlrm
param.h2530644editdlrm
perfctr.h56950644editdlrm
poll.h2730644editdlrm
posix_types.h17680644editdlrm
psr.h22670644editdlrm
psrcompat.h20700644editdlrm
pstate.h64270644editdlrm
ptrace.h82220644editdlrm
resource.h7700644editdlrm
sembuf.h8960644editdlrm
setup.h3100644editdlrm
shmbuf.h13830644editdlrm
sigcontext.h1670644editdlrm
siginfo.h3900644editdlrm
signal.h47030644editdlrm
socket.h38720644editdlrm
stat.h20050644editdlrm
swab.h10340644editdlrm
termbits.h67610644editdlrm
termios.h10710644editdlrm
traps.h52710644editdlrm
uctx.h14200644editdlrm
unistd.h9040644editdlrm
utrap.h15410644editdlrm
watchdog.h10290644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/arch/sparc/include/uapi/asm/psrcompat.h (2070B)
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _SPARC64_PSRCOMPAT_H #define _SPARC64_PSRCOMPAT_H #include /* Old 32-bit PSR fields for the compatibility conversion code. */ #define PSR_CWP 0x0000001f /* current window pointer */ #define PSR_ET 0x00000020 /* enable traps field */ #define PSR_PS 0x00000040 /* previous privilege level */ #define PSR_S 0x00000080 /* current privilege level */ #define PSR_PIL 0x00000f00 /* processor interrupt level */ #define PSR_EF 0x00001000 /* enable floating point */ #define PSR_EC 0x00002000 /* enable co-processor */ #define PSR_SYSCALL 0x00004000 /* inside of a syscall */ #define PSR_LE 0x00008000 /* SuperSparcII little-endian */ #define PSR_ICC 0x00f00000 /* integer condition codes */ #define PSR_C 0x00100000 /* carry bit */ #define PSR_V 0x00200000 /* overflow bit */ #define PSR_Z 0x00400000 /* zero bit */ #define PSR_N 0x00800000 /* negative bit */ #define PSR_VERS 0x0f000000 /* cpu-version field */ #define PSR_IMPL 0xf0000000 /* cpu-implementation field */ #define PSR_V8PLUS 0xff000000 /* fake impl/ver, meaning a 64bit CPU is present */ #define PSR_XCC 0x000f0000 /* if PSR_V8PLUS, this is %xcc */ static inline unsigned int tstate_to_psr(unsigned long tstate) { return ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12) | ((tstate & TSTATE_XCC) >> 20) | ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) | PSR_V8PLUS); } static inline unsigned long psr_to_tstate_icc(unsigned int psr) { unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12; if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) tstate |= ((unsigned long)(psr & PSR_XCC)) << 20; return tstate; } #endif /* !(_SPARC64_PSRCOMPAT_H) */