/usr/src/linux-headers-5.15.0-181/include/linux/usb
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audio-v2.h143560644editdlrm
audio-v3.h142700644editdlrm
audio.h12610644editdlrm
c67x00.h18670644editdlrm
ccid.h7870644editdlrm
cdc-wdm.h7010644editdlrm
cdc.h15170644editdlrm
cdc_ncm.h59780644editdlrm
ch9.h23420644editdlrm
chipidea.h35120644editdlrm
composite.h261720644editdlrm
ehci-dbgp.h20990644editdlrm
ehci_def.h82770644editdlrm
ehci_pdriver.h23950644editdlrm
ezusb.h2860644editdlrm
functionfs.h1510644editdlrm
gadget.h375430644editdlrm
gadget_configfs.h30140644editdlrm
g_hid.h11580644editdlrm
hcd.h283430644editdlrm
input.h7160644editdlrm
iowarrior.h13740644editdlrm
irda.h38530644editdlrm
isp116x.h11600644editdlrm
isp1301.h24330644editdlrm
isp1362.h16280644editdlrm
m66592.h14440644editdlrm
musb-ux500.h8990644editdlrm
musb.h36000644editdlrm
net2280.h241200644editdlrm
of.h18590644editdlrm
ohci_pdriver.h17480644editdlrm
otg-fsm.h88230644editdlrm
otg.h31580644editdlrm
pd.h152540644editdlrm
pd_ado.h11910644editdlrm
pd_bdo.h5550644editdlrm
pd_ext_sdb.h6980644editdlrm
pd_vdo.h165540644editdlrm
phy.h84350644editdlrm
phy_companion.h11970644editdlrm
quirks.h24030644editdlrm
r8a66597.h180690644editdlrm
r8152.h10670644editdlrm
renesas_usbhs.h43030644editdlrm
rndis_host.h60800644editdlrm
role.h36630644editdlrm
serial.h175960644editdlrm
sl811.h8380644editdlrm
storage.h26450644editdlrm
tcpci.h68830644editdlrm
tcpm.h66140644editdlrm
tegra_usb_phy.h25860644editdlrm
typec.h95900644editdlrm
typec_altmode.h66390644editdlrm
typec_dp.h39980644editdlrm
typec_mux.h21150644editdlrm
typec_tbt.h17740644editdlrm
uas.h21210644editdlrm
ulpi.h23190644editdlrm
usb338x.h79770644editdlrm
usbnet.h108250644editdlrm
usb_phy_generic.h5820644editdlrm
xhci-dbgp.h8250644editdlrm
Edit: /usr/src/linux-headers-5.15.0-181/include/linux/usb/isp1362.h (1628B)
/* SPDX-License-Identifier: GPL-2.0 */ /* * board initialization code should put one of these into dev->platform_data * and place the isp1362 onto platform_bus. */ #ifndef __LINUX_USB_ISP1362_H__ #define __LINUX_USB_ISP1362_H__ struct isp1362_platform_data { /* Enable internal pulldown resistors on downstream ports */ unsigned sel15Kres:1; /* Clock cannot be stopped */ unsigned clknotstop:1; /* On-chip overcurrent protection */ unsigned oc_enable:1; /* INT output polarity */ unsigned int_act_high:1; /* INT edge or level triggered */ unsigned int_edge_triggered:1; /* DREQ output polarity */ unsigned dreq_act_high:1; /* DACK input polarity */ unsigned dack_act_high:1; /* chip can be resumed via H_WAKEUP pin */ unsigned remote_wakeup_connected:1; /* Switch or not to switch (keep always powered) */ unsigned no_power_switching:1; /* Ganged port power switching (0) or individual port power switching (1) */ unsigned power_switching_mode:1; /* Given port_power, msec/2 after power on till power good */ u8 potpg; /* Hardware reset set/clear */ void (*reset) (struct device *dev, int set); /* Clock start/stop */ void (*clock) (struct device *dev, int start); /* Inter-io delay (ns). The chip is picky about access timings; it * expects at least: * 110ns delay between consecutive accesses to DATA_REG, * 300ns delay between access to ADDR_REG and DATA_REG (registers) * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory) * WE MUST NOT be activated during these intervals (even without CS!) */ void (*delay) (struct device *dev, unsigned int delay); }; #endif