FM / debug

/usr/src/linux-headers-5.15.0-190/arch/arm/include/debug/

/usr/src/linux-headers-5.15.0-190/arch/arm/include/debug

Name	Size	Mode	Actions
8250.S	1068	0644	edit dl rm
asm9260.S	645	0644	edit dl rm
at91.S	1041	0644	edit dl rm
bcm63xx.S	643	0644	edit dl rm
brcmstb.S	5957	0644	edit dl rm
clps711x.S	767	0644	edit dl rm
dc21285.S	842	0644	edit dl rm
digicolor.S	648	0644	edit dl rm
exynos.S	1166	0644	edit dl rm
icedcc.S	1484	0644	edit dl rm
imx-uart.h	5422	0644	edit dl rm
imx.S	1206	0644	edit dl rm
meson.S	771	0644	edit dl rm
msm.S	1037	0644	edit dl rm
omap2plus.S	2092	0644	edit dl rm
palmchip.S	199	0644	edit dl rm
pl01x.S	896	0644	edit dl rm
renesas-scif.S	1074	0644	edit dl rm
s3c24xx.S	1070	0644	edit dl rm
s5pv210.S	891	0644	edit dl rm
sa1100.S	1681	0644	edit dl rm
samsung.S	1903	0644	edit dl rm
sti.S	1022	0644	edit dl rm
stm32.S	1162	0644	edit dl rm
tegra.S	6500	0644	edit dl rm
uncompress.h	222	0644	edit dl rm
ux500.S	1032	0644	edit dl rm
vexpress.S	1216	0644	edit dl rm
vf.S	923	0644	edit dl rm
vt8500.S	774	0644	edit dl rm
zynq.S	1277	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-190/arch/arm/include/debug/icedcc.S (1484B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *  arch/arm/include/debug/icedcc.S
 *
 *  Copyright (C) 1994-1999 Russell King
 */

@@ debug using ARM EmbeddedICE DCC channel

.macro	addruart, rp, rv, tmp
		.endm

#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)

.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c0, c5, 0
		.endm

.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c0, c1, 0
		tst	\rx, #0x20000000
		beq	1001b
		.endm

.macro	waituartcts, rd, rx
		.endm

.macro	waituarttxrdy, rd, rx
		mov	\rd, #0x2000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c0, c1, 0
		tst	\rx, #0x20000000
		bne	1001b
1002:
		.endm

#elif defined(CONFIG_CPU_XSCALE)

.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c8, c0, 0
		.endm

.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c14, c0, 0
		tst	\rx, #0x10000000
		beq	1001b
		.endm

.macro	waituartcts, rd, rx
		.endm

.macro	waituarttxrdy, rd, rx
		mov	\rd, #0x10000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c14, c0, 0
		tst	\rx, #0x10000000
		bne	1001b
1002:
		.endm

#else

.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c1, c0, 0
		.endm

.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c0, c0, 0
		tst	\rx, #2
		beq	1001b

.endm

.macro	waituartcts, rd, rx
		.endm

.macro	waituarttxrdy, rd, rx
		mov	\rd, #0x2000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c0, c0, 0
		tst	\rx, #2
		bne	1001b
1002:
		.endm

#endif	/* CONFIG_CPU_V6 */

/* SPDX-License-Identifier: GPL-2.0-only */ /* * arch/arm/include/debug/icedcc.S * * Copyright (C) 1994-1999 Russell King */ @@ debug using ARM EmbeddedICE DCC channel .macro addruart, rp, rv, tmp .endm #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) .macro senduart, rd, rx mcr p14, 0, \rd, c0, c5, 0 .endm .macro busyuart, rd, rx 1001: mrc p14, 0, \rx, c0, c1, 0 tst \rx, #0x20000000 beq 1001b .endm .macro waituartcts, rd, rx .endm .macro waituarttxrdy, rd, rx mov \rd, #0x2000000 1001: subs \rd, \rd, #1 bmi 1002f mrc p14, 0, \rx, c0, c1, 0 tst \rx, #0x20000000 bne 1001b 1002: .endm #elif defined(CONFIG_CPU_XSCALE) .macro senduart, rd, rx mcr p14, 0, \rd, c8, c0, 0 .endm .macro busyuart, rd, rx 1001: mrc p14, 0, \rx, c14, c0, 0 tst \rx, #0x10000000 beq 1001b .endm .macro waituartcts, rd, rx .endm .macro waituarttxrdy, rd, rx mov \rd, #0x10000000 1001: subs \rd, \rd, #1 bmi 1002f mrc p14, 0, \rx, c14, c0, 0 tst \rx, #0x10000000 bne 1001b 1002: .endm #else .macro senduart, rd, rx mcr p14, 0, \rd, c1, c0, 0 .endm .macro busyuart, rd, rx 1001: mrc p14, 0, \rx, c0, c0, 0 tst \rx, #2 beq 1001b .endm .macro waituartcts, rd, rx .endm .macro waituarttxrdy, rd, rx mov \rd, #0x2000000 1001: subs \rd, \rd, #1 bmi 1002f mrc p14, 0, \rx, c0, c0, 0 tst \rx, #2 bne 1001b 1002: .endm #endif /* CONFIG_CPU_V6 */