/usr/src/linux-headers-5.15.0-190/arch/arm64/include/asm
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vdso/-0755rm
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acenv.h3950644editdlrm
acpi.h49420644editdlrm
alternative-macros.h55370644editdlrm
alternative.h10130644editdlrm
archrandom.h31210644editdlrm
arch_gicv3.h40550644editdlrm
arch_timer.h46310644editdlrm
arm-cci.h2540644editdlrm
arm_dsu_pmu.h30070644editdlrm
asm-bug.h9520644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h9580644editdlrm
asm-uaccess.h22960644editdlrm
asm_pointer_auth.h24320644editdlrm
assembler.h211640644editdlrm
atomic.h86180644editdlrm
atomic_ll_sc.h102540644editdlrm
atomic_lse.h112330644editdlrm
barrier.h54290644editdlrm
bitops.h8500644editdlrm
bitrev.h4520644editdlrm
boot.h3690644editdlrm
brk-imm.h8890644editdlrm
bug.h5720644editdlrm
cache.h32480644editdlrm
cacheflush.h48730644editdlrm
checksum.h10880644editdlrm
clocksource.h1360644editdlrm
cmpxchg.h80570644editdlrm
compat.h39190644editdlrm
compiler.h13090644editdlrm
cpu.h15200644editdlrm
cpufeature.h290010644editdlrm
cpuidle.h13300644editdlrm
cputype.h118040644editdlrm
cpu_ops.h24090644editdlrm
current.h5170644editdlrm
daifflags.h35330644editdlrm
dcc.h9810644editdlrm
debug-monitors.h32840644editdlrm
device.h1890644editdlrm
dmi.h8500644editdlrm
efi.h44940644editdlrm
el2_setup.h53630644editdlrm
elf.h81960644editdlrm
esr.h125490644editdlrm
exception.h30150644editdlrm
exec.h2780644editdlrm
extable.h11270644editdlrm
fb.h4600644editdlrm
fixmap.h30990644editdlrm
fpsimd.h54900644editdlrm
fpsimdmacros.h60040644editdlrm
ftrace.h29620644editdlrm
futex.h29530644editdlrm
hardirq.h23350644editdlrm
hugetlb.h19200644editdlrm
hwcap.h52070644editdlrm
hw_breakpoint.h40910644editdlrm
hyperv-tlfs.h20770644editdlrm
hypervisor.h2280644editdlrm
hyp_image.h19110644editdlrm
image.h15090644editdlrm
insn-def.h5710644editdlrm
insn.h218840644editdlrm
io.h66310644editdlrm
irq.h3950644editdlrm
irqflags.h29330644editdlrm
irq_work.h1920644editdlrm
jump_label.h11950644editdlrm
kasan.h15680644editdlrm
Kbuild1860644editdlrm
kernel-pgtable.h50230644editdlrm
kexec.h27950644editdlrm
kfence.h4100644editdlrm
kgdb.h33460644editdlrm
kprobes.h10630644editdlrm
kvm_arm.h126190644editdlrm
kvm_asm.h99210644editdlrm
kvm_emulate.h124620644editdlrm
kvm_host.h259120644editdlrm
kvm_hyp.h43890644editdlrm
kvm_mmu.h88740644editdlrm
kvm_mte.h13780644editdlrm
kvm_pgtable.h196760644editdlrm
kvm_ptrauth.h35430644editdlrm
kvm_ras.h6030644editdlrm
kvm_types.h1850644editdlrm
linkage.h17510644editdlrm
lse.h12670644editdlrm
memory.h118380644editdlrm
mman.h26990644editdlrm
mmu.h24760644editdlrm
mmu_context.h69440644editdlrm
mmzone.h2660644editdlrm
module.h18100644editdlrm
module.lds.h6460644editdlrm
mshyperv.h13870644editdlrm
mte-def.h5050644editdlrm
mte-kasan.h36400644editdlrm
mte.h34260644editdlrm
neon-intrinsics.h9590644editdlrm
neon.h3850644editdlrm
numa.h1650644editdlrm
page-def.h4410644editdlrm
page.h13650644editdlrm
paravirt.h5800644editdlrm
patching.h3700644editdlrm
pci.h7640644editdlrm
percpu.h81750644editdlrm
perf_event.h107850644editdlrm
pgalloc.h22690644editdlrm
pgtable-hwdef.h101670644editdlrm
pgtable-prot.h43020644editdlrm
pgtable-types.h13050644editdlrm
pgtable.h299650644editdlrm
pointer_auth.h46510644editdlrm
preempt.h23660644editdlrm
probes.h6500644editdlrm
proc-fns.h5620644editdlrm
processor.h100020644editdlrm
ptdump.h8890644editdlrm
ptrace.h105390644editdlrm
pvclock-abi.h3740644editdlrm
rwonce.h20120644editdlrm
scs.h4970644editdlrm
sdei.h19670644editdlrm
seccomp.h8700644editdlrm
sections.h10990644editdlrm
setup.h1950644editdlrm
set_memory.h4870644editdlrm
shmparam.h4250644editdlrm
signal.h6500644editdlrm
signal32.h19800644editdlrm
simd.h14880644editdlrm
smp.h39550644editdlrm
smp_plat.h8240644editdlrm
sparsemem.h6820644editdlrm
spectre.h30000644editdlrm
spinlock.h6010644editdlrm
spinlock_types.h3600644editdlrm
stackprotector.h13590644editdlrm
stacktrace.h43140644editdlrm
stack_pointer.h2470644editdlrm
stage2_pgtable.h10580644editdlrm
stat.h9470644editdlrm
string.h19720644editdlrm
suspend.h16940644editdlrm
sync_bitops.h10850644editdlrm
syscall.h21460644editdlrm
syscall_wrapper.h31200644editdlrm
sysreg.h457730644editdlrm
system_misc.h8800644editdlrm
thread_info.h38870644editdlrm
timex.h3430644editdlrm
tlb.h23320644editdlrm
tlbflush.h118910644editdlrm
topology.h12030644editdlrm
trans_pgd.h10360644editdlrm
traps.h29090644editdlrm
uaccess.h137180644editdlrm
unistd.h13610644editdlrm
unistd32.h315680644editdlrm
uprobes.h5790644editdlrm
vdso.h6310644editdlrm
vectors.h17750644editdlrm
vermagic.h2000644editdlrm
virt.h35690644editdlrm
vmalloc.h6940644editdlrm
vmap_stack.h7030644editdlrm
word-at-a-time.h17970644editdlrm
xor.h16680644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/arm64/include/asm/cmpxchg.h (8057B)
/* SPDX-License-Identifier: GPL-2.0-only */ /* * Based on arch/arm/include/asm/cmpxchg.h * * Copyright (C) 2012 ARM Ltd. */ #ifndef __ASM_CMPXCHG_H #define __ASM_CMPXCHG_H #include #include #include #include /* * We need separate acquire parameters for ll/sc and lse, since the full * barrier case is generated as release+dmb for the former and * acquire+release for the latter. */ #define __XCHG_CASE(w, sfx, name, sz, mb, nop_lse, acq, acq_lse, rel, cl) \ static inline u##sz __xchg_case_##name##sz(u##sz x, volatile void *ptr) \ { \ u##sz ret; \ unsigned long tmp; \ \ asm volatile(ARM64_LSE_ATOMIC_INSN( \ /* LL/SC */ \ " prfm pstl1strm, %2\n" \ "1: ld" #acq "xr" #sfx "\t%" #w "0, %2\n" \ " st" #rel "xr" #sfx "\t%w1, %" #w "3, %2\n" \ " cbnz %w1, 1b\n" \ " " #mb, \ /* LSE atomics */ \ " swp" #acq_lse #rel #sfx "\t%" #w "3, %" #w "0, %2\n" \ __nops(3) \ " " #nop_lse) \ : "=&r" (ret), "=&r" (tmp), "+Q" (*(u##sz *)ptr) \ : "r" (x) \ : cl); \ \ return ret; \ } __XCHG_CASE(w, b, , 8, , , , , , ) __XCHG_CASE(w, h, , 16, , , , , , ) __XCHG_CASE(w, , , 32, , , , , , ) __XCHG_CASE( , , , 64, , , , , , ) __XCHG_CASE(w, b, acq_, 8, , , a, a, , "memory") __XCHG_CASE(w, h, acq_, 16, , , a, a, , "memory") __XCHG_CASE(w, , acq_, 32, , , a, a, , "memory") __XCHG_CASE( , , acq_, 64, , , a, a, , "memory") __XCHG_CASE(w, b, rel_, 8, , , , , l, "memory") __XCHG_CASE(w, h, rel_, 16, , , , , l, "memory") __XCHG_CASE(w, , rel_, 32, , , , , l, "memory") __XCHG_CASE( , , rel_, 64, , , , , l, "memory") __XCHG_CASE(w, b, mb_, 8, dmb ish, nop, , a, l, "memory") __XCHG_CASE(w, h, mb_, 16, dmb ish, nop, , a, l, "memory") __XCHG_CASE(w, , mb_, 32, dmb ish, nop, , a, l, "memory") __XCHG_CASE( , , mb_, 64, dmb ish, nop, , a, l, "memory") #undef __XCHG_CASE #define __XCHG_GEN(sfx) \ static __always_inline unsigned long __xchg##sfx(unsigned long x, \ volatile void *ptr, \ int size) \ { \ switch (size) { \ case 1: \ return __xchg_case##sfx##_8(x, ptr); \ case 2: \ return __xchg_case##sfx##_16(x, ptr); \ case 4: \ return __xchg_case##sfx##_32(x, ptr); \ case 8: \ return __xchg_case##sfx##_64(x, ptr); \ default: \ BUILD_BUG(); \ } \ \ unreachable(); \ } __XCHG_GEN() __XCHG_GEN(_acq) __XCHG_GEN(_rel) __XCHG_GEN(_mb) #undef __XCHG_GEN #define __xchg_wrapper(sfx, ptr, x) \ ({ \ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ __xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \ __ret; \ }) /* xchg */ #define arch_xchg_relaxed(...) __xchg_wrapper( , __VA_ARGS__) #define arch_xchg_acquire(...) __xchg_wrapper(_acq, __VA_ARGS__) #define arch_xchg_release(...) __xchg_wrapper(_rel, __VA_ARGS__) #define arch_xchg(...) __xchg_wrapper( _mb, __VA_ARGS__) #define __CMPXCHG_CASE(name, sz) \ static inline u##sz __cmpxchg_case_##name##sz(volatile void *ptr, \ u##sz old, \ u##sz new) \ { \ return __lse_ll_sc_body(_cmpxchg_case_##name##sz, \ ptr, old, new); \ } __CMPXCHG_CASE( , 8) __CMPXCHG_CASE( , 16) __CMPXCHG_CASE( , 32) __CMPXCHG_CASE( , 64) __CMPXCHG_CASE(acq_, 8) __CMPXCHG_CASE(acq_, 16) __CMPXCHG_CASE(acq_, 32) __CMPXCHG_CASE(acq_, 64) __CMPXCHG_CASE(rel_, 8) __CMPXCHG_CASE(rel_, 16) __CMPXCHG_CASE(rel_, 32) __CMPXCHG_CASE(rel_, 64) __CMPXCHG_CASE(mb_, 8) __CMPXCHG_CASE(mb_, 16) __CMPXCHG_CASE(mb_, 32) __CMPXCHG_CASE(mb_, 64) #undef __CMPXCHG_CASE #define __CMPXCHG_DBL(name) \ static inline long __cmpxchg_double##name(unsigned long old1, \ unsigned long old2, \ unsigned long new1, \ unsigned long new2, \ volatile void *ptr) \ { \ return __lse_ll_sc_body(_cmpxchg_double##name, \ old1, old2, new1, new2, ptr); \ } __CMPXCHG_DBL( ) __CMPXCHG_DBL(_mb) #undef __CMPXCHG_DBL #define __CMPXCHG_GEN(sfx) \ static __always_inline unsigned long __cmpxchg##sfx(volatile void *ptr, \ unsigned long old, \ unsigned long new, \ int size) \ { \ switch (size) { \ case 1: \ return __cmpxchg_case##sfx##_8(ptr, old, new); \ case 2: \ return __cmpxchg_case##sfx##_16(ptr, old, new); \ case 4: \ return __cmpxchg_case##sfx##_32(ptr, old, new); \ case 8: \ return __cmpxchg_case##sfx##_64(ptr, old, new); \ default: \ BUILD_BUG(); \ } \ \ unreachable(); \ } __CMPXCHG_GEN() __CMPXCHG_GEN(_acq) __CMPXCHG_GEN(_rel) __CMPXCHG_GEN(_mb) #undef __CMPXCHG_GEN #define __cmpxchg_wrapper(sfx, ptr, o, n) \ ({ \ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ __cmpxchg##sfx((ptr), (unsigned long)(o), \ (unsigned long)(n), sizeof(*(ptr))); \ __ret; \ }) /* cmpxchg */ #define arch_cmpxchg_relaxed(...) __cmpxchg_wrapper( , __VA_ARGS__) #define arch_cmpxchg_acquire(...) __cmpxchg_wrapper(_acq, __VA_ARGS__) #define arch_cmpxchg_release(...) __cmpxchg_wrapper(_rel, __VA_ARGS__) #define arch_cmpxchg(...) __cmpxchg_wrapper( _mb, __VA_ARGS__) #define arch_cmpxchg_local arch_cmpxchg_relaxed /* cmpxchg64 */ #define arch_cmpxchg64_relaxed arch_cmpxchg_relaxed #define arch_cmpxchg64_acquire arch_cmpxchg_acquire #define arch_cmpxchg64_release arch_cmpxchg_release #define arch_cmpxchg64 arch_cmpxchg #define arch_cmpxchg64_local arch_cmpxchg_local /* cmpxchg_double */ #define system_has_cmpxchg_double() 1 #define __cmpxchg_double_check(ptr1, ptr2) \ ({ \ if (sizeof(*(ptr1)) != 8) \ BUILD_BUG(); \ VM_BUG_ON((unsigned long *)(ptr2) - (unsigned long *)(ptr1) != 1); \ }) #define arch_cmpxchg_double(ptr1, ptr2, o1, o2, n1, n2) \ ({ \ int __ret; \ __cmpxchg_double_check(ptr1, ptr2); \ __ret = !__cmpxchg_double_mb((unsigned long)(o1), (unsigned long)(o2), \ (unsigned long)(n1), (unsigned long)(n2), \ ptr1); \ __ret; \ }) #define arch_cmpxchg_double_local(ptr1, ptr2, o1, o2, n1, n2) \ ({ \ int __ret; \ __cmpxchg_double_check(ptr1, ptr2); \ __ret = !__cmpxchg_double((unsigned long)(o1), (unsigned long)(o2), \ (unsigned long)(n1), (unsigned long)(n2), \ ptr1); \ __ret; \ }) #define __CMPWAIT_CASE(w, sfx, sz) \ static inline void __cmpwait_case_##sz(volatile void *ptr, \ unsigned long val) \ { \ unsigned long tmp; \ \ asm volatile( \ " sevl\n" \ " wfe\n" \ " ldxr" #sfx "\t%" #w "[tmp], %[v]\n" \ " eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \ " cbnz %" #w "[tmp], 1f\n" \ " wfe\n" \ "1:" \ : [tmp] "=&r" (tmp), [v] "+Q" (*(unsigned long *)ptr) \ : [val] "r" (val)); \ } __CMPWAIT_CASE(w, b, 8); __CMPWAIT_CASE(w, h, 16); __CMPWAIT_CASE(w, , 32); __CMPWAIT_CASE( , , 64); #undef __CMPWAIT_CASE #define __CMPWAIT_GEN(sfx) \ static __always_inline void __cmpwait##sfx(volatile void *ptr, \ unsigned long val, \ int size) \ { \ switch (size) { \ case 1: \ return __cmpwait_case##sfx##_8(ptr, (u8)val); \ case 2: \ return __cmpwait_case##sfx##_16(ptr, (u16)val); \ case 4: \ return __cmpwait_case##sfx##_32(ptr, val); \ case 8: \ return __cmpwait_case##sfx##_64(ptr, val); \ default: \ BUILD_BUG(); \ } \ \ unreachable(); \ } __CMPWAIT_GEN() #undef __CMPWAIT_GEN #define __cmpwait_relaxed(ptr, val) \ __cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr))) #endif /* __ASM_CMPXCHG_H */