/usr/src/linux-headers-5.15.0-190/arch/hexagon/include/asm
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asm-offsets.h350644editdlrm
atomic.h43610644editdlrm
bitops.h61520644editdlrm
cache.h5550644editdlrm
cacheflush.h27250644editdlrm
checksum.h6850644editdlrm
cmpxchg.h20030644editdlrm
delay.h3440644editdlrm
dma.h3000644editdlrm
elf.h57580644editdlrm
exec.h3980644editdlrm
fixmap.h3690644editdlrm
fpu.h900644editdlrm
futex.h23060644editdlrm
hexagon_vm.h59090644editdlrm
intrinsics.h3690644editdlrm
io.h62640644editdlrm
irq.h5230644editdlrm
irqflags.h8600644editdlrm
Kbuild1310644editdlrm
kgdb.h7540644editdlrm
linkage.h2370644editdlrm
mem-layout.h28650644editdlrm
mmu.h4900644editdlrm
mmu_context.h15440644editdlrm
page.h41790644editdlrm
perf_event.h2070644editdlrm
pgalloc.h27090644editdlrm
pgtable.h119520644editdlrm
processor.h31730644editdlrm
smp.h7070644editdlrm
spinlock.h32950644editdlrm
spinlock_types.h5450644editdlrm
string.h4720644editdlrm
suspend.h2380644editdlrm
switch_to.h4780644editdlrm
syscall.h11700644editdlrm
syscalls.h2040644editdlrm
thread_info.h35050644editdlrm
time.h3460644editdlrm
timex.h4950644editdlrm
tlb.h2530644editdlrm
tlbflush.h14970644editdlrm
traps.h4100644editdlrm
uaccess.h18700644editdlrm
vdso.h3070644editdlrm
vermagic.h2990644editdlrm
vmalloc.h990644editdlrm
vm_fault.h3590644editdlrm
vm_mmu.h28180644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/hexagon/include/asm/pgalloc.h (2709B)
/* SPDX-License-Identifier: GPL-2.0-only */ /* * Page table support for the Hexagon architecture * * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. */ #ifndef _ASM_PGALLOC_H #define _ASM_PGALLOC_H #include #include #include extern unsigned long long kmap_generation; /* * Page table creation interface */ static inline pgd_t *pgd_alloc(struct mm_struct *mm) { pgd_t *pgd; pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); /* * There may be better ways to do this, but to ensure * that new address spaces always contain the kernel * base mapping, and to ensure that the user area is * initially marked invalid, initialize the new map * map with a copy of the kernel's persistent map. */ memcpy(pgd, swapper_pg_dir, PTRS_PER_PGD*sizeof(pgd_t)); mm->context.generation = kmap_generation; /* Physical version is what is passed to virtual machine on switch */ mm->context.ptbase = __pa(pgd); return pgd; } static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, pgtable_t pte) { /* * Conveniently, zero in 3 LSB means indirect 4K page table. * Not so convenient when you're trying to vary the page size. */ set_pmd(pmd, __pmd(((unsigned long)page_to_pfn(pte) << PAGE_SHIFT) | HEXAGON_L1_PTE_SIZE)); } /* * Other architectures seem to have ways of making all processes * share the same pmd's for their kernel mappings, but the v0.3 * Hexagon VM spec has a "monolithic" L1 table for user and kernel * segments. We track "generations" of the kernel map to minimize * overhead, and update the "slave" copies of the kernel mappings * as part of switch_mm. However, we still need to update the * kernel map of the active thread who's calling pmd_populate_kernel... */ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte) { extern spinlock_t kmap_gen_lock; pmd_t *ppmd; int pmdindex; spin_lock(&kmap_gen_lock); kmap_generation++; mm->context.generation = kmap_generation; current->active_mm->context.generation = kmap_generation; spin_unlock(&kmap_gen_lock); set_pmd(pmd, __pmd(((unsigned long)__pa(pte)) | HEXAGON_L1_PTE_SIZE)); /* * Now the "slave" copy of the current thread. * This is pointer arithmetic, not byte addresses! */ pmdindex = (pgd_t *)pmd - mm->pgd; ppmd = (pmd_t *)current->active_mm->pgd + pmdindex; set_pmd(ppmd, __pmd(((unsigned long)__pa(pte)) | HEXAGON_L1_PTE_SIZE)); if (pmdindex > max_kernel_seg) max_kernel_seg = pmdindex; } #define __pte_free_tlb(tlb, pte, addr) \ do { \ pgtable_pte_page_dtor((pte)); \ tlb_remove_page((tlb), (pte)); \ } while (0) #endif