/usr/src/linux-headers-5.15.0-190/arch/m68k/include/asm
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adb_iop.h11880644editdlrm
amigahw.h107370644editdlrm
amigaints.h35830644editdlrm
amigayle.h32710644editdlrm
amipcmcia.h25680644editdlrm
apollohw.h24100644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h2110644editdlrm
atarihw.h209190644editdlrm
atariints.h56910644editdlrm
atarikb.h14340644editdlrm
atari_joystick.h4570644editdlrm
atari_stdma.h5140644editdlrm
atari_stram.h5280644editdlrm
atomic.h50160644editdlrm
bitops.h128270644editdlrm
blinken.h6410644editdlrm
bootinfo.h7830644editdlrm
bootstd.h47470644editdlrm
bug.h6590644editdlrm
bvme6000hw.h35290644editdlrm
cache.h2960644editdlrm
cacheflush.h1330644editdlrm
cacheflush_mm.h71730644editdlrm
cacheflush_no.h18840644editdlrm
checksum.h34970644editdlrm
cmpxchg.h31890644editdlrm
coldfire.h16530644editdlrm
contregs.h33900644editdlrm
current.h5800644editdlrm
delay.h35040644editdlrm
div64.h8580644editdlrm
dma.h170400644editdlrm
dsp56k.h12690644editdlrm
dvma.h99030644editdlrm
elf.h31450644editdlrm
entry.h59020644editdlrm
export.h530644editdlrm
fb.h9210644editdlrm
fbio.h101060644editdlrm
flat.h3330644editdlrm
floppy.h53300644editdlrm
fpu.h5350644editdlrm
ftrace.h120644editdlrm
gpio.h22940644editdlrm
hash.h21150644editdlrm
hp300hw.h1860644editdlrm
hwtest.h4670644editdlrm
ide.h17080644editdlrm
idprom.h7250644editdlrm
intersil.h11340644editdlrm
io.h2440644editdlrm
io_mm.h131980644editdlrm
io_no.h41960644editdlrm
irq.h26340644editdlrm
irqflags.h16520644editdlrm
Kbuild1650644editdlrm
kexec.h7320644editdlrm
kmap.h17540644editdlrm
linkage.h15830644editdlrm
m52xxacr.h36600644editdlrm
m53xxacr.h36830644editdlrm
m53xxsim.h552620644editdlrm
m54xxacr.h49340644editdlrm
m54xxgpt.h37500644editdlrm
m54xxpci.h62760644editdlrm
m54xxsim.h38920644editdlrm
m520xsim.h73230644editdlrm
m523xsim.h78820644editdlrm
m525xsim.h108220644editdlrm
m527xsim.h138350644editdlrm
m528xsim.h95990644editdlrm
m5206sim.h65550644editdlrm
m5272sim.h61990644editdlrm
m5307sim.h76980644editdlrm
m5407sim.h62890644editdlrm
m5441xsim.h102940644editdlrm
machdep.h13310644editdlrm
machines.h32090644editdlrm
machw.h5880644editdlrm
macintosh.h24380644editdlrm
macints.h32100644editdlrm
mac_asc.h5200644editdlrm
mac_baboon.h9990644editdlrm
mac_iop.h54990644editdlrm
mac_oss.h18730644editdlrm
mac_psc.h74270644editdlrm
mac_via.h117180644editdlrm
math-emu.h68970644editdlrm
MC68EZ328.h386500644editdlrm
MC68VZ328.h420060644editdlrm
MC68328.h387240644editdlrm
mc146818rtc.h5980644editdlrm
mcf8390.h38440644editdlrm
mcfclk.h9610644editdlrm
mcfdma.h66620644editdlrm
mcfgpio.h82690644editdlrm
mcfintc.h31610644editdlrm
mcfmmu.h37610644editdlrm
mcfpit.h22780644editdlrm
mcfqspi.h14660644editdlrm
mcfsim.h15310644editdlrm
mcfslt.h12400644editdlrm
mcftimer.h23570644editdlrm
mcfuart.h70760644editdlrm
mcfwdebug.h51060644editdlrm
mcf_pgalloc.h20000644editdlrm
mcf_pgtable.h83120644editdlrm
mmu.h2430644editdlrm
mmu_context.h72070644editdlrm
module.h8470644editdlrm
module.lds.h910644editdlrm
motorola_pgalloc.h21460644editdlrm
motorola_pgtable.h76100644editdlrm
movs.h14720644editdlrm
mvme16xhw.h22160644editdlrm
mvme147hw.h29380644editdlrm
natfeat.h5330644editdlrm
nettel.h30230644editdlrm
nubus.h12620644editdlrm
openprom.h81730644editdlrm
oplib.h97680644editdlrm
page.h17280644editdlrm
page_mm.h33990644editdlrm
page_no.h13220644editdlrm
page_offset.h2560644editdlrm
parport.h8370644editdlrm
pci.h2580644editdlrm
pgalloc.h4440644editdlrm
pgtable.h1270644editdlrm
pgtable_mm.h49310644editdlrm
pgtable_no.h14380644editdlrm
processor.h41580644editdlrm
ptrace.h6430644editdlrm
q40ints.h7490644editdlrm
q40_master.h23570644editdlrm
quicc_simple.h18300644editdlrm
raw_io.h120030644editdlrm
serial.h11650644editdlrm
setup.h94670644editdlrm
signal.h13770644editdlrm
smp.h320644editdlrm
string.h17170644editdlrm
sun3-head.h3530644editdlrm
sun3ints.h9890644editdlrm
sun3mmu.h50250644editdlrm
sun3x.h8680644editdlrm
sun3xflop.h57570644editdlrm
sun3xprom.h13430644editdlrm
sun3_pgalloc.h12670644editdlrm
sun3_pgtable.h65830644editdlrm
switch_to.h15490644editdlrm
syscall.h2510644editdlrm
thread_info.h22370644editdlrm
timex.h9740644editdlrm
tlb.h1350644editdlrm
tlbflush.h59890644editdlrm
traps.h86150644editdlrm
uaccess.h125630644editdlrm
ucontext.h5700644editdlrm
unistd.h9930644editdlrm
user.h38740644editdlrm
vga.h9020644editdlrm
virtconvert.h8340644editdlrm
vmalloc.h900644editdlrm
zorro.h12220644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/m68k/include/asm/bitops.h (12827B)
#ifndef _M68K_BITOPS_H #define _M68K_BITOPS_H /* * Copyright 1992, Linus Torvalds. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ #ifndef _LINUX_BITOPS_H #error only can be included directly #endif #include #include /* * Bit access functions vary across the ColdFire and 68k families. * So we will break them out here, and then macro in the ones we want. * * ColdFire - supports standard bset/bclr/bchg with register operand only * 68000 - supports standard bset/bclr/bchg with memory operand * >= 68020 - also supports the bfset/bfclr/bfchg instructions * * Although it is possible to use only the bset/bclr/bchg with register * operands on all platforms you end up with larger generated code. * So we use the best form possible on a given platform. */ static inline void bset_reg_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bset %1,(%0)" : : "a" (p), "di" (nr & 7) : "memory"); } static inline void bset_mem_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bset %1,%0" : "+m" (*p) : "di" (nr & 7)); } static inline void bfset_mem_set_bit(int nr, volatile unsigned long *vaddr) { __asm__ __volatile__ ("bfset %1{%0:#1}" : : "d" (nr ^ 31), "o" (*vaddr) : "memory"); } #if defined(CONFIG_COLDFIRE) #define set_bit(nr, vaddr) bset_reg_set_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define set_bit(nr, vaddr) bset_mem_set_bit(nr, vaddr) #else #define set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bset_mem_set_bit(nr, vaddr) : \ bfset_mem_set_bit(nr, vaddr)) #endif #define __set_bit(nr, vaddr) set_bit(nr, vaddr) static inline void bclr_reg_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bclr %1,(%0)" : : "a" (p), "di" (nr & 7) : "memory"); } static inline void bclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bclr %1,%0" : "+m" (*p) : "di" (nr & 7)); } static inline void bfclr_mem_clear_bit(int nr, volatile unsigned long *vaddr) { __asm__ __volatile__ ("bfclr %1{%0:#1}" : : "d" (nr ^ 31), "o" (*vaddr) : "memory"); } #if defined(CONFIG_COLDFIRE) #define clear_bit(nr, vaddr) bclr_reg_clear_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define clear_bit(nr, vaddr) bclr_mem_clear_bit(nr, vaddr) #else #define clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bclr_mem_clear_bit(nr, vaddr) : \ bfclr_mem_clear_bit(nr, vaddr)) #endif #define __clear_bit(nr, vaddr) clear_bit(nr, vaddr) static inline void bchg_reg_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bchg %1,(%0)" : : "a" (p), "di" (nr & 7) : "memory"); } static inline void bchg_mem_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; __asm__ __volatile__ ("bchg %1,%0" : "+m" (*p) : "di" (nr & 7)); } static inline void bfchg_mem_change_bit(int nr, volatile unsigned long *vaddr) { __asm__ __volatile__ ("bfchg %1{%0:#1}" : : "d" (nr ^ 31), "o" (*vaddr) : "memory"); } #if defined(CONFIG_COLDFIRE) #define change_bit(nr, vaddr) bchg_reg_change_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define change_bit(nr, vaddr) bchg_mem_change_bit(nr, vaddr) #else #define change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bchg_mem_change_bit(nr, vaddr) : \ bfchg_mem_change_bit(nr, vaddr)) #endif #define __change_bit(nr, vaddr) change_bit(nr, vaddr) static inline int test_bit(int nr, const volatile unsigned long *vaddr) { return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0; } static inline int bset_reg_test_and_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bset %2,(%1); sne %0" : "=d" (retval) : "a" (p), "di" (nr & 7) : "memory"); return retval; } static inline int bset_mem_test_and_set_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bset %2,%1; sne %0" : "=d" (retval), "+m" (*p) : "di" (nr & 7)); return retval; } static inline int bfset_mem_test_and_set_bit(int nr, volatile unsigned long *vaddr) { char retval; __asm__ __volatile__ ("bfset %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr ^ 31), "o" (*vaddr) : "memory"); return retval; } #if defined(CONFIG_COLDFIRE) #define test_and_set_bit(nr, vaddr) bset_reg_test_and_set_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define test_and_set_bit(nr, vaddr) bset_mem_test_and_set_bit(nr, vaddr) #else #define test_and_set_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bset_mem_test_and_set_bit(nr, vaddr) : \ bfset_mem_test_and_set_bit(nr, vaddr)) #endif #define __test_and_set_bit(nr, vaddr) test_and_set_bit(nr, vaddr) static inline int bclr_reg_test_and_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bclr %2,(%1); sne %0" : "=d" (retval) : "a" (p), "di" (nr & 7) : "memory"); return retval; } static inline int bclr_mem_test_and_clear_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bclr %2,%1; sne %0" : "=d" (retval), "+m" (*p) : "di" (nr & 7)); return retval; } static inline int bfclr_mem_test_and_clear_bit(int nr, volatile unsigned long *vaddr) { char retval; __asm__ __volatile__ ("bfclr %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr ^ 31), "o" (*vaddr) : "memory"); return retval; } #if defined(CONFIG_COLDFIRE) #define test_and_clear_bit(nr, vaddr) bclr_reg_test_and_clear_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define test_and_clear_bit(nr, vaddr) bclr_mem_test_and_clear_bit(nr, vaddr) #else #define test_and_clear_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bclr_mem_test_and_clear_bit(nr, vaddr) : \ bfclr_mem_test_and_clear_bit(nr, vaddr)) #endif #define __test_and_clear_bit(nr, vaddr) test_and_clear_bit(nr, vaddr) static inline int bchg_reg_test_and_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bchg %2,(%1); sne %0" : "=d" (retval) : "a" (p), "di" (nr & 7) : "memory"); return retval; } static inline int bchg_mem_test_and_change_bit(int nr, volatile unsigned long *vaddr) { char *p = (char *)vaddr + (nr ^ 31) / 8; char retval; __asm__ __volatile__ ("bchg %2,%1; sne %0" : "=d" (retval), "+m" (*p) : "di" (nr & 7)); return retval; } static inline int bfchg_mem_test_and_change_bit(int nr, volatile unsigned long *vaddr) { char retval; __asm__ __volatile__ ("bfchg %2{%1:#1}; sne %0" : "=d" (retval) : "d" (nr ^ 31), "o" (*vaddr) : "memory"); return retval; } #if defined(CONFIG_COLDFIRE) #define test_and_change_bit(nr, vaddr) bchg_reg_test_and_change_bit(nr, vaddr) #elif defined(CONFIG_CPU_HAS_NO_BITFIELDS) #define test_and_change_bit(nr, vaddr) bchg_mem_test_and_change_bit(nr, vaddr) #else #define test_and_change_bit(nr, vaddr) (__builtin_constant_p(nr) ? \ bchg_mem_test_and_change_bit(nr, vaddr) : \ bfchg_mem_test_and_change_bit(nr, vaddr)) #endif #define __test_and_change_bit(nr, vaddr) test_and_change_bit(nr, vaddr) /* * The true 68020 and more advanced processors support the "bfffo" * instruction for finding bits. ColdFire and simple 68000 parts * (including CPU32) do not support this. They simply use the generic * functions. */ #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) #include #else static inline unsigned long find_first_zero_bit(const unsigned long *vaddr, unsigned long size) { const unsigned long *p = vaddr; unsigned long res = 32; unsigned long words; unsigned long num; if (!size) return 0; words = (size + 31) >> 5; while (!(num = ~*p++)) { if (!--words) goto out; } __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); res ^= 31; out: res += ((long)p - (long)vaddr - 4) * 8; return res < size ? res : size; } #define find_first_zero_bit find_first_zero_bit static inline unsigned long find_next_zero_bit(const unsigned long *vaddr, unsigned long size, unsigned long offset) { const unsigned long *p = vaddr + (offset >> 5); int bit = offset & 31UL, res; if (offset >= size) return size; if (bit) { unsigned long num = ~*p++ & (~0UL << bit); offset -= bit; /* Look for zero in first longword */ __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); if (res < 32) { offset += res ^ 31; return offset < size ? offset : size; } offset += 32; if (offset >= size) return size; } /* No zero yet, search remaining full bytes for a zero */ return offset + find_first_zero_bit(p, size - offset); } #define find_next_zero_bit find_next_zero_bit static inline unsigned long find_first_bit(const unsigned long *vaddr, unsigned long size) { const unsigned long *p = vaddr; unsigned long res = 32; unsigned long words; unsigned long num; if (!size) return 0; words = (size + 31) >> 5; while (!(num = *p++)) { if (!--words) goto out; } __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); res ^= 31; out: res += ((long)p - (long)vaddr - 4) * 8; return res < size ? res : size; } #define find_first_bit find_first_bit static inline unsigned long find_next_bit(const unsigned long *vaddr, unsigned long size, unsigned long offset) { const unsigned long *p = vaddr + (offset >> 5); int bit = offset & 31UL, res; if (offset >= size) return size; if (bit) { unsigned long num = *p++ & (~0UL << bit); offset -= bit; /* Look for one in first longword */ __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (num & -num)); if (res < 32) { offset += res ^ 31; return offset < size ? offset : size; } offset += 32; if (offset >= size) return size; } /* No one yet, search remaining full bytes for a one */ return offset + find_first_bit(p, size - offset); } #define find_next_bit find_next_bit /* * ffz = Find First Zero in word. Undefined if no zero exists, * so code should check against ~0UL first.. */ static inline unsigned long ffz(unsigned long word) { int res; __asm__ __volatile__ ("bfffo %1{#0,#0},%0" : "=d" (res) : "d" (~word & -~word)); return res ^ 31; } #endif #ifdef __KERNEL__ #if defined(CONFIG_CPU_HAS_NO_BITFIELDS) /* * The newer ColdFire family members support a "bitrev" instruction * and we can use that to implement a fast ffs. Older Coldfire parts, * and normal 68000 parts don't have anything special, so we use the * generic functions for those. */ #if (defined(__mcfisaaplus__) || defined(__mcfisac__)) && \ !defined(CONFIG_M68000) && !defined(CONFIG_MCPU32) static inline unsigned long __ffs(unsigned long x) { __asm__ __volatile__ ("bitrev %0; ff1 %0" : "=d" (x) : "0" (x)); return x; } static inline int ffs(int x) { if (!x) return 0; return __ffs(x) + 1; } #else #include #include #endif #include #include #else /* * ffs: find first bit set. This is defined the same way as * the libc and compiler builtin ffs routines, therefore * differs in spirit from the above ffz (man ffs). */ static inline int ffs(int x) { int cnt; __asm__ ("bfffo %1{#0:#0},%0" : "=d" (cnt) : "dm" (x & -x)); return 32 - cnt; } static inline unsigned long __ffs(unsigned long x) { return ffs(x) - 1; } /* * fls: find last bit set. */ static inline int fls(unsigned int x) { int cnt; __asm__ ("bfffo %1{#0,#0},%0" : "=d" (cnt) : "dm" (x)); return 32 - cnt; } static inline int __fls(int x) { return fls(x) - 1; } #endif /* Simple test-and-set bit locks */ #define test_and_set_bit_lock test_and_set_bit #define clear_bit_unlock clear_bit #define __clear_bit_unlock clear_bit_unlock #include #include #include #include #include #endif /* __KERNEL__ */ #include #endif /* _M68K_BITOPS_H */