/usr/src/linux-headers-5.15.0-190/arch/m68k/include/asm
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adb_iop.h11880644editdlrm
amigahw.h107370644editdlrm
amigaints.h35830644editdlrm
amigayle.h32710644editdlrm
amipcmcia.h25680644editdlrm
apollohw.h24100644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h2110644editdlrm
atarihw.h209190644editdlrm
atariints.h56910644editdlrm
atarikb.h14340644editdlrm
atari_joystick.h4570644editdlrm
atari_stdma.h5140644editdlrm
atari_stram.h5280644editdlrm
atomic.h50160644editdlrm
bitops.h128270644editdlrm
blinken.h6410644editdlrm
bootinfo.h7830644editdlrm
bootstd.h47470644editdlrm
bug.h6590644editdlrm
bvme6000hw.h35290644editdlrm
cache.h2960644editdlrm
cacheflush.h1330644editdlrm
cacheflush_mm.h71730644editdlrm
cacheflush_no.h18840644editdlrm
checksum.h34970644editdlrm
cmpxchg.h31890644editdlrm
coldfire.h16530644editdlrm
contregs.h33900644editdlrm
current.h5800644editdlrm
delay.h35040644editdlrm
div64.h8580644editdlrm
dma.h170400644editdlrm
dsp56k.h12690644editdlrm
dvma.h99030644editdlrm
elf.h31450644editdlrm
entry.h59020644editdlrm
export.h530644editdlrm
fb.h9210644editdlrm
fbio.h101060644editdlrm
flat.h3330644editdlrm
floppy.h53300644editdlrm
fpu.h5350644editdlrm
ftrace.h120644editdlrm
gpio.h22940644editdlrm
hash.h21150644editdlrm
hp300hw.h1860644editdlrm
hwtest.h4670644editdlrm
ide.h17080644editdlrm
idprom.h7250644editdlrm
intersil.h11340644editdlrm
io.h2440644editdlrm
io_mm.h131980644editdlrm
io_no.h41960644editdlrm
irq.h26340644editdlrm
irqflags.h16520644editdlrm
Kbuild1650644editdlrm
kexec.h7320644editdlrm
kmap.h17540644editdlrm
linkage.h15830644editdlrm
m52xxacr.h36600644editdlrm
m53xxacr.h36830644editdlrm
m53xxsim.h552620644editdlrm
m54xxacr.h49340644editdlrm
m54xxgpt.h37500644editdlrm
m54xxpci.h62760644editdlrm
m54xxsim.h38920644editdlrm
m520xsim.h73230644editdlrm
m523xsim.h78820644editdlrm
m525xsim.h108220644editdlrm
m527xsim.h138350644editdlrm
m528xsim.h95990644editdlrm
m5206sim.h65550644editdlrm
m5272sim.h61990644editdlrm
m5307sim.h76980644editdlrm
m5407sim.h62890644editdlrm
m5441xsim.h102940644editdlrm
machdep.h13310644editdlrm
machines.h32090644editdlrm
machw.h5880644editdlrm
macintosh.h24380644editdlrm
macints.h32100644editdlrm
mac_asc.h5200644editdlrm
mac_baboon.h9990644editdlrm
mac_iop.h54990644editdlrm
mac_oss.h18730644editdlrm
mac_psc.h74270644editdlrm
mac_via.h117180644editdlrm
math-emu.h68970644editdlrm
MC68EZ328.h386500644editdlrm
MC68VZ328.h420060644editdlrm
MC68328.h387240644editdlrm
mc146818rtc.h5980644editdlrm
mcf8390.h38440644editdlrm
mcfclk.h9610644editdlrm
mcfdma.h66620644editdlrm
mcfgpio.h82690644editdlrm
mcfintc.h31610644editdlrm
mcfmmu.h37610644editdlrm
mcfpit.h22780644editdlrm
mcfqspi.h14660644editdlrm
mcfsim.h15310644editdlrm
mcfslt.h12400644editdlrm
mcftimer.h23570644editdlrm
mcfuart.h70760644editdlrm
mcfwdebug.h51060644editdlrm
mcf_pgalloc.h20000644editdlrm
mcf_pgtable.h83120644editdlrm
mmu.h2430644editdlrm
mmu_context.h72070644editdlrm
module.h8470644editdlrm
module.lds.h910644editdlrm
motorola_pgalloc.h21460644editdlrm
motorola_pgtable.h76100644editdlrm
movs.h14720644editdlrm
mvme16xhw.h22160644editdlrm
mvme147hw.h29380644editdlrm
natfeat.h5330644editdlrm
nettel.h30230644editdlrm
nubus.h12620644editdlrm
openprom.h81730644editdlrm
oplib.h97680644editdlrm
page.h17280644editdlrm
page_mm.h33990644editdlrm
page_no.h13220644editdlrm
page_offset.h2560644editdlrm
parport.h8370644editdlrm
pci.h2580644editdlrm
pgalloc.h4440644editdlrm
pgtable.h1270644editdlrm
pgtable_mm.h49310644editdlrm
pgtable_no.h14380644editdlrm
processor.h41580644editdlrm
ptrace.h6430644editdlrm
q40ints.h7490644editdlrm
q40_master.h23570644editdlrm
quicc_simple.h18300644editdlrm
raw_io.h120030644editdlrm
serial.h11650644editdlrm
setup.h94670644editdlrm
signal.h13770644editdlrm
smp.h320644editdlrm
string.h17170644editdlrm
sun3-head.h3530644editdlrm
sun3ints.h9890644editdlrm
sun3mmu.h50250644editdlrm
sun3x.h8680644editdlrm
sun3xflop.h57570644editdlrm
sun3xprom.h13430644editdlrm
sun3_pgalloc.h12670644editdlrm
sun3_pgtable.h65830644editdlrm
switch_to.h15490644editdlrm
syscall.h2510644editdlrm
thread_info.h22370644editdlrm
timex.h9740644editdlrm
tlb.h1350644editdlrm
tlbflush.h59890644editdlrm
traps.h86150644editdlrm
uaccess.h125630644editdlrm
ucontext.h5700644editdlrm
unistd.h9930644editdlrm
user.h38740644editdlrm
vga.h9020644editdlrm
virtconvert.h8340644editdlrm
vmalloc.h900644editdlrm
zorro.h12220644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/m68k/include/asm/io_no.h (4196B)
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _M68KNOMMU_IO_H #define _M68KNOMMU_IO_H /* * Convert a physical memory address into a IO memory address. * For us this is trivially a type cast. */ #define iomem(a) ((void __iomem *) (a)) /* * The non-MMU m68k and ColdFire IO and memory mapped hardware access * functions have always worked in CPU native endian. We need to define * that behavior here first before we include asm-generic/io.h. */ #define __raw_readb(addr) \ ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; }) #define __raw_readw(addr) \ ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; }) #define __raw_readl(addr) \ ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; }) #define __raw_writeb(b, addr) (void)((*(__force volatile u8 *) (addr)) = (b)) #define __raw_writew(b, addr) (void)((*(__force volatile u16 *) (addr)) = (b)) #define __raw_writel(b, addr) (void)((*(__force volatile u32 *) (addr)) = (b)) #if defined(CONFIG_COLDFIRE) /* * For ColdFire platforms we may need to do some extra checks for what * type of address range we are accessing. Include the ColdFire platform * definitions so we can figure out if need to do something special. */ #include #include #include #endif /* CONFIG_COLDFIRE */ #if defined(IOMEMBASE) /* * The ColdFire SoC internal peripherals are mapped into virtual address * space using the ACR registers of the cache control unit. This means we * are using a 1:1 physical:virtual mapping for them. We can quickly * determine if we are accessing an internal peripheral device given the * physical or vitrual address using the same range check. This check logic * applies just the same of there is no MMU but something like a PCI bus * is present. */ static int __cf_internalio(unsigned long addr) { return (addr >= IOMEMBASE) && (addr <= IOMEMBASE + IOMEMSIZE - 1); } static int cf_internalio(const volatile void __iomem *addr) { return __cf_internalio((unsigned long) addr); } /* * We need to treat built-in peripherals and bus based address ranges * differently. Local built-in peripherals (and the ColdFire SoC parts * have quite a lot of them) are always native endian - which is big * endian on m68k/ColdFire. Bus based address ranges, like the PCI bus, * are accessed little endian - so we need to byte swap those. */ #define readw readw static inline u16 readw(const volatile void __iomem *addr) { if (cf_internalio(addr)) return __raw_readw(addr); return swab16(__raw_readw(addr)); } #define readl readl static inline u32 readl(const volatile void __iomem *addr) { if (cf_internalio(addr)) return __raw_readl(addr); return swab32(__raw_readl(addr)); } #define writew writew static inline void writew(u16 value, volatile void __iomem *addr) { if (cf_internalio(addr)) __raw_writew(value, addr); else __raw_writew(swab16(value), addr); } #define writel writel static inline void writel(u32 value, volatile void __iomem *addr) { if (cf_internalio(addr)) __raw_writel(value, addr); else __raw_writel(swab32(value), addr); } #else #define readb __raw_readb #define readw __raw_readw #define readl __raw_readl #define writeb __raw_writeb #define writew __raw_writew #define writel __raw_writel #endif /* IOMEMBASE */ #if defined(CONFIG_PCI) /* * Support for PCI bus access uses the asm-generic access functions. * We need to supply the base address and masks for the normal memory * and IO address space mappings. */ #define PCI_MEM_PA 0xf0000000 /* Host physical address */ #define PCI_MEM_BA 0xf0000000 /* Bus physical address */ #define PCI_MEM_SIZE 0x08000000 /* 128 MB */ #define PCI_MEM_MASK (PCI_MEM_SIZE - 1) #define PCI_IO_PA 0xf8000000 /* Host physical address */ #define PCI_IO_BA 0x00000000 /* Bus physical address */ #define PCI_IO_SIZE 0x00010000 /* 64k */ #define PCI_IO_MASK (PCI_IO_SIZE - 1) #define HAVE_ARCH_PIO_SIZE #define PIO_OFFSET 0 #define PIO_MASK 0xffff #define PIO_RESERVED 0x10000 #define PCI_IOBASE ((void __iomem *) PCI_IO_PA) #define PCI_SPACE_LIMIT PCI_IO_MASK #endif /* CONFIG_PCI */ #include #include #endif /* _M68KNOMMU_IO_H */