/usr/src/linux-headers-5.15.0-190/arch/m68k/include/asm
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adb_iop.h11880644editdlrm
amigahw.h107370644editdlrm
amigaints.h35830644editdlrm
amigayle.h32710644editdlrm
amipcmcia.h25680644editdlrm
apollohw.h24100644editdlrm
asm-offsets.h350644editdlrm
asm-prototypes.h2110644editdlrm
atarihw.h209190644editdlrm
atariints.h56910644editdlrm
atarikb.h14340644editdlrm
atari_joystick.h4570644editdlrm
atari_stdma.h5140644editdlrm
atari_stram.h5280644editdlrm
atomic.h50160644editdlrm
bitops.h128270644editdlrm
blinken.h6410644editdlrm
bootinfo.h7830644editdlrm
bootstd.h47470644editdlrm
bug.h6590644editdlrm
bvme6000hw.h35290644editdlrm
cache.h2960644editdlrm
cacheflush.h1330644editdlrm
cacheflush_mm.h71730644editdlrm
cacheflush_no.h18840644editdlrm
checksum.h34970644editdlrm
cmpxchg.h31890644editdlrm
coldfire.h16530644editdlrm
contregs.h33900644editdlrm
current.h5800644editdlrm
delay.h35040644editdlrm
div64.h8580644editdlrm
dma.h170400644editdlrm
dsp56k.h12690644editdlrm
dvma.h99030644editdlrm
elf.h31450644editdlrm
entry.h59020644editdlrm
export.h530644editdlrm
fb.h9210644editdlrm
fbio.h101060644editdlrm
flat.h3330644editdlrm
floppy.h53300644editdlrm
fpu.h5350644editdlrm
ftrace.h120644editdlrm
gpio.h22940644editdlrm
hash.h21150644editdlrm
hp300hw.h1860644editdlrm
hwtest.h4670644editdlrm
ide.h17080644editdlrm
idprom.h7250644editdlrm
intersil.h11340644editdlrm
io.h2440644editdlrm
io_mm.h131980644editdlrm
io_no.h41960644editdlrm
irq.h26340644editdlrm
irqflags.h16520644editdlrm
Kbuild1650644editdlrm
kexec.h7320644editdlrm
kmap.h17540644editdlrm
linkage.h15830644editdlrm
m52xxacr.h36600644editdlrm
m53xxacr.h36830644editdlrm
m53xxsim.h552620644editdlrm
m54xxacr.h49340644editdlrm
m54xxgpt.h37500644editdlrm
m54xxpci.h62760644editdlrm
m54xxsim.h38920644editdlrm
m520xsim.h73230644editdlrm
m523xsim.h78820644editdlrm
m525xsim.h108220644editdlrm
m527xsim.h138350644editdlrm
m528xsim.h95990644editdlrm
m5206sim.h65550644editdlrm
m5272sim.h61990644editdlrm
m5307sim.h76980644editdlrm
m5407sim.h62890644editdlrm
m5441xsim.h102940644editdlrm
machdep.h13310644editdlrm
machines.h32090644editdlrm
machw.h5880644editdlrm
macintosh.h24380644editdlrm
macints.h32100644editdlrm
mac_asc.h5200644editdlrm
mac_baboon.h9990644editdlrm
mac_iop.h54990644editdlrm
mac_oss.h18730644editdlrm
mac_psc.h74270644editdlrm
mac_via.h117180644editdlrm
math-emu.h68970644editdlrm
MC68EZ328.h386500644editdlrm
MC68VZ328.h420060644editdlrm
MC68328.h387240644editdlrm
mc146818rtc.h5980644editdlrm
mcf8390.h38440644editdlrm
mcfclk.h9610644editdlrm
mcfdma.h66620644editdlrm
mcfgpio.h82690644editdlrm
mcfintc.h31610644editdlrm
mcfmmu.h37610644editdlrm
mcfpit.h22780644editdlrm
mcfqspi.h14660644editdlrm
mcfsim.h15310644editdlrm
mcfslt.h12400644editdlrm
mcftimer.h23570644editdlrm
mcfuart.h70760644editdlrm
mcfwdebug.h51060644editdlrm
mcf_pgalloc.h20000644editdlrm
mcf_pgtable.h83120644editdlrm
mmu.h2430644editdlrm
mmu_context.h72070644editdlrm
module.h8470644editdlrm
module.lds.h910644editdlrm
motorola_pgalloc.h21460644editdlrm
motorola_pgtable.h76100644editdlrm
movs.h14720644editdlrm
mvme16xhw.h22160644editdlrm
mvme147hw.h29380644editdlrm
natfeat.h5330644editdlrm
nettel.h30230644editdlrm
nubus.h12620644editdlrm
openprom.h81730644editdlrm
oplib.h97680644editdlrm
page.h17280644editdlrm
page_mm.h33990644editdlrm
page_no.h13220644editdlrm
page_offset.h2560644editdlrm
parport.h8370644editdlrm
pci.h2580644editdlrm
pgalloc.h4440644editdlrm
pgtable.h1270644editdlrm
pgtable_mm.h49310644editdlrm
pgtable_no.h14380644editdlrm
processor.h41580644editdlrm
ptrace.h6430644editdlrm
q40ints.h7490644editdlrm
q40_master.h23570644editdlrm
quicc_simple.h18300644editdlrm
raw_io.h120030644editdlrm
serial.h11650644editdlrm
setup.h94670644editdlrm
signal.h13770644editdlrm
smp.h320644editdlrm
string.h17170644editdlrm
sun3-head.h3530644editdlrm
sun3ints.h9890644editdlrm
sun3mmu.h50250644editdlrm
sun3x.h8680644editdlrm
sun3xflop.h57570644editdlrm
sun3xprom.h13430644editdlrm
sun3_pgalloc.h12670644editdlrm
sun3_pgtable.h65830644editdlrm
switch_to.h15490644editdlrm
syscall.h2510644editdlrm
thread_info.h22370644editdlrm
timex.h9740644editdlrm
tlb.h1350644editdlrm
tlbflush.h59890644editdlrm
traps.h86150644editdlrm
uaccess.h125630644editdlrm
ucontext.h5700644editdlrm
unistd.h9930644editdlrm
user.h38740644editdlrm
vga.h9020644editdlrm
virtconvert.h8340644editdlrm
vmalloc.h900644editdlrm
zorro.h12220644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/m68k/include/asm/mac_iop.h (5499B)
/* SPDX-License-Identifier: GPL-2.0 */ /* * I/O Processor (IOP) defines and structures, mostly snagged from A/UX * header files. * * The original header from which this was taken is copyrighted. I've done some * rewriting (in fact my changes make this a bit more readable, IMHO) but some * more should be done. */ /* * This is the base address of the IOPs. Use this as the address of * a "struct iop" (see below) to see where the actual registers fall. */ #define SCC_IOP_BASE_IIFX (0x50F04000) #define ISM_IOP_BASE_IIFX (0x50F12000) #define SCC_IOP_BASE_QUADRA (0x50F0C000) #define ISM_IOP_BASE_QUADRA (0x50F1E000) /* IOP status/control register bits: */ #define IOP_BYPASS 0x01 /* bypass-mode hardware access */ #define IOP_AUTOINC 0x02 /* allow autoincrement of ramhi/lo */ #define IOP_RUN 0x04 /* set to 0 to reset IOP chip */ #define IOP_IRQ 0x08 /* generate IRQ to IOP if 1 */ #define IOP_INT0 0x10 /* intr priority from IOP to host */ #define IOP_INT1 0x20 /* intr priority from IOP to host */ #define IOP_HWINT 0x40 /* IRQ from hardware; bypass mode only */ #define IOP_DMAINACTIVE 0x80 /* no DMA request active; bypass mode only */ #define NUM_IOPS 2 #define NUM_IOP_CHAN 7 #define NUM_IOP_MSGS NUM_IOP_CHAN*8 #define IOP_MSG_LEN 32 /* IOP reference numbers, used by the globally-visible iop_xxx functions */ #define IOP_NUM_SCC 0 #define IOP_NUM_ISM 1 /* IOP channel states */ #define IOP_MSG_IDLE 0 /* idle */ #define IOP_MSG_NEW 1 /* new message sent */ #define IOP_MSG_RCVD 2 /* message received; processing */ #define IOP_MSG_COMPLETE 3 /* message processing complete */ /* IOP message status codes */ #define IOP_MSGSTATUS_UNUSED 0 /* Unused message structure */ #define IOP_MSGSTATUS_WAITING 1 /* waiting for channel */ #define IOP_MSGSTATUS_SENT 2 /* message sent, awaiting reply */ #define IOP_MSGSTATUS_COMPLETE 3 /* message complete and reply rcvd */ #define IOP_MSGSTATUS_UNSOL 6 /* message is unsolicited */ /* IOP memory addresses of the members of the mac_iop_kernel structure. */ #define IOP_ADDR_MAX_SEND_CHAN 0x0200 #define IOP_ADDR_SEND_STATE 0x0201 #define IOP_ADDR_PATCH_CTRL 0x021F #define IOP_ADDR_SEND_MSG 0x0220 #define IOP_ADDR_MAX_RECV_CHAN 0x0300 #define IOP_ADDR_RECV_STATE 0x0301 #define IOP_ADDR_ALIVE 0x031F #define IOP_ADDR_RECV_MSG 0x0320 #ifndef __ASSEMBLY__ /* * IOP Control registers, staggered because in usual Apple style they were * too lazy to decode the A0 bit. This structure is assumed to begin at * one of the xxx_IOP_BASE addresses given above. */ struct mac_iop { __u8 ram_addr_hi; /* shared RAM address hi byte */ __u8 pad0; __u8 ram_addr_lo; /* shared RAM address lo byte */ __u8 pad1; __u8 status_ctrl; /* status/control register */ __u8 pad2[3]; __u8 ram_data; /* RAM data byte at ramhi/lo */ __u8 pad3[23]; /* Bypass-mode hardware access registers */ union { struct { /* SCC registers */ __u8 sccb_cmd; /* SCC B command reg */ __u8 pad4; __u8 scca_cmd; /* SCC A command reg */ __u8 pad5; __u8 sccb_data; /* SCC B data */ __u8 pad6; __u8 scca_data; /* SCC A data */ } scc_regs; struct { /* ISM registers */ __u8 wdata; /* write a data byte */ __u8 pad7; __u8 wmark; /* write a mark byte */ __u8 pad8; __u8 wcrc; /* write 2-byte crc to disk */ __u8 pad9; __u8 wparams; /* write the param regs */ __u8 pad10; __u8 wphase; /* write the phase states & dirs */ __u8 pad11; __u8 wsetup; /* write the setup register */ __u8 pad12; __u8 wzeroes; /* mode reg: 1's clr bits, 0's are x */ __u8 pad13; __u8 wones; /* mode reg: 1's set bits, 0's are x */ __u8 pad14; __u8 rdata; /* read a data byte */ __u8 pad15; __u8 rmark; /* read a mark byte */ __u8 pad16; __u8 rerror; /* read the error register */ __u8 pad17; __u8 rparams; /* read the param regs */ __u8 pad18; __u8 rphase; /* read the phase states & dirs */ __u8 pad19; __u8 rsetup; /* read the setup register */ __u8 pad20; __u8 rmode; /* read the mode register */ __u8 pad21; __u8 rhandshake; /* read the handshake register */ } ism_regs; } b; }; /* This structure is used to track IOP messages in the Linux kernel */ struct iop_msg { struct iop_msg *next; /* next message in queue or NULL */ uint iop_num; /* IOP number */ uint channel; /* channel number */ void *caller_priv; /* caller private data */ int status; /* status of this message */ __u8 message[IOP_MSG_LEN]; /* the message being sent/received */ __u8 reply[IOP_MSG_LEN]; /* the reply to the message */ void (*handler)(struct iop_msg *); /* function to call when reply recvd */ }; extern int iop_scc_present,iop_ism_present; extern int iop_listen(uint, uint, void (*handler)(struct iop_msg *), const char *); extern int iop_send_message(uint, uint, void *, uint, __u8 *, void (*)(struct iop_msg *)); extern void iop_complete_message(struct iop_msg *); extern void iop_upload_code(uint, __u8 *, uint, __u16); extern void iop_download_code(uint, __u8 *, uint, __u16); extern __u8 *iop_compare_code(uint, __u8 *, uint, __u16); extern void iop_ism_irq_poll(uint); extern void iop_register_interrupts(void); #endif /* __ASSEMBLY__ */