/usr/src/linux-headers-5.15.0-190/arch/microblaze/include/asm/
/usr/src/linux-headers-5.15.0-190/arch/microblaze/include/asm
NameSizeModeActions
asm-compat.h5180644editdlrm
asm-offsets.h350644editdlrm
barrier.h3130644editdlrm
cache.h5100644editdlrm
cacheflush.h32090644editdlrm
checksum.h8060644editdlrm
cpuinfo.h20430644editdlrm
current.h7140644editdlrm
delay.h21380644editdlrm
dma.h4320644editdlrm
elf.h6020644editdlrm
entry.h10180644editdlrm
exceptions.h19280644editdlrm
fixmap.h18740644editdlrm
flat.h19820644editdlrm
ftrace.h6420644editdlrm
futex.h21790644editdlrm
hash.h24290644editdlrm
highmem.h18000644editdlrm
io.h16910644editdlrm
irq.h3760644editdlrm
irqflags.h25290644editdlrm
Kbuild2500644editdlrm
kgdb.h7390644editdlrm
mmu.h40500644editdlrm
mmu_context.h720644editdlrm
mmu_context_mm.h38930644editdlrm
module.h7040644editdlrm
page.h40760644editdlrm
pci-bridge.h44730644editdlrm
pci.h19860644editdlrm
pgalloc.h10420644editdlrm
pgtable.h145260644editdlrm
processor.h26930644editdlrm
ptrace.h5910644editdlrm
pvr.h87910644editdlrm
registers.h15080644editdlrm
seccomp.h2560644editdlrm
sections.h5010644editdlrm
setup.h8230644editdlrm
string.h4940644editdlrm
switch_to.h4930644editdlrm
syscall.h23460644editdlrm
thread_info.h39790644editdlrm
timex.h2660644editdlrm
tlbflush.h15790644editdlrm
uaccess.h81210644editdlrm
unistd.h10510644editdlrm
unwind.h6110644editdlrm
vmalloc.h1080644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/microblaze/include/asm/irqflags.h (2529B)
/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2006 Atmark Techno, Inc. */ #ifndef _ASM_MICROBLAZE_IRQFLAGS_H #define _ASM_MICROBLAZE_IRQFLAGS_H #include #include #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR static inline notrace unsigned long arch_local_irq_save(void) { unsigned long flags; asm volatile(" msrclr %0, %1 \n" " nop \n" : "=r"(flags) : "i"(MSR_IE) : "memory"); return flags; } static inline notrace void arch_local_irq_disable(void) { /* this uses r0 without declaring it - is that correct? */ asm volatile(" msrclr r0, %0 \n" " nop \n" : : "i"(MSR_IE) : "memory"); } static inline notrace void arch_local_irq_enable(void) { /* this uses r0 without declaring it - is that correct? */ asm volatile(" msrset r0, %0 \n" " nop \n" : : "i"(MSR_IE) : "memory"); } #else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ static inline notrace unsigned long arch_local_irq_save(void) { unsigned long flags, tmp; asm volatile (" mfs %0, rmsr \n" " nop \n" " andi %1, %0, %2 \n" " mts rmsr, %1 \n" " nop \n" : "=r"(flags), "=r"(tmp) : "i"(~MSR_IE) : "memory"); return flags; } static inline notrace void arch_local_irq_disable(void) { unsigned long tmp; asm volatile(" mfs %0, rmsr \n" " nop \n" " andi %0, %0, %1 \n" " mts rmsr, %0 \n" " nop \n" : "=r"(tmp) : "i"(~MSR_IE) : "memory"); } static inline notrace void arch_local_irq_enable(void) { unsigned long tmp; asm volatile(" mfs %0, rmsr \n" " nop \n" " ori %0, %0, %1 \n" " mts rmsr, %0 \n" " nop \n" : "=r"(tmp) : "i"(MSR_IE) : "memory"); } #endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ static inline notrace unsigned long arch_local_save_flags(void) { unsigned long flags; asm volatile(" mfs %0, rmsr \n" " nop \n" : "=r"(flags) : : "memory"); return flags; } static inline notrace void arch_local_irq_restore(unsigned long flags) { asm volatile(" mts rmsr, %0 \n" " nop \n" : : "r"(flags) : "memory"); } static inline notrace bool arch_irqs_disabled_flags(unsigned long flags) { return (flags & MSR_IE) == 0; } static inline notrace bool arch_irqs_disabled(void) { return arch_irqs_disabled_flags(arch_local_save_flags()); } #endif /* _ASM_MICROBLAZE_IRQFLAGS_H */