/usr/src/linux-headers-5.15.0-190/arch/sh/include/uapi/asm
NameSizeModeActions
auxvec.h11070644editdlrm
byteorder.h2780644editdlrm
cachectl.h6480644editdlrm
cpu-features.h11550644editdlrm
hw_breakpoint.h1670644editdlrm
ioctls.h50390644editdlrm
Kbuild870644editdlrm
posix_types.h950644editdlrm
posix_types_32.h8010644editdlrm
ptrace.h8710644editdlrm
ptrace_32.h16180644editdlrm
sigcontext.h5500644editdlrm
signal.h3690644editdlrm
sockios.h6020644editdlrm
stat.h16840644editdlrm
swab.h9330644editdlrm
unistd.h900644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/sh/include/uapi/asm/cpu-features.h (1155B)
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __ASM_SH_CPU_FEATURES_H #define __ASM_SH_CPU_FEATURES_H /* * Processor flags * * Note: When adding a new flag, keep cpu_flags[] in * arch/sh/kernel/setup.c in sync so symbolic name * mapping of the processor flags has a chance of being * reasonably accurate. * * These flags are also available through the ELF * auxiliary vector as AT_HWCAP. */ #define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ #define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ #define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ #define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ #define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ #define CPU_HAS_PTEA 0x0020 /* PTEA register */ #define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ #define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ #define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ #define CPU_HAS_PTEAEX 0x0200 /* PTE ASID Extension support */ #define CPU_HAS_CAS_L 0x0400 /* cas.l atomic compare-and-swap */ #endif /* __ASM_SH_CPU_FEATURES_H */