/usr/src/linux-headers-5.15.0-190/arch/xtensa/include/asm
NameSizeModeActions
asm-offsets.h350644editdlrm
asm-uaccess.h41800644editdlrm
asmmacro.h47630644editdlrm
atomic.h73010644editdlrm
barrier.h5940644editdlrm
bitops.h53980644editdlrm
bootparam.h14020644editdlrm
cache.h11140644editdlrm
cacheasm.h38560644editdlrm
cacheflush.h59680644editdlrm
checksum.h58930644editdlrm
cmpxchg.h56840644editdlrm
coprocessor.h46230644editdlrm
core.h8300644editdlrm
current.h6790644editdlrm
delay.h16680644editdlrm
dma.h18300644editdlrm
elf.h51150644editdlrm
fixmap.h11060644editdlrm
flat.h4400644editdlrm
ftrace.h9790644editdlrm
futex.h38890644editdlrm
highmem.h21670644editdlrm
hw_breakpoint.h15970644editdlrm
initialize_mmu.h51960644editdlrm
io.h19590644editdlrm
irq.h11270644editdlrm
irqflags.h20690644editdlrm
jump_label.h16550644editdlrm
kasan.h8590644editdlrm
Kbuild2300644editdlrm
kmem_layout.h27900644editdlrm
linkage.h1540644editdlrm
mmu.h4620644editdlrm
mmu_context.h36240644editdlrm
mxregs.h13300644editdlrm
nommu_context.h1560644editdlrm
page.h57930644editdlrm
pci-bridge.h21700644editdlrm
pci.h13020644editdlrm
perf_event.h1080644editdlrm
pgalloc.h14050644editdlrm
pgtable.h144700644editdlrm
platform.h15280644editdlrm
processor.h77050644editdlrm
ptrace.h33210644editdlrm
regs.h40170644editdlrm
seccomp.h2870644editdlrm
serial.h4430644editdlrm
shmparam.h5610644editdlrm
signal.h5020644editdlrm
smp.h9670644editdlrm
spinlock.h4720644editdlrm
spinlock_types.h3170644editdlrm
stackprotector.h11400644editdlrm
stacktrace.h11580644editdlrm
string.h33850644editdlrm
switch_to.h6010644editdlrm
syscall.h21400644editdlrm
sysmem.h4260644editdlrm
thread_info.h39650644editdlrm
timex.h14400644editdlrm
tlb.h4750644editdlrm
tlbflush.h56200644editdlrm
traps.h27790644editdlrm
uaccess.h93750644editdlrm
ucontext.h5400644editdlrm
unistd.h3700644editdlrm
vectors.h32760644editdlrm
vermagic.h4330644editdlrm
vmalloc.h960644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/xtensa/include/asm/asmmacro.h (4763B)
/* * include/asm-xtensa/asmmacro.h * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2005 Tensilica Inc. */ #ifndef _XTENSA_ASMMACRO_H #define _XTENSA_ASMMACRO_H #include /* * Some little helpers for loops. Use zero-overhead-loops * where applicable and if supported by the processor. * * __loopi ar, at, size, inc * ar register initialized with the start address * at scratch register used by macro * size size immediate value * inc increment * * __loops ar, as, at, inc_log2[, mask_log2][, cond][, ncond] * ar register initialized with the start address * as register initialized with the size * at scratch register use by macro * inc_log2 increment [in log2] * mask_log2 mask [in log2] * cond true condition (used in loop'cond') * ncond false condition (used in b'ncond') * * __loop as * restart loop. 'as' register must not have been modified! * * __endla ar, as, incr * ar start address (modified) * as scratch register used by __loops/__loopi macros or * end address used by __loopt macro * inc increment */ /* * loop for given size as immediate */ .macro __loopi ar, at, size, incr #if XCHAL_HAVE_LOOPS movi \at, ((\size + \incr - 1) / (\incr)) loop \at, 99f #else addi \at, \ar, \size 98: #endif .endm /* * loop for given size in register */ .macro __loops ar, as, at, incr_log2, mask_log2, cond, ncond #if XCHAL_HAVE_LOOPS .ifgt \incr_log2 - 1 addi \at, \as, (1 << \incr_log2) - 1 .ifnc \mask_log2, extui \at, \at, \incr_log2, \mask_log2 .else srli \at, \at, \incr_log2 .endif .endif loop\cond \at, 99f #else .ifnc \mask_log2, extui \at, \as, \incr_log2, \mask_log2 .else .ifnc \ncond, srli \at, \as, \incr_log2 .endif .endif .ifnc \ncond, b\ncond \at, 99f .endif .ifnc \mask_log2, slli \at, \at, \incr_log2 add \at, \ar, \at .else add \at, \ar, \as .endif #endif 98: .endm /* * loop from ar to as */ .macro __loopt ar, as, at, incr_log2 #if XCHAL_HAVE_LOOPS sub \at, \as, \ar .ifgt \incr_log2 - 1 addi \at, \at, (1 << \incr_log2) - 1 srli \at, \at, \incr_log2 .endif loop \at, 99f #else 98: #endif .endm /* * restart loop. registers must be unchanged */ .macro __loop as #if XCHAL_HAVE_LOOPS loop \as, 99f #else 98: #endif .endm /* * end of loop with no increment of the address. */ .macro __endl ar, as #if !XCHAL_HAVE_LOOPS bltu \ar, \as, 98b #endif 99: .endm /* * end of loop with increment of the address. */ .macro __endla ar, as, incr addi \ar, \ar, \incr __endl \ar \as .endm /* Load or store instructions that may cause exceptions use the EX macro. */ #define EX(handler) \ .section __ex_table, "a"; \ .word 97f, handler; \ .previous \ 97: /* * Extract unaligned word that is split between two registers w0 and w1 * into r regardless of machine endianness. SAR must be loaded with the * starting bit of the word (see __ssa8). */ .macro __src_b r, w0, w1 #ifdef __XTENSA_EB__ src \r, \w0, \w1 #else src \r, \w1, \w0 #endif .endm /* * Load 2 lowest address bits of r into SAR for __src_b to extract unaligned * word starting at r from two registers loaded from consecutive aligned * addresses covering r regardless of machine endianness. * * r 0 1 2 3 * LE SAR 0 8 16 24 * BE SAR 32 24 16 8 */ .macro __ssa8 r #ifdef __XTENSA_EB__ ssa8b \r #else ssa8l \r #endif .endm #define XTENSA_STACK_ALIGNMENT 16 #if defined(__XTENSA_WINDOWED_ABI__) #define XTENSA_FRAME_SIZE_RESERVE 16 #define XTENSA_SPILL_STACK_RESERVE 32 #define abi_entry(frame_size) \ entry sp, (XTENSA_FRAME_SIZE_RESERVE + \ (((frame_size) + XTENSA_STACK_ALIGNMENT - 1) & \ -XTENSA_STACK_ALIGNMENT)) #define abi_entry_default abi_entry(0) #define abi_ret(frame_size) retw #define abi_ret_default retw #elif defined(__XTENSA_CALL0_ABI__) #define XTENSA_SPILL_STACK_RESERVE 0 #define abi_entry(frame_size) __abi_entry (frame_size) .macro __abi_entry frame_size .ifgt \frame_size addi sp, sp, -(((\frame_size) + XTENSA_STACK_ALIGNMENT - 1) & \ -XTENSA_STACK_ALIGNMENT) .endif .endm #define abi_entry_default #define abi_ret(frame_size) __abi_ret (frame_size) .macro __abi_ret frame_size .ifgt \frame_size addi sp, sp, (((\frame_size) + XTENSA_STACK_ALIGNMENT - 1) & \ -XTENSA_STACK_ALIGNMENT) .endif ret .endm #define abi_ret_default ret #else #error Unsupported Xtensa ABI #endif #define __XTENSA_HANDLER .section ".exception.text", "ax" #endif /* _XTENSA_ASMMACRO_H */