/usr/src/linux-headers-5.15.0-190/arch/xtensa/include/asm
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asm-offsets.h350644editdlrm
asm-uaccess.h41800644editdlrm
asmmacro.h47630644editdlrm
atomic.h73010644editdlrm
barrier.h5940644editdlrm
bitops.h53980644editdlrm
bootparam.h14020644editdlrm
cache.h11140644editdlrm
cacheasm.h38560644editdlrm
cacheflush.h59680644editdlrm
checksum.h58930644editdlrm
cmpxchg.h56840644editdlrm
coprocessor.h46230644editdlrm
core.h8300644editdlrm
current.h6790644editdlrm
delay.h16680644editdlrm
dma.h18300644editdlrm
elf.h51150644editdlrm
fixmap.h11060644editdlrm
flat.h4400644editdlrm
ftrace.h9790644editdlrm
futex.h38890644editdlrm
highmem.h21670644editdlrm
hw_breakpoint.h15970644editdlrm
initialize_mmu.h51960644editdlrm
io.h19590644editdlrm
irq.h11270644editdlrm
irqflags.h20690644editdlrm
jump_label.h16550644editdlrm
kasan.h8590644editdlrm
Kbuild2300644editdlrm
kmem_layout.h27900644editdlrm
linkage.h1540644editdlrm
mmu.h4620644editdlrm
mmu_context.h36240644editdlrm
mxregs.h13300644editdlrm
nommu_context.h1560644editdlrm
page.h57930644editdlrm
pci-bridge.h21700644editdlrm
pci.h13020644editdlrm
perf_event.h1080644editdlrm
pgalloc.h14050644editdlrm
pgtable.h144700644editdlrm
platform.h15280644editdlrm
processor.h77050644editdlrm
ptrace.h33210644editdlrm
regs.h40170644editdlrm
seccomp.h2870644editdlrm
serial.h4430644editdlrm
shmparam.h5610644editdlrm
signal.h5020644editdlrm
smp.h9670644editdlrm
spinlock.h4720644editdlrm
spinlock_types.h3170644editdlrm
stackprotector.h11400644editdlrm
stacktrace.h11580644editdlrm
string.h33850644editdlrm
switch_to.h6010644editdlrm
syscall.h21400644editdlrm
sysmem.h4260644editdlrm
thread_info.h39650644editdlrm
timex.h14400644editdlrm
tlb.h4750644editdlrm
tlbflush.h56200644editdlrm
traps.h27790644editdlrm
uaccess.h93750644editdlrm
ucontext.h5400644editdlrm
unistd.h3700644editdlrm
vectors.h32760644editdlrm
vermagic.h4330644editdlrm
vmalloc.h960644editdlrm
Edit: /usr/src/linux-headers-5.15.0-190/arch/xtensa/include/asm/jump_label.h (1655B)
/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright (C) 2018 Cadence Design Systems Inc. */ #ifndef _ASM_XTENSA_JUMP_LABEL_H #define _ASM_XTENSA_JUMP_LABEL_H #ifndef __ASSEMBLY__ #include #define JUMP_LABEL_NOP_SIZE 3 static __always_inline bool arch_static_branch(struct static_key *key, bool branch) { asm_volatile_goto("1:\n\t" "_nop\n\t" ".pushsection __jump_table, \"aw\"\n\t" ".word 1b, %l[l_yes], %c0\n\t" ".popsection\n\t" : : "i" (&((char *)key)[branch]) : : l_yes); return false; l_yes: return true; } static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch) { /* * Xtensa assembler will mark certain points in the code * as unreachable, so that later assembler or linker relaxation * passes could use them. A spot right after the J instruction * is one such point. Assembler and/or linker may insert padding * or literals here, breaking code flow in case the J instruction * is later replaced with NOP. Put a label right after the J to * make it reachable and wrap both into a no-transform block * to avoid any assembler interference with this. */ asm_volatile_goto("1:\n\t" ".begin no-transform\n\t" "_j %l[l_yes]\n\t" "2:\n\t" ".end no-transform\n\t" ".pushsection __jump_table, \"aw\"\n\t" ".word 1b, %l[l_yes], %c0\n\t" ".popsection\n\t" : : "i" (&((char *)key)[branch]) : : l_yes); return false; l_yes: return true; } typedef u32 jump_label_t; struct jump_entry { jump_label_t code; jump_label_t target; jump_label_t key; }; #endif /* __ASSEMBLY__ */ #endif