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/usr/include/boost/atomic/detail

Name	Size	Mode	Actions
type_traits/	-	0755	rm
addressof.hpp	1973	0644	edit dl rm
aligned_variable.hpp	1853	0644	edit dl rm
atomic_flag_impl.hpp	4525	0644	edit dl rm
atomic_impl.hpp	56095	0644	edit dl rm
atomic_ref_impl.hpp	54073	0644	edit dl rm
bitwise_cast.hpp	2691	0644	edit dl rm
bitwise_fp_cast.hpp	2509	0644	edit dl rm
capabilities.hpp	7520	0644	edit dl rm
caps_arch_gcc_aarch32.hpp	1617	0644	edit dl rm
caps_arch_gcc_aarch64.hpp	2238	0644	edit dl rm
caps_arch_gcc_alpha.hpp	940	0644	edit dl rm
caps_arch_gcc_arm.hpp	3573	0644	edit dl rm
caps_arch_gcc_ppc.hpp	1581	0644	edit dl rm
caps_arch_gcc_sparc.hpp	940	0644	edit dl rm
caps_arch_gcc_x86.hpp	2013	0644	edit dl rm
caps_arch_msvc_arm.hpp	943	0644	edit dl rm
caps_arch_msvc_x86.hpp	1698	0644	edit dl rm
caps_gcc_atomic.hpp	7438	0644	edit dl rm
caps_gcc_sync.hpp	1715	0644	edit dl rm
caps_linux_arm.hpp	963	0644	edit dl rm
caps_windows.hpp	880	0644	edit dl rm
cas_based_exchange.hpp	1348	0644	edit dl rm
classify.hpp	2133	0644	edit dl rm
config.hpp	7945	0644	edit dl rm
core_arch_operations.hpp	1481	0644	edit dl rm
core_arch_operations_fwd.hpp	972	0644	edit dl rm
core_arch_ops_gcc_aarch32.hpp	41910	0644	edit dl rm
core_arch_ops_gcc_aarch64.hpp	69364	0644	edit dl rm
core_arch_ops_gcc_alpha.hpp	27813	0644	edit dl rm
core_arch_ops_gcc_arm.hpp	64434	0644	edit dl rm
core_arch_ops_gcc_ppc.hpp	39185	0644	edit dl rm
core_arch_ops_gcc_sparc.hpp	7480	0644	edit dl rm
core_arch_ops_gcc_x86.hpp	39479	0644	edit dl rm
core_arch_ops_msvc_arm.hpp	34246	0644	edit dl rm
core_arch_ops_msvc_x86.hpp	31645	0644	edit dl rm
core_operations.hpp	1322	0644	edit dl rm
core_operations_emulated.hpp	8138	0644	edit dl rm
core_operations_emulated_fwd.hpp	1024	0644	edit dl rm
core_operations_fwd.hpp	942	0644	edit dl rm
core_ops_cas_based.hpp	3281	0644	edit dl rm
core_ops_gcc_atomic.hpp	12238	0644	edit dl rm
core_ops_gcc_sync.hpp	10690	0644	edit dl rm
core_ops_linux_arm.hpp	6364	0644	edit dl rm
core_ops_windows.hpp	7766	0644	edit dl rm
extending_cas_based_arithmetic.hpp	2441	0644	edit dl rm
extra_fp_operations.hpp	867	0644	edit dl rm
extra_fp_operations_fwd.hpp	1065	0644	edit dl rm
extra_fp_ops_emulated.hpp	4864	0644	edit dl rm
extra_fp_ops_generic.hpp	7222	0644	edit dl rm
extra_operations.hpp	825	0644	edit dl rm
extra_operations_fwd.hpp	1034	0644	edit dl rm
extra_ops_emulated.hpp	11876	0644	edit dl rm
extra_ops_gcc_aarch32.hpp	37869	0644	edit dl rm
extra_ops_gcc_aarch64.hpp	47028	0644	edit dl rm
extra_ops_gcc_arm.hpp	52836	0644	edit dl rm
extra_ops_gcc_ppc.hpp	28665	0644	edit dl rm
extra_ops_gcc_x86.hpp	58227	0644	edit dl rm
extra_ops_generic.hpp	17217	0644	edit dl rm
extra_ops_msvc_arm.hpp	3765	0644	edit dl rm
extra_ops_msvc_x86.hpp	37529	0644	edit dl rm
fence_arch_operations.hpp	1077	0644	edit dl rm
fence_arch_ops_gcc_aarch32.hpp	1701	0644	edit dl rm
fence_arch_ops_gcc_aarch64.hpp	1624	0644	edit dl rm
fence_arch_ops_gcc_alpha.hpp	1411	0644	edit dl rm
fence_arch_ops_gcc_arm.hpp	2769	0644	edit dl rm
fence_arch_ops_gcc_ppc.hpp	1773	0644	edit dl rm
fence_arch_ops_gcc_sparc.hpp	2002	0644	edit dl rm
fence_arch_ops_gcc_x86.hpp	2557	0644	edit dl rm
fence_arch_ops_msvc_arm.hpp	1787	0644	edit dl rm
fence_arch_ops_msvc_x86.hpp	1998	0644	edit dl rm
fence_operations.hpp	1007	0644	edit dl rm
fence_operations_emulated.hpp	1294	0644	edit dl rm
fence_ops_gcc_atomic.hpp	2399	0644	edit dl rm
fence_ops_gcc_sync.hpp	1367	0644	edit dl rm
fence_ops_linux_arm.hpp	1792	0644	edit dl rm
fence_ops_windows.hpp	1848	0644	edit dl rm
float_sizes.hpp	7570	0644	edit dl rm
footer.hpp	505	0644	edit dl rm
fp_operations.hpp	807	0644	edit dl rm
fp_operations_fwd.hpp	1001	0644	edit dl rm
fp_ops_emulated.hpp	2714	0644	edit dl rm
fp_ops_generic.hpp	2919	0644	edit dl rm
futex.hpp	5388	0644	edit dl rm
gcc_arm_asm_common.hpp	4031	0644	edit dl rm
gcc_atomic_memory_order_utils.hpp	2804	0644	edit dl rm
header.hpp	2624	0644	edit dl rm
integral_conversions.hpp	4306	0644	edit dl rm
interlocked.hpp	34503	0644	edit dl rm
intptr.hpp	992	0644	edit dl rm
int_sizes.hpp	4987	0644	edit dl rm
link.hpp	1534	0644	edit dl rm
lock_pool.hpp	4689	0644	edit dl rm
memory_order_utils.hpp	1576	0644	edit dl rm
once_flag.hpp	1136	0644	edit dl rm
ops_gcc_aarch32_common.hpp	1577	0644	edit dl rm
ops_gcc_aarch64_common.hpp	1467	0644	edit dl rm
ops_gcc_arm_common.hpp	1963	0644	edit dl rm
ops_gcc_ppc_common.hpp	2762	0644	edit dl rm
ops_msvc_common.hpp	1318	0644	edit dl rm
pause.hpp	1494	0644	edit dl rm
platform.hpp	7210	0644	edit dl rm
storage_traits.hpp	5448	0644	edit dl rm
string_ops.hpp	1719	0644	edit dl rm
wait_capabilities.hpp	16861	0644	edit dl rm
wait_caps_dragonfly_umtx.hpp	1055	0644	edit dl rm
wait_caps_freebsd_umtx.hpp	1539	0644	edit dl rm
wait_caps_futex.hpp	1027	0644	edit dl rm
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wait_operations.hpp	828	0644	edit dl rm
wait_operations_fwd.hpp	1071	0644	edit dl rm
wait_ops_dragonfly_umtx.hpp	2354	0644	edit dl rm
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wait_ops_freebsd_umtx.hpp	3974	0644	edit dl rm
wait_ops_futex.hpp	3416	0644	edit dl rm
wait_ops_generic.hpp	4263	0644	edit dl rm
wait_ops_windows.hpp	4848	0644	edit dl rm

Edit: /usr/include/boost/atomic/detail/core_arch_ops_gcc_sparc.hpp (7480B)

/*
 * Distributed under the Boost Software License, Version 1.0.
 * (See accompanying file LICENSE_1_0.txt or copy at
 * http://www.boost.org/LICENSE_1_0.txt)
 *
 * Copyright (c) 2010 Helge Bahmann
 * Copyright (c) 2013 Tim Blechmann
 * Copyright (c) 2014 Andrey Semashev
 */
/*!
 * \file   atomic/detail/core_arch_ops_gcc_sparc.hpp
 *
 * This header contains implementation of the \c core_arch_operations template.
 */

#ifndef BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
#define BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_

#include <cstddef>
#include <boost/memory_order.hpp>
#include <boost/atomic/detail/config.hpp>
#include <boost/atomic/detail/storage_traits.hpp>
#include <boost/atomic/detail/core_arch_operations_fwd.hpp>
#include <boost/atomic/detail/core_ops_cas_based.hpp>
#include <boost/atomic/detail/cas_based_exchange.hpp>
#include <boost/atomic/detail/extending_cas_based_arithmetic.hpp>
#include <boost/atomic/detail/header.hpp>

#ifdef BOOST_HAS_PRAGMA_ONCE
#pragma once
#endif

namespace boost {
namespace atomics {
namespace detail {

struct gcc_sparc_cas_base
{
    static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = true;
    static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;

static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
    {
        if (order == memory_order_seq_cst)
            __asm__ __volatile__ ("membar #Sync" ::: "memory");
        else if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
            __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
    }

static BOOST_FORCEINLINE void fence_after(memory_order order) BOOST_NOEXCEPT
    {
        if (order == memory_order_seq_cst)
            __asm__ __volatile__ ("membar #Sync" ::: "memory");
        else if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_consume) | static_cast< unsigned int >(memory_order_acquire))) != 0u)
            __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
    }

static BOOST_FORCEINLINE void fence_after_store(memory_order order) BOOST_NOEXCEPT
    {
        if (order == memory_order_seq_cst)
            __asm__ __volatile__ ("membar #Sync" ::: "memory");
    }
};

template< bool Signed, bool Interprocess >
struct gcc_sparc_cas32 :
    public gcc_sparc_cas_base
{
    typedef typename storage_traits< 4u >::type storage_type;

static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 4u;
    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;

static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
    {
        fence_before(order);
        storage = v;
        fence_after_store(order);
    }

static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
    {
        storage_type v = storage;
        fence_after(order);
        return v;
    }

static BOOST_FORCEINLINE bool compare_exchange_strong(
        storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
    {
        fence_before(success_order);
        storage_type previous = expected;
        __asm__ __volatile__
        (
            "cas [%1], %2, %0"
            : "+r" (desired)
            : "r" (&storage), "r" (previous)
            : "memory"
        );
        const bool success = (desired == previous);
        if (success)
            fence_after(success_order);
        else
            fence_after(failure_order);
        expected = desired;
        return success;
    }

static BOOST_FORCEINLINE bool compare_exchange_weak(
        storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
    {
        return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
    }

static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
    {
        fence_before(order);
        __asm__ __volatile__
        (
            "swap [%1], %0"
            : "+r" (v)
            : "r" (&storage)
            : "memory"
        );
        fence_after(order);
        return v;
    }
};

template< bool Signed, bool Interprocess >
struct core_arch_operations< 4u, Signed, Interprocess > :
    public core_operations_cas_based< gcc_sparc_cas32< Signed, Interprocess > >
{
};

template< bool Signed, bool Interprocess >
struct core_arch_operations< 1u, Signed, Interprocess > :
    public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 1u, Signed >
{
};

template< bool Signed, bool Interprocess >
struct core_arch_operations< 2u, Signed, Interprocess > :
    public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 2u, Signed >
{
};

template< bool Signed, bool Interprocess >
struct gcc_sparc_cas64 :
    public gcc_sparc_cas_base
{
    typedef typename storage_traits< 8u >::type storage_type;

static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
    static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 8u;
    static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
    static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;

static BOOST_FORCEINLINE bool compare_exchange_strong(
        storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
    {
        fence_before(success_order);
        storage_type previous = expected;
        __asm__ __volatile__
        (
            "casx [%1], %2, %0"
            : "+r" (desired)
            : "r" (&storage), "r" (previous)
            : "memory"
        );
        const bool success = (desired == previous);
        if (success)
            fence_after(success_order);
        else
            fence_after(failure_order);
        expected = desired;
        return success;
    }

template< bool Signed, bool Interprocess >
struct core_arch_operations< 8u, Signed, Interprocess > :
    public core_operations_cas_based< cas_based_exchange< gcc_sparc_cas64< Signed, Interprocess > > >
{
};

} // namespace detail
} // namespace atomics
} // namespace boost

#include <boost/atomic/detail/footer.hpp>

#endif // BOOST_ATOMIC_DETAIL_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_

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