FM / detail

/usr/include/oneapi/tbb/detail

Name	Size	Mode	Actions
_aggregator.h	7562	0644	edit dl rm
_aligned_space.h	1399	0644	edit dl rm
_allocator_traits.h	3807	0644	edit dl rm
_assert.h	2392	0644	edit dl rm
_concurrent_queue_base.h	26360	0644	edit dl rm
_concurrent_skip_list.h	46628	0644	edit dl rm
_concurrent_unordered_base.h	64656	0644	edit dl rm
_config.h	20382	0644	edit dl rm
_containers_helpers.h	2627	0644	edit dl rm
_exception.h	2715	0644	edit dl rm
_export.h	1199	0644	edit dl rm
_flow_graph_body_impl.h	12776	0644	edit dl rm
_flow_graph_cache_impl.h	13615	0644	edit dl rm
_flow_graph_impl.h	15360	0644	edit dl rm
_flow_graph_indexer_impl.h	16529	0644	edit dl rm
_flow_graph_item_buffer_impl.h	10359	0644	edit dl rm
_flow_graph_join_impl.h	82886	0644	edit dl rm
_flow_graph_nodes_deduction.h	9532	0644	edit dl rm
_flow_graph_node_impl.h	27545	0644	edit dl rm
_flow_graph_node_set_impl.h	10177	0644	edit dl rm
_flow_graph_tagged_buffer_impl.h	10318	0644	edit dl rm
_flow_graph_trace_impl.h	15974	0644	edit dl rm
_flow_graph_types_impl.h	15623	0644	edit dl rm
_hash_compare.h	4488	0644	edit dl rm
_intrusive_list_node.h	1462	0644	edit dl rm
_machine.h	13042	0644	edit dl rm
_mutex_common.h	2347	0644	edit dl rm
_namespace_injection.h	815	0644	edit dl rm
_node_handle.h	5173	0644	edit dl rm
_pipeline_filters.h	15905	0644	edit dl rm
_pipeline_filters_deduction.h	1529	0644	edit dl rm
_range_common.h	4643	0644	edit dl rm
_rtm_mutex.h	4785	0644	edit dl rm
_rtm_rw_mutex.h	7210	0644	edit dl rm
_scoped_lock.h	5009	0644	edit dl rm
_segment_table.h	24750	0644	edit dl rm
_small_object_pool.h	3574	0644	edit dl rm
_string_resource.h	3872	0644	edit dl rm
_task.h	7116	0644	edit dl rm
_task_handle.h	3688	0644	edit dl rm
_template_helpers.h	13517	0644	edit dl rm
_utils.h	13318	0644	edit dl rm
_waitable_atomic.h	3532	0644	edit dl rm

Edit: /usr/include/oneapi/tbb/detail/_waitable_atomic.h (3532B)

/*
    Copyright (c) 2021 Intel Corporation

Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/

#ifndef __TBB_detail__address_waiters_H
#define __TBB_detail__address_waiters_H

#include "_utils.h"

namespace tbb {
namespace detail {

namespace r1 {
TBB_EXPORT void __TBB_EXPORTED_FUNC wait_on_address(void* address, d1::delegate_base& wakeup_condition, std::uintptr_t context);
TBB_EXPORT void __TBB_EXPORTED_FUNC notify_by_address(void* address, std::uintptr_t context);
TBB_EXPORT void __TBB_EXPORTED_FUNC notify_by_address_one(void* address);
TBB_EXPORT void __TBB_EXPORTED_FUNC notify_by_address_all(void* address);
} // namespace r1

namespace d1 {

template <typename Predicate>
void adaptive_wait_on_address(void* address, Predicate wakeup_condition, std::uintptr_t context) {
    if (!timed_spin_wait_until(wakeup_condition)) {
        d1::delegated_function<Predicate> pred(wakeup_condition);
        r1::wait_on_address(address, pred, context);
    }
}

template <typename T>
class waitable_atomic {
public:
    waitable_atomic() = default;

explicit waitable_atomic(T value) : my_atomic(value) {}

waitable_atomic(const waitable_atomic&) = delete;
    waitable_atomic& operator=(const waitable_atomic&) = delete;

T load(std::memory_order order) const noexcept {
        return my_atomic.load(order);
    }

T exchange(T desired) noexcept {
        return my_atomic.exchange(desired);
    }

void wait(T old, std::uintptr_t context, std::memory_order order) {
        auto wakeup_condition = [&] { return my_atomic.load(order) != old; };
        if (!timed_spin_wait_until(wakeup_condition)) {
            // We need to use while here, because notify_all() will wake up all threads
            // But predicate for them might be false
            d1::delegated_function<decltype(wakeup_condition)> pred(wakeup_condition);
            do {
                r1::wait_on_address(this, pred, context);
            } while (!wakeup_condition());
        }
    }

void wait_until(T expected, std::uintptr_t context, std::memory_order order) {
        auto wakeup_condition = [&] { return my_atomic.load(order) == expected; };
        if (!timed_spin_wait_until(wakeup_condition)) {
            // We need to use while here, because notify_all() will wake up all threads
            // But predicate for them might be false
            d1::delegated_function<decltype(wakeup_condition)> pred(wakeup_condition);
            do {
                r1::wait_on_address(this, pred, context);
            } while (!wakeup_condition());
        }
    }

void notify_relaxed(std::uintptr_t context) {
        r1::notify_by_address(this, context);
    }

void notify_one_relaxed() {
        r1::notify_by_address_one(this);
    }

// TODO: consider adding following interfaces:
    // store(desired, memory_order)
    // notify_all_relaxed()

private:
    std::atomic<T> my_atomic{};
};

} // namespace d1
} // namespace detail
} // namespace tbb

#endif // __TBB_detail__address_waiters_H

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