FM / asm

/usr/src/linux-headers-5.15.0-181/arch/arm/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/arm/include/asm

Name	Size	Mode	Actions
hardware/	-	0755	rm
mach/	-	0755	rm
vdso/	-	0755	rm
xen/	-	0755	rm
archrandom.h	192	0644	edit dl rm
arch_gicv3.h	6327	0644	edit dl rm
arch_timer.h	3124	0644	edit dl rm
arm-cci.h	535	0644	edit dl rm
asm-offsets.h	35	0644	edit dl rm
assembler.h	13106	0644	edit dl rm
atomic.h	12536	0644	edit dl rm
auxvec.h	29	0644	edit dl rm
barrier.h	2910	0644	edit dl rm
bitops.h	7627	0644	edit dl rm
bitrev.h	451	0644	edit dl rm
bL_switcher.h	2186	0644	edit dl rm
bug.h	2620	0644	edit dl rm
bugs.h	297	0644	edit dl rm
cache.h	794	0644	edit dl rm
cacheflush.h	15794	0644	edit dl rm
cachetype.h	2779	0644	edit dl rm
checksum.h	4026	0644	edit dl rm
clocksource.h	161	0644	edit dl rm
cmpxchg.h	6328	0644	edit dl rm
compiler.h	978	0644	edit dl rm
cp15.h	3302	0644	edit dl rm
cpu.h	387	0644	edit dl rm
cpufeature.h	1291	0644	edit dl rm
cpuidle.h	1628	0644	edit dl rm
cputype.h	8766	0644	edit dl rm
cti.h	3703	0644	edit dl rm
dcc.h	623	0644	edit dl rm
delay.h	2903	0644	edit dl rm
device.h	636	0644	edit dl rm
div64.h	2640	0644	edit dl rm
dma-direct.h	1341	0644	edit dl rm
dma-iommu.h	908	0644	edit dl rm
dma-mapping.h	4714	0644	edit dl rm
dma.h	4287	0644	edit dl rm
dmi.h	378	0644	edit dl rm
domain.h	3751	0644	edit dl rm
ecard.h	6119	0644	edit dl rm
edac.h	995	0644	edit dl rm
efi.h	2501	0644	edit dl rm
elf.h	4636	0644	edit dl rm
entry-macro-multi.S	336	0644	edit dl rm
exception.h	416	0644	edit dl rm
fb.h	375	0644	edit dl rm
fiq.h	1391	0644	edit dl rm
firmware.h	1728	0644	edit dl rm
fixmap.h	1881	0644	edit dl rm
floppy.h	2318	0644	edit dl rm
fncpy.h	2552	0644	edit dl rm
fpstate.h	1478	0644	edit dl rm
ftrace.h	1821	0644	edit dl rm
futex.h	4357	0644	edit dl rm
glue-cache.h	3515	0644	edit dl rm
glue-df.h	2110	0644	edit dl rm
glue-pf.h	1005	0644	edit dl rm
glue-proc.h	4424	0644	edit dl rm
glue.h	613	0644	edit dl rm
gpio.h	615	0644	edit dl rm
hardirq.h	246	0644	edit dl rm
highmem.h	2379	0644	edit dl rm
hugetlb-3level.h	690	0644	edit dl rm
hugetlb.h	513	0644	edit dl rm
hwcap.h	378	0644	edit dl rm
hw_breakpoint.h	3811	0644	edit dl rm
hw_irq.h	349	0644	edit dl rm
hypervisor.h	224	0644	edit dl rm
ide.h	566	0644	edit dl rm
idmap.h	359	0644	edit dl rm
insn.h	636	0644	edit dl rm
io.h	15027	0644	edit dl rm
irq.h	887	0644	edit dl rm
irqflags.h	3969	0644	edit dl rm
irq_work.h	234	0644	edit dl rm
jump_label.h	1009	0644	edit dl rm
kasan.h	708	0644	edit dl rm
kasan_def.h	2726	0644	edit dl rm
Kbuild	186	0644	edit dl rm
kexec-internal.h	272	0644	edit dl rm
kexec.h	2255	0644	edit dl rm
kgdb.h	2783	0644	edit dl rm
kprobes.h	2248	0644	edit dl rm
krait-l2-accessors.h	231	0644	edit dl rm
linkage.h	216	0644	edit dl rm
mc146818rtc.h	720	0644	edit dl rm
mcpm.h	12061	0644	edit dl rm
mcs_spinlock.h	570	0644	edit dl rm
memblock.h	248	0644	edit dl rm
memory.h	10945	0644	edit dl rm
mmu.h	953	0644	edit dl rm
mmu_context.h	3461	0644	edit dl rm
module.h	1216	0644	edit dl rm
module.lds.h	134	0644	edit dl rm
mpu.h	3300	0644	edit dl rm
mtd-xip.h	520	0644	edit dl rm
neon.h	1041	0644	edit dl rm
nwflash.h	195	0644	edit dl rm
opcodes-sec.h	350	0644	edit dl rm
opcodes-virt.h	684	0644	edit dl rm
opcodes.h	8118	0644	edit dl rm
outercache.h	3268	0644	edit dl rm
page-nommu.h	811	0644	edit dl rm
page.h	3448	0644	edit dl rm
paravirt.h	477	0644	edit dl rm
patch.h	438	0644	edit dl rm
pci.h	794	0644	edit dl rm
percpu.h	1069	0644	edit dl rm
perf_event.h	708	0644	edit dl rm
pgalloc.h	3373	0644	edit dl rm
pgtable-2level-hwdef.h	3385	0644	edit dl rm
pgtable-2level-types.h	1278	0644	edit dl rm
pgtable-2level.h	8645	0644	edit dl rm
pgtable-3level-hwdef.h	3435	0644	edit dl rm
pgtable-3level-types.h	1331	0644	edit dl rm
pgtable-3level.h	8148	0644	edit dl rm
pgtable-hwdef.h	321	0644	edit dl rm
pgtable-nommu.h	1979	0644	edit dl rm
pgtable.h	10492	0644	edit dl rm
probes.h	1332	0644	edit dl rm
proc-fns.h	4754	0644	edit dl rm
processor.h	3166	0644	edit dl rm
procinfo.h	1152	0644	edit dl rm
prom.h	552	0644	edit dl rm
psci.h	379	0644	edit dl rm
ptdump.h	923	0644	edit dl rm
ptrace.h	4841	0644	edit dl rm
seccomp.h	281	0644	edit dl rm
sections.h	622	0644	edit dl rm
secure_cntvoff.h	152	0644	edit dl rm
setup.h	773	0644	edit dl rm
set_memory.h	720	0644	edit dl rm
shmparam.h	419	0644	edit dl rm
signal.h	559	0644	edit dl rm
smp.h	2839	0644	edit dl rm
smp_plat.h	2535	0644	edit dl rm
smp_scu.h	1352	0644	edit dl rm
smp_twd.h	590	0644	edit dl rm
sparsemem.h	716	0644	edit dl rm
spectre.h	906	0644	edit dl rm
spinlock.h	5645	0644	edit dl rm
spinlock_types.h	541	0644	edit dl rm
stackprotector.h	1357	0644	edit dl rm
stacktrace.h	742	0644	edit dl rm
string.h	2165	0644	edit dl rm
suspend.h	369	0644	edit dl rm
swab.h	1005	0644	edit dl rm
switch_to.h	1058	0644	edit dl rm
sync_bitops.h	1514	0644	edit dl rm
syscall.h	2347	0644	edit dl rm
system_info.h	763	0644	edit dl rm
system_misc.h	1005	0644	edit dl rm
tcm.h	925	0644	edit dl rm
therm.h	655	0644	edit dl rm
thread_info.h	4974	0644	edit dl rm
thread_notify.h	1086	0644	edit dl rm
timex.h	431	0644	edit dl rm
tlb.h	1442	0644	edit dl rm
tlbflush.h	17909	0644	edit dl rm
tls.h	3166	0644	edit dl rm
topology.h	1139	0644	edit dl rm
traps.h	911	0644	edit dl rm
uaccess-asm.h	2703	0644	edit dl rm
uaccess.h	17431	0644	edit dl rm
ucontext.h	2745	0644	edit dl rm
unified.h	979	0644	edit dl rm
unistd.h	1578	0644	edit dl rm
unwind.h	1173	0644	edit dl rm
uprobes.h	948	0644	edit dl rm
user.h	4302	0644	edit dl rm
v7m.h	3233	0644	edit dl rm
vdso.h	507	0644	edit dl rm
vdso_datapage.h	444	0644	edit dl rm
vermagic.h	800	0644	edit dl rm
vfp.h	2969	0644	edit dl rm
vfpmacros.h	2074	0644	edit dl rm
vga.h	305	0644	edit dl rm
virt.h	1855	0644	edit dl rm
vmalloc.h	87	0644	edit dl rm
vmlinux.lds.h	4490	0644	edit dl rm
word-at-a-time.h	2128	0644	edit dl rm
xor.h	5204	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/arm/include/asm/assembler.h (13106B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *  arch/arm/include/asm/assembler.h
 *
 *  Copyright (C) 1996-2000 Russell King
 *
 *  This file contains arm architecture specific defines
 *  for the different processors.
 *
 *  Do not include any C declarations in this file - it is included by
 *  assembler source.
 */
#ifndef __ASM_ASSEMBLER_H__
#define __ASM_ASSEMBLER_H__

#ifndef __ASSEMBLY__
#error "Only include this from assembly code"
#endif

#include <asm/ptrace.h>
#include <asm/opcodes-virt.h>
#include <asm/asm-offsets.h>
#include <asm/page.h>
#include <asm/thread_info.h>
#include <asm/uaccess-asm.h>

#define IOMEM(x)	(x)

/*
 * Endian independent macros for shifting bytes within registers.
 */
#ifndef __ARMEB__
#define lspull          lsr
#define lspush          lsl
#define get_byte_0      lsl #0
#define get_byte_1	lsr #8
#define get_byte_2	lsr #16
#define get_byte_3	lsr #24
#define put_byte_0      lsl #0
#define put_byte_1	lsl #8
#define put_byte_2	lsl #16
#define put_byte_3	lsl #24
#else
#define lspull          lsl
#define lspush          lsr
#define get_byte_0	lsr #24
#define get_byte_1	lsr #16
#define get_byte_2	lsr #8
#define get_byte_3      lsl #0
#define put_byte_0	lsl #24
#define put_byte_1	lsl #16
#define put_byte_2	lsl #8
#define put_byte_3      lsl #0
#endif

/* Select code for any configuration running in BE8 mode */
#ifdef CONFIG_CPU_ENDIAN_BE8
#define ARM_BE8(code...) code
#else
#define ARM_BE8(code...)
#endif

/*
 * Data preload for architectures that support it
 */
#if __LINUX_ARM_ARCH__ >= 5
#define PLD(code...)	code
#else
#define PLD(code...)
#endif

/*
 * This can be used to enable code to cacheline align the destination
 * pointer when bulk writing to memory.  Experiments on StrongARM and
 * XScale didn't show this a worthwhile thing to do when the cache is not
 * set to write-allocate (this would need further testing on XScale when WA
 * is used).
 *
 * On Feroceon there is much to gain however, regardless of cache mode.
 */
#ifdef CONFIG_CPU_FEROCEON
#define CALGN(code...) code
#else
#define CALGN(code...)
#endif

#define IMM12_MASK 0xfff

/*
 * Enable and disable interrupts
 */
#if __LINUX_ARM_ARCH__ >= 6
	.macro	disable_irq_notrace
	cpsid	i
	.endm

.macro	enable_irq_notrace
	cpsie	i
	.endm
#else
	.macro	disable_irq_notrace
	msr	cpsr_c, #PSR_I_BIT | SVC_MODE
	.endm

.macro	enable_irq_notrace
	msr	cpsr_c, #SVC_MODE
	.endm
#endif

#if __LINUX_ARM_ARCH__ < 7
	.macro	dsb, args
	mcr	p15, 0, r0, c7, c10, 4
	.endm

.macro	isb, args
	mcr	p15, 0, r0, c7, c5, 4
	.endm
#endif

.macro asm_trace_hardirqs_off, save=1
#if defined(CONFIG_TRACE_IRQFLAGS)
	.if \save
	stmdb   sp!, {r0-r3, ip, lr}
	.endif
	bl	trace_hardirqs_off
	.if \save
	ldmia	sp!, {r0-r3, ip, lr}
	.endif
#endif
	.endm

.macro asm_trace_hardirqs_on, cond=al, save=1
#if defined(CONFIG_TRACE_IRQFLAGS)
	/*
	 * actually the registers should be pushed and pop'd conditionally, but
	 * after bl the flags are certainly clobbered
	 */
	.if \save
	stmdb   sp!, {r0-r3, ip, lr}
	.endif
	bl\cond	trace_hardirqs_on
	.if \save
	ldmia	sp!, {r0-r3, ip, lr}
	.endif
#endif
	.endm

.macro disable_irq, save=1
	disable_irq_notrace
	asm_trace_hardirqs_off \save
	.endm

.macro enable_irq
	asm_trace_hardirqs_on
	enable_irq_notrace
	.endm
/*
 * Save the current IRQ state and disable IRQs.  Note that this macro
 * assumes FIQs are enabled, and that the processor is in SVC mode.
 */
	.macro	save_and_disable_irqs, oldcpsr
#ifdef CONFIG_CPU_V7M
	mrs	\oldcpsr, primask
#else
	mrs	\oldcpsr, cpsr
#endif
	disable_irq
	.endm

.macro	save_and_disable_irqs_notrace, oldcpsr
#ifdef CONFIG_CPU_V7M
	mrs	\oldcpsr, primask
#else
	mrs	\oldcpsr, cpsr
#endif
	disable_irq_notrace
	.endm

/*
 * Restore interrupt state previously stored in a register.  We don't
 * guarantee that this will preserve the flags.
 */
	.macro	restore_irqs_notrace, oldcpsr
#ifdef CONFIG_CPU_V7M
	msr	primask, \oldcpsr
#else
	msr	cpsr_c, \oldcpsr
#endif
	.endm

.macro restore_irqs, oldcpsr
	tst	\oldcpsr, #PSR_I_BIT
	asm_trace_hardirqs_on cond=eq
	restore_irqs_notrace \oldcpsr
	.endm

/*
 * Assembly version of "adr rd, BSYM(sym)".  This should only be used to
 * reference local symbols in the same assembly file which are to be
 * resolved by the assembler.  Other usage is undefined.
 */
	.irp	c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
	.macro	badr\c, rd, sym
#ifdef CONFIG_THUMB2_KERNEL
	adr\c	\rd, \sym + 1
#else
	adr\c	\rd, \sym
#endif
	.endm
	.endr

/*
 * Get current thread_info.
 */
	.macro	get_thread_info, rd
 ARM(	mov	\rd, sp, lsr #THREAD_SIZE_ORDER + PAGE_SHIFT	)
 THUMB(	mov	\rd, sp			)
 THUMB(	lsr	\rd, \rd, #THREAD_SIZE_ORDER + PAGE_SHIFT	)
	mov	\rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT
	.endm

/*
 * Increment/decrement the preempt count.
 */
#ifdef CONFIG_PREEMPT_COUNT
	.macro	inc_preempt_count, ti, tmp
	ldr	\tmp, [\ti, #TI_PREEMPT]	@ get preempt count
	add	\tmp, \tmp, #1			@ increment it
	str	\tmp, [\ti, #TI_PREEMPT]
	.endm

.macro	dec_preempt_count, ti, tmp
	ldr	\tmp, [\ti, #TI_PREEMPT]	@ get preempt count
	sub	\tmp, \tmp, #1			@ decrement it
	str	\tmp, [\ti, #TI_PREEMPT]
	.endm

.macro	dec_preempt_count_ti, ti, tmp
	get_thread_info \ti
	dec_preempt_count \ti, \tmp
	.endm
#else
	.macro	inc_preempt_count, ti, tmp
	.endm

.macro	dec_preempt_count, ti, tmp
	.endm

.macro	dec_preempt_count_ti, ti, tmp
	.endm
#endif

#define USERL(l, x...)				\
9999:	x;					\
	.pushsection __ex_table,"a";		\
	.align	3;				\
	.long	9999b,l;			\
	.popsection

#define USER(x...)	USERL(9001f, x)

#ifdef CONFIG_SMP
#define ALT_SMP(instr...)					\
9998:	instr
/*
 * Note: if you get assembler errors from ALT_UP() when building with
 * CONFIG_THUMB2_KERNEL, you almost certainly need to use
 * ALT_SMP( W(instr) ... )
 */
#define ALT_UP(instr...)					\
	.pushsection ".alt.smp.init", "a"			;\
	.align	2						;\
	.long	9998b - .					;\
9997:	instr							;\
	.if . - 9997b == 2					;\
		nop						;\
	.endif							;\
	.if . - 9997b != 4					;\
		.error "ALT_UP() content must assemble to exactly 4 bytes";\
	.endif							;\
	.popsection
#define ALT_UP_B(label)					\
	.pushsection ".alt.smp.init", "a"			;\
	.align	2						;\
	.long	9998b - .					;\
	W(b)	. + (label - 9998b)					;\
	.popsection
#else
#define ALT_SMP(instr...)
#define ALT_UP(instr...) instr
#define ALT_UP_B(label) b label
#endif

/*
 * Instruction barrier
 */
	.macro	instr_sync
#if __LINUX_ARM_ARCH__ >= 7
	isb
#elif __LINUX_ARM_ARCH__ == 6
	mcr	p15, 0, r0, c7, c5, 4
#endif
	.endm

/*
 * SMP data memory barrier
 */
	.macro	smp_dmb mode
#ifdef CONFIG_SMP
#if __LINUX_ARM_ARCH__ >= 7
	.ifeqs "\mode","arm"
	ALT_SMP(dmb	ish)
	.else
	ALT_SMP(W(dmb)	ish)
	.endif
#elif __LINUX_ARM_ARCH__ == 6
	ALT_SMP(mcr	p15, 0, r0, c7, c10, 5)	@ dmb
#else
#error Incompatible SMP platform
#endif
	.ifeqs "\mode","arm"
	ALT_UP(nop)
	.else
	ALT_UP(W(nop))
	.endif
#endif
	.endm

/*
 * Raw SMP data memory barrier
 */
	.macro	__smp_dmb mode
#if __LINUX_ARM_ARCH__ >= 7
	.ifeqs "\mode","arm"
	dmb	ish
	.else
	W(dmb)	ish
	.endif
#elif __LINUX_ARM_ARCH__ == 6
	mcr	p15, 0, r0, c7, c10, 5	@ dmb
#else
	.error "Incompatible SMP platform"
#endif
	.endm

#if defined(CONFIG_CPU_V7M)
	/*
	 * setmode is used to assert to be in svc mode during boot. For v7-M
	 * this is done in __v7m_setup, so setmode can be empty here.
	 */
	.macro	setmode, mode, reg
	.endm
#elif defined(CONFIG_THUMB2_KERNEL)
	.macro	setmode, mode, reg
	mov	\reg, #\mode
	msr	cpsr_c, \reg
	.endm
#else
	.macro	setmode, mode, reg
	msr	cpsr_c, #\mode
	.endm
#endif

/*
 * Helper macro to enter SVC mode cleanly and mask interrupts. reg is
 * a scratch register for the macro to overwrite.
 *
 * This macro is intended for forcing the CPU into SVC mode at boot time.
 * you cannot return to the original mode.
 */
.macro safe_svcmode_maskall reg:req
#if __LINUX_ARM_ARCH__ >= 6 && !defined(CONFIG_CPU_V7M)
	mrs	\reg , cpsr
	eor	\reg, \reg, #HYP_MODE
	tst	\reg, #MODE_MASK
	bic	\reg , \reg , #MODE_MASK
	orr	\reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE
THUMB(	orr	\reg , \reg , #PSR_T_BIT	)
	bne	1f
	orr	\reg, \reg, #PSR_A_BIT
	badr	lr, 2f
	msr	spsr_cxsf, \reg
	__MSR_ELR_HYP(14)
	__ERET
1:	msr	cpsr_c, \reg
2:
#else
/*
 * workaround for possibly broken pre-v6 hardware
 * (akita, Sharp Zaurus C-1000, PXA270-based)
 */
	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, \reg
#endif
.endm

/*
 * STRT/LDRT access macros with ARM and Thumb-2 variants
 */
#ifdef CONFIG_THUMB2_KERNEL

.macro	usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER()
9999:
	.if	\inc == 1
	\instr\()b\t\cond\().w \reg, [\ptr, #\off]
	.elseif	\inc == 4
	\instr\t\cond\().w \reg, [\ptr, #\off]
	.else
	.error	"Unsupported inc macro argument"
	.endif

.pushsection __ex_table,"a"
	.align	3
	.long	9999b, \abort
	.popsection
	.endm

.macro	usracc, instr, reg, ptr, inc, cond, rept, abort
	@ explicit IT instruction needed because of the label
	@ introduced by the USER macro
	.ifnc	\cond,al
	.if	\rept == 1
	itt	\cond
	.elseif	\rept == 2
	ittt	\cond
	.else
	.error	"Unsupported rept macro argument"
	.endif
	.endif

@ Slightly optimised to avoid incrementing the pointer twice
	usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort
	.if	\rept == 2
	usraccoff \instr, \reg, \ptr, \inc, \inc, \cond, \abort
	.endif

add\cond \ptr, #\rept * \inc
	.endm

#else	/* !CONFIG_THUMB2_KERNEL */

.macro	usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER()
	.rept	\rept
9999:
	.if	\inc == 1
	\instr\()b\t\cond \reg, [\ptr], #\inc
	.elseif	\inc == 4
	\instr\t\cond \reg, [\ptr], #\inc
	.else
	.error	"Unsupported inc macro argument"
	.endif

.pushsection __ex_table,"a"
	.align	3
	.long	9999b, \abort
	.popsection
	.endr
	.endm

#endif	/* CONFIG_THUMB2_KERNEL */

.macro	strusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
	usracc	str, \reg, \ptr, \inc, \cond, \rept, \abort
	.endm

.macro	ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
	usracc	ldr, \reg, \ptr, \inc, \cond, \rept, \abort
	.endm

/* Utility macro for declaring string literals */
	.macro	string name:req, string
	.type \name , #object
\name:
	.asciz "\string"
	.size \name , . - \name
	.endm

.irp	c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
	.macro	ret\c, reg
#if __LINUX_ARM_ARCH__ < 6
	mov\c	pc, \reg
#else
	.ifeqs	"\reg", "lr"
	bx\c	\reg
	.else
	mov\c	pc, \reg
	.endif
#endif
	.endm
	.endr

.macro	ret.w, reg
	ret	\reg
#ifdef CONFIG_THUMB2_KERNEL
	nop
#endif
	.endm

.macro	bug, msg, line
#ifdef CONFIG_THUMB2_KERNEL
1:	.inst	0xde02
#else
1:	.inst	0xe7f001f2
#endif
#ifdef CONFIG_DEBUG_BUGVERBOSE
	.pushsection .rodata.str, "aMS", %progbits, 1
2:	.asciz	"\msg"
	.popsection
	.pushsection __bug_table, "aw"
	.align	2
	.word	1b, 2b
	.hword	\line
	.popsection
#endif
	.endm

#ifdef CONFIG_KPROBES
#define _ASM_NOKPROBE(entry)				\
	.pushsection "_kprobe_blacklist", "aw" ;	\
	.balign 4 ;					\
	.long entry;					\
	.popsection
#else
#define _ASM_NOKPROBE(entry)
#endif

.macro		__adldst_l, op, reg, sym, tmp, c
	.if		__LINUX_ARM_ARCH__ < 7
	ldr\c		\tmp, .La\@
	.subsection	1
	.align		2
.La\@:	.long		\sym - .Lpc\@
	.previous
	.else
	.ifnb		\c
 THUMB(	ittt		\c			)
	.endif
	movw\c		\tmp, #:lower16:\sym - .Lpc\@
	movt\c		\tmp, #:upper16:\sym - .Lpc\@
	.endif

#ifndef CONFIG_THUMB2_KERNEL
	.set		.Lpc\@, . + 8			// PC bias
	.ifc		\op, add
	add\c		\reg, \tmp, pc
	.else
	\op\c		\reg, [pc, \tmp]
	.endif
#else
.Lb\@:	add\c		\tmp, \tmp, pc
	/*
	 * In Thumb-2 builds, the PC bias depends on whether we are currently
	 * emitting into a .arm or a .thumb section. The size of the add opcode
	 * above will be 2 bytes when emitting in Thumb mode and 4 bytes when
	 * emitting in ARM mode, so let's use this to account for the bias.
	 */
	.set		.Lpc\@, . + (. - .Lb\@)

.ifnc		\op, add
	\op\c		\reg, [\tmp]
	.endif
#endif
	.endm

/*
	 * mov_l - move a constant value or [relocated] address into a register
	 */
	.macro		mov_l, dst:req, imm:req
	.if		__LINUX_ARM_ARCH__ < 7
	ldr		\dst, =\imm
	.else
	movw		\dst, #:lower16:\imm
	movt		\dst, #:upper16:\imm
	.endif
	.endm

/*
	 * adr_l - adr pseudo-op with unlimited range
	 *
	 * @dst: destination register
	 * @sym: name of the symbol
	 * @cond: conditional opcode suffix
	 */
	.macro		adr_l, dst:req, sym:req, cond
	__adldst_l	add, \dst, \sym, \dst, \cond
	.endm

/*
	 * ldr_l - ldr <literal> pseudo-op with unlimited range
	 *
	 * @dst: destination register
	 * @sym: name of the symbol
	 * @cond: conditional opcode suffix
	 */
	.macro		ldr_l, dst:req, sym:req, cond
	__adldst_l	ldr, \dst, \sym, \dst, \cond
	.endm

/*
	 * str_l - str <literal> pseudo-op with unlimited range
	 *
	 * @src: source register
	 * @sym: name of the symbol
	 * @tmp: mandatory scratch register
	 * @cond: conditional opcode suffix
	 */
	.macro		str_l, src:req, sym:req, tmp:req, cond
	__adldst_l	str, \src, \sym, \tmp, \cond
	.endm

/*
	 * rev_l - byte-swap a 32-bit value
	 *
	 * @val: source/destination register
	 * @tmp: scratch register
	 */
	.macro		rev_l, val:req, tmp:req
	.if		__LINUX_ARM_ARCH__ < 6
	eor		\tmp, \val, \val, ror #16
	bic		\tmp, \tmp, #0x00ff0000
	mov		\val, \val, ror #8
	eor		\val, \val, \tmp, lsr #8
	.else
	rev		\val, \val
	.endif
	.endm

#endif /* __ASM_ASSEMBLER_H__ */

cmd: