FM / asm

/usr/src/linux-headers-5.15.0-181/arch/arm64/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/arm64/include/asm

Name	Size	Mode	Actions
vdso/	-	0755	rm
xen/	-	0755	rm
acenv.h	395	0644	edit dl rm
acpi.h	4942	0644	edit dl rm
alternative-macros.h	5537	0644	edit dl rm
alternative.h	1013	0644	edit dl rm
archrandom.h	3121	0644	edit dl rm
arch_gicv3.h	4055	0644	edit dl rm
arch_timer.h	4631	0644	edit dl rm
arm-cci.h	254	0644	edit dl rm
arm_dsu_pmu.h	3007	0644	edit dl rm
asm-bug.h	952	0644	edit dl rm
asm-offsets.h	35	0644	edit dl rm
asm-prototypes.h	958	0644	edit dl rm
asm-uaccess.h	2296	0644	edit dl rm
asm_pointer_auth.h	2432	0644	edit dl rm
assembler.h	21164	0644	edit dl rm
atomic.h	8618	0644	edit dl rm
atomic_ll_sc.h	10254	0644	edit dl rm
atomic_lse.h	11233	0644	edit dl rm
barrier.h	5429	0644	edit dl rm
bitops.h	850	0644	edit dl rm
bitrev.h	452	0644	edit dl rm
boot.h	369	0644	edit dl rm
brk-imm.h	889	0644	edit dl rm
bug.h	572	0644	edit dl rm
cache.h	3248	0644	edit dl rm
cacheflush.h	4873	0644	edit dl rm
checksum.h	1088	0644	edit dl rm
clocksource.h	136	0644	edit dl rm
cmpxchg.h	8057	0644	edit dl rm
compat.h	3919	0644	edit dl rm
compiler.h	1309	0644	edit dl rm
cpu.h	1520	0644	edit dl rm
cpufeature.h	29001	0644	edit dl rm
cpuidle.h	1330	0644	edit dl rm
cputype.h	11804	0644	edit dl rm
cpu_ops.h	2409	0644	edit dl rm
current.h	517	0644	edit dl rm
daifflags.h	3533	0644	edit dl rm
dcc.h	981	0644	edit dl rm
debug-monitors.h	3284	0644	edit dl rm
device.h	189	0644	edit dl rm
dmi.h	850	0644	edit dl rm
efi.h	4494	0644	edit dl rm
el2_setup.h	5363	0644	edit dl rm
elf.h	8196	0644	edit dl rm
esr.h	12549	0644	edit dl rm
exception.h	3015	0644	edit dl rm
exec.h	278	0644	edit dl rm
extable.h	1127	0644	edit dl rm
fb.h	460	0644	edit dl rm
fixmap.h	3099	0644	edit dl rm
fpsimd.h	5490	0644	edit dl rm
fpsimdmacros.h	6004	0644	edit dl rm
ftrace.h	2962	0644	edit dl rm
futex.h	2953	0644	edit dl rm
hardirq.h	2335	0644	edit dl rm
hugetlb.h	1920	0644	edit dl rm
hwcap.h	5207	0644	edit dl rm
hw_breakpoint.h	4091	0644	edit dl rm
hyperv-tlfs.h	2077	0644	edit dl rm
hypervisor.h	228	0644	edit dl rm
hyp_image.h	1911	0644	edit dl rm
image.h	1509	0644	edit dl rm
insn-def.h	571	0644	edit dl rm
insn.h	21884	0644	edit dl rm
io.h	6631	0644	edit dl rm
irq.h	395	0644	edit dl rm
irqflags.h	2933	0644	edit dl rm
irq_work.h	192	0644	edit dl rm
jump_label.h	1195	0644	edit dl rm
kasan.h	1568	0644	edit dl rm
Kbuild	186	0644	edit dl rm
kernel-pgtable.h	5023	0644	edit dl rm
kexec.h	2795	0644	edit dl rm
kfence.h	410	0644	edit dl rm
kgdb.h	3346	0644	edit dl rm
kprobes.h	1063	0644	edit dl rm
kvm_arm.h	12619	0644	edit dl rm
kvm_asm.h	9921	0644	edit dl rm
kvm_emulate.h	12462	0644	edit dl rm
kvm_host.h	25912	0644	edit dl rm
kvm_hyp.h	4389	0644	edit dl rm
kvm_mmu.h	8874	0644	edit dl rm
kvm_mte.h	1378	0644	edit dl rm
kvm_pgtable.h	19676	0644	edit dl rm
kvm_ptrauth.h	3543	0644	edit dl rm
kvm_ras.h	603	0644	edit dl rm
kvm_types.h	185	0644	edit dl rm
linkage.h	1751	0644	edit dl rm
lse.h	1267	0644	edit dl rm
memory.h	11838	0644	edit dl rm
mman.h	2699	0644	edit dl rm
mmu.h	2476	0644	edit dl rm
mmu_context.h	6944	0644	edit dl rm
mmzone.h	266	0644	edit dl rm
module.h	1810	0644	edit dl rm
module.lds.h	646	0644	edit dl rm
mshyperv.h	1387	0644	edit dl rm
mte-def.h	505	0644	edit dl rm
mte-kasan.h	3640	0644	edit dl rm
mte.h	3426	0644	edit dl rm
neon-intrinsics.h	959	0644	edit dl rm
neon.h	385	0644	edit dl rm
numa.h	165	0644	edit dl rm
page-def.h	441	0644	edit dl rm
page.h	1365	0644	edit dl rm
paravirt.h	580	0644	edit dl rm
patching.h	370	0644	edit dl rm
pci.h	764	0644	edit dl rm
percpu.h	8175	0644	edit dl rm
perf_event.h	10785	0644	edit dl rm
pgalloc.h	2269	0644	edit dl rm
pgtable-hwdef.h	10167	0644	edit dl rm
pgtable-prot.h	4302	0644	edit dl rm
pgtable-types.h	1305	0644	edit dl rm
pgtable.h	29965	0644	edit dl rm
pointer_auth.h	4651	0644	edit dl rm
preempt.h	2366	0644	edit dl rm
probes.h	650	0644	edit dl rm
proc-fns.h	562	0644	edit dl rm
processor.h	10002	0644	edit dl rm
ptdump.h	889	0644	edit dl rm
ptrace.h	10539	0644	edit dl rm
pvclock-abi.h	374	0644	edit dl rm
rwonce.h	2009	0644	edit dl rm
scs.h	497	0644	edit dl rm
sdei.h	1967	0644	edit dl rm
seccomp.h	870	0644	edit dl rm
sections.h	1099	0644	edit dl rm
setup.h	195	0644	edit dl rm
set_memory.h	487	0644	edit dl rm
shmparam.h	425	0644	edit dl rm
signal.h	650	0644	edit dl rm
signal32.h	1980	0644	edit dl rm
simd.h	1488	0644	edit dl rm
smp.h	3955	0644	edit dl rm
smp_plat.h	824	0644	edit dl rm
sparsemem.h	682	0644	edit dl rm
spectre.h	3000	0644	edit dl rm
spinlock.h	601	0644	edit dl rm
spinlock_types.h	360	0644	edit dl rm
stackprotector.h	1359	0644	edit dl rm
stacktrace.h	4314	0644	edit dl rm
stack_pointer.h	247	0644	edit dl rm
stage2_pgtable.h	1058	0644	edit dl rm
stat.h	947	0644	edit dl rm
string.h	1972	0644	edit dl rm
suspend.h	1694	0644	edit dl rm
sync_bitops.h	1085	0644	edit dl rm
syscall.h	2146	0644	edit dl rm
syscall_wrapper.h	3120	0644	edit dl rm
sysreg.h	45773	0644	edit dl rm
system_misc.h	880	0644	edit dl rm
thread_info.h	3887	0644	edit dl rm
timex.h	343	0644	edit dl rm
tlb.h	2332	0644	edit dl rm
tlbflush.h	11891	0644	edit dl rm
topology.h	1203	0644	edit dl rm
trans_pgd.h	1036	0644	edit dl rm
traps.h	2909	0644	edit dl rm
uaccess.h	13718	0644	edit dl rm
unistd.h	1361	0644	edit dl rm
unistd32.h	31568	0644	edit dl rm
uprobes.h	579	0644	edit dl rm
vdso.h	631	0644	edit dl rm
vectors.h	1775	0644	edit dl rm
vermagic.h	200	0644	edit dl rm
virt.h	3569	0644	edit dl rm
vmalloc.h	694	0644	edit dl rm
vmap_stack.h	703	0644	edit dl rm
word-at-a-time.h	1797	0644	edit dl rm
xor.h	1668	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/arm64/include/asm/uaccess.h (13718B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Based on arch/arm/include/asm/uaccess.h
 *
 * Copyright (C) 2012 ARM Ltd.
 */
#ifndef __ASM_UACCESS_H
#define __ASM_UACCESS_H

#include <asm/alternative.h>
#include <asm/kernel-pgtable.h>
#include <asm/sysreg.h>

/*
 * User space memory access functions
 */
#include <linux/bitops.h>
#include <linux/kasan-checks.h>
#include <linux/string.h>

#include <asm/cpufeature.h>
#include <asm/mmu.h>
#include <asm/mte.h>
#include <asm/ptrace.h>
#include <asm/memory.h>
#include <asm/extable.h>

#define HAVE_GET_KERNEL_NOFAULT

/*
 * Test whether a block of memory is a valid user space address.
 * Returns 1 if the range is valid, 0 otherwise.
 *
 * This is equivalent to the following test:
 * (u65)addr + (u65)size <= (u65)TASK_SIZE_MAX
 */
static inline unsigned long __range_ok(const void __user *addr, unsigned long size)
{
	unsigned long ret, limit = TASK_SIZE_MAX - 1;

/*
	 * Asynchronous I/O running in a kernel thread does not have the
	 * TIF_TAGGED_ADDR flag of the process owning the mm, so always untag
	 * the user address before checking.
	 */
	if (IS_ENABLED(CONFIG_ARM64_TAGGED_ADDR_ABI) &&
	    (current->flags & PF_KTHREAD || test_thread_flag(TIF_TAGGED_ADDR)))
		addr = untagged_addr(addr);

__chk_user_ptr(addr);
	asm volatile(
	// A + B <= C + 1 for all A,B,C, in four easy steps:
	// 1: X = A + B; X' = X % 2^64
	"	adds	%0, %3, %2\n"
	// 2: Set C = 0 if X > 2^64, to guarantee X' > C in step 4
	"	csel	%1, xzr, %1, hi\n"
	// 3: Set X' = ~0 if X >= 2^64. For X == 2^64, this decrements X'
	//    to compensate for the carry flag being set in step 4. For
	//    X > 2^64, X' merely has to remain nonzero, which it does.
	"	csinv	%0, %0, xzr, cc\n"
	// 4: For X < 2^64, this gives us X' - C - 1 <= 0, where the -1
	//    comes from the carry in being clear. Otherwise, we are
	//    testing X' - C == 0, subject to the previous adjustments.
	"	sbcs	xzr, %0, %1\n"
	"	cset	%0, ls\n"
	: "=&r" (ret), "+r" (limit) : "Ir" (size), "0" (addr) : "cc");

return ret;
}

#define access_ok(addr, size)	__range_ok(addr, size)

#define _ASM_EXTABLE(from, to)						\
	"	.pushsection	__ex_table, \"a\"\n"			\
	"	.align		3\n"					\
	"	.long		(" #from " - .), (" #to " - .)\n"	\
	"	.popsection\n"

/*
 * User access enabling/disabling.
 */
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
static inline void __uaccess_ttbr0_disable(void)
{
	unsigned long flags, ttbr;

local_irq_save(flags);
	ttbr = read_sysreg(ttbr1_el1);
	ttbr &= ~TTBR_ASID_MASK;
	/* reserved_pg_dir placed before swapper_pg_dir */
	write_sysreg(ttbr - RESERVED_SWAPPER_OFFSET, ttbr0_el1);
	isb();
	/* Set reserved ASID */
	write_sysreg(ttbr, ttbr1_el1);
	isb();
	local_irq_restore(flags);
}

static inline void __uaccess_ttbr0_enable(void)
{
	unsigned long flags, ttbr0, ttbr1;

/*
	 * Disable interrupts to avoid preemption between reading the 'ttbr0'
	 * variable and the MSR. A context switch could trigger an ASID
	 * roll-over and an update of 'ttbr0'.
	 */
	local_irq_save(flags);
	ttbr0 = READ_ONCE(current_thread_info()->ttbr0);

/* Restore active ASID */
	ttbr1 = read_sysreg(ttbr1_el1);
	ttbr1 &= ~TTBR_ASID_MASK;		/* safety measure */
	ttbr1 |= ttbr0 & TTBR_ASID_MASK;
	write_sysreg(ttbr1, ttbr1_el1);
	isb();

/* Restore user page table */
	write_sysreg(ttbr0, ttbr0_el1);
	isb();
	local_irq_restore(flags);
}

static inline bool uaccess_ttbr0_disable(void)
{
	if (!system_uses_ttbr0_pan())
		return false;
	__uaccess_ttbr0_disable();
	return true;
}

static inline bool uaccess_ttbr0_enable(void)
{
	if (!system_uses_ttbr0_pan())
		return false;
	__uaccess_ttbr0_enable();
	return true;
}
#else
static inline bool uaccess_ttbr0_disable(void)
{
	return false;
}

static inline bool uaccess_ttbr0_enable(void)
{
	return false;
}
#endif

static inline void __uaccess_disable_hw_pan(void)
{
	asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN,
			CONFIG_ARM64_PAN));
}

static inline void __uaccess_enable_hw_pan(void)
{
	asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN,
			CONFIG_ARM64_PAN));
}

/*
 * The Tag Check Flag (TCF) mode for MTE is per EL, hence TCF0
 * affects EL0 and TCF affects EL1 irrespective of which TTBR is
 * used.
 * The kernel accesses TTBR0 usually with LDTR/STTR instructions
 * when UAO is available, so these would act as EL0 accesses using
 * TCF0.
 * However futex.h code uses exclusives which would be executed as
 * EL1, this can potentially cause a tag check fault even if the
 * user disables TCF0.
 *
 * To address the problem we set the PSTATE.TCO bit in uaccess_enable()
 * and reset it in uaccess_disable().
 *
 * The Tag check override (TCO) bit disables temporarily the tag checking
 * preventing the issue.
 */
static inline void __uaccess_disable_tco(void)
{
	asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0),
				 ARM64_MTE, CONFIG_KASAN_HW_TAGS));
}

static inline void __uaccess_enable_tco(void)
{
	asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1),
				 ARM64_MTE, CONFIG_KASAN_HW_TAGS));
}

/*
 * These functions disable tag checking only if in MTE async mode
 * since the sync mode generates exceptions synchronously and the
 * nofault or load_unaligned_zeropad can handle them.
 */
static inline void __uaccess_disable_tco_async(void)
{
	if (system_uses_mte_async_mode())
		 __uaccess_disable_tco();
}

static inline void __uaccess_enable_tco_async(void)
{
	if (system_uses_mte_async_mode())
		__uaccess_enable_tco();
}

static inline void uaccess_disable_privileged(void)
{
	__uaccess_disable_tco();

if (uaccess_ttbr0_disable())
		return;

__uaccess_enable_hw_pan();
}

static inline void uaccess_enable_privileged(void)
{
	__uaccess_enable_tco();

if (uaccess_ttbr0_enable())
		return;

__uaccess_disable_hw_pan();
}

/*
 * Sanitise a uaccess pointer such that it becomes NULL if above the maximum
 * user address. In case the pointer is tagged (has the top byte set), untag
 * the pointer before checking.
 */
#define uaccess_mask_ptr(ptr) (__typeof__(ptr))__uaccess_mask_ptr(ptr)
static inline void __user *__uaccess_mask_ptr(const void __user *ptr)
{
	void __user *safe_ptr;

asm volatile(
	"	bics	xzr, %3, %2\n"
	"	csel	%0, %1, xzr, eq\n"
	: "=&r" (safe_ptr)
	: "r" (ptr), "r" (TASK_SIZE_MAX - 1),
	  "r" (untagged_addr(ptr))
	: "cc");

csdb();
	return safe_ptr;
}

/*
 * The "__xxx" versions of the user access functions do not verify the address
 * space - it must have been done previously with a separate "access_ok()"
 * call.
 *
 * The "__xxx_error" versions set the third argument to -EFAULT if an error
 * occurs, and leave it unchanged on success.
 */
#define __get_mem_asm(load, reg, x, addr, err)				\
	asm volatile(							\
	"1:	" load "	" reg "1, [%2]\n"			\
	"2:\n"								\
	"	.section .fixup, \"ax\"\n"				\
	"	.align	2\n"						\
	"3:	mov	%w0, %3\n"					\
	"	mov	%1, #0\n"					\
	"	b	2b\n"						\
	"	.previous\n"						\
	_ASM_EXTABLE(1b, 3b)						\
	: "+r" (err), "=&r" (x)						\
	: "r" (addr), "i" (-EFAULT))

#define __raw_get_mem(ldr, x, ptr, err)					\
do {									\
	unsigned long __gu_val;						\
	switch (sizeof(*(ptr))) {					\
	case 1:								\
		__get_mem_asm(ldr "b", "%w", __gu_val, (ptr), (err));	\
		break;							\
	case 2:								\
		__get_mem_asm(ldr "h", "%w", __gu_val, (ptr), (err));	\
		break;							\
	case 4:								\
		__get_mem_asm(ldr, "%w", __gu_val, (ptr), (err));	\
		break;							\
	case 8:								\
		__get_mem_asm(ldr, "%x",  __gu_val, (ptr), (err));	\
		break;							\
	default:							\
		BUILD_BUG();						\
	}								\
	(x) = (__force __typeof__(*(ptr)))__gu_val;			\
} while (0)

/*
 * We must not call into the scheduler between uaccess_ttbr0_enable() and
 * uaccess_ttbr0_disable(). As `x` and `ptr` could contain blocking functions,
 * we must evaluate these outside of the critical section.
 */
#define __raw_get_user(x, ptr, err)					\
do {									\
	__typeof__(*(ptr)) __user *__rgu_ptr = (ptr);			\
	__typeof__(x) __rgu_val;					\
	__chk_user_ptr(ptr);						\
									\
	uaccess_ttbr0_enable();						\
	__raw_get_mem("ldtr", __rgu_val, __rgu_ptr, err);		\
	uaccess_ttbr0_disable();					\
									\
	(x) = __rgu_val;						\
} while (0)

#define __get_user_error(x, ptr, err)					\
do {									\
	__typeof__(*(ptr)) __user *__p = (ptr);				\
	might_fault();							\
	if (access_ok(__p, sizeof(*__p))) {				\
		__p = uaccess_mask_ptr(__p);				\
		__raw_get_user((x), __p, (err));			\
	} else {							\
		(x) = (__force __typeof__(x))0; (err) = -EFAULT;	\
	}								\
} while (0)

#define __get_user(x, ptr)						\
({									\
	int __gu_err = 0;						\
	__get_user_error((x), (ptr), __gu_err);				\
	__gu_err;							\
})

#define get_user	__get_user

/*
 * We must not call into the scheduler between __uaccess_enable_tco_async() and
 * __uaccess_disable_tco_async(). As `dst` and `src` may contain blocking
 * functions, we must evaluate these outside of the critical section.
 */
#define __get_kernel_nofault(dst, src, type, err_label)			\
do {									\
	__typeof__(dst) __gkn_dst = (dst);				\
	__typeof__(src) __gkn_src = (src);				\
	int __gkn_err = 0;						\
									\
	__uaccess_enable_tco_async();					\
	__raw_get_mem("ldr", *((type *)(__gkn_dst)),			\
		      (__force type *)(__gkn_src), __gkn_err);		\
	__uaccess_disable_tco_async();					\
									\
	if (unlikely(__gkn_err))					\
		goto err_label;						\
} while (0)

#define __put_mem_asm(store, reg, x, addr, err)				\
	asm volatile(							\
	"1:	" store "	" reg "1, [%2]\n"			\
	"2:\n"								\
	"	.section .fixup,\"ax\"\n"				\
	"	.align	2\n"						\
	"3:	mov	%w0, %3\n"					\
	"	b	2b\n"						\
	"	.previous\n"						\
	_ASM_EXTABLE(1b, 3b)						\
	: "+r" (err)							\
	: "r" (x), "r" (addr), "i" (-EFAULT))

#define __raw_put_mem(str, x, ptr, err)					\
do {									\
	__typeof__(*(ptr)) __pu_val = (x);				\
	switch (sizeof(*(ptr))) {					\
	case 1:								\
		__put_mem_asm(str "b", "%w", __pu_val, (ptr), (err));	\
		break;							\
	case 2:								\
		__put_mem_asm(str "h", "%w", __pu_val, (ptr), (err));	\
		break;							\
	case 4:								\
		__put_mem_asm(str, "%w", __pu_val, (ptr), (err));	\
		break;							\
	case 8:								\
		__put_mem_asm(str, "%x", __pu_val, (ptr), (err));	\
		break;							\
	default:							\
		BUILD_BUG();						\
	}								\
} while (0)

/*
 * We must not call into the scheduler between uaccess_ttbr0_enable() and
 * uaccess_ttbr0_disable(). As `x` and `ptr` could contain blocking functions,
 * we must evaluate these outside of the critical section.
 */
#define __raw_put_user(x, ptr, err)					\
do {									\
	__typeof__(*(ptr)) __user *__rpu_ptr = (ptr);			\
	__typeof__(*(ptr)) __rpu_val = (x);				\
	__chk_user_ptr(__rpu_ptr);					\
									\
	uaccess_ttbr0_enable();						\
	__raw_put_mem("sttr", __rpu_val, __rpu_ptr, err);		\
	uaccess_ttbr0_disable();					\
} while (0)

#define __put_user_error(x, ptr, err)					\
do {									\
	__typeof__(*(ptr)) __user *__p = (ptr);				\
	might_fault();							\
	if (access_ok(__p, sizeof(*__p))) {				\
		__p = uaccess_mask_ptr(__p);				\
		__raw_put_user((x), __p, (err));			\
	} else	{							\
		(err) = -EFAULT;					\
	}								\
} while (0)

#define __put_user(x, ptr)						\
({									\
	int __pu_err = 0;						\
	__put_user_error((x), (ptr), __pu_err);				\
	__pu_err;							\
})

#define put_user	__put_user

/*
 * We must not call into the scheduler between __uaccess_enable_tco_async() and
 * __uaccess_disable_tco_async(). As `dst` and `src` may contain blocking
 * functions, we must evaluate these outside of the critical section.
 */
#define __put_kernel_nofault(dst, src, type, err_label)			\
do {									\
	__typeof__(dst) __pkn_dst = (dst);				\
	__typeof__(src) __pkn_src = (src);				\
	int __pkn_err = 0;						\
									\
	__uaccess_enable_tco_async();					\
	__raw_put_mem("str", *((type *)(__pkn_src)),			\
		      (__force type *)(__pkn_dst), __pkn_err);		\
	__uaccess_disable_tco_async();					\
									\
	if (unlikely(__pkn_err))					\
		goto err_label;						\
} while(0)

extern unsigned long __must_check __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
#define raw_copy_from_user(to, from, n)					\
({									\
	unsigned long __acfu_ret;					\
	uaccess_ttbr0_enable();						\
	__acfu_ret = __arch_copy_from_user((to),			\
				      __uaccess_mask_ptr(from), (n));	\
	uaccess_ttbr0_disable();					\
	__acfu_ret;							\
})

extern unsigned long __must_check __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
#define raw_copy_to_user(to, from, n)					\
({									\
	unsigned long __actu_ret;					\
	uaccess_ttbr0_enable();						\
	__actu_ret = __arch_copy_to_user(__uaccess_mask_ptr(to),	\
				    (from), (n));			\
	uaccess_ttbr0_disable();					\
	__actu_ret;							\
})

#define INLINE_COPY_TO_USER
#define INLINE_COPY_FROM_USER

extern unsigned long __must_check __arch_clear_user(void __user *to, unsigned long n);
static inline unsigned long __must_check __clear_user(void __user *to, unsigned long n)
{
	if (access_ok(to, n)) {
		uaccess_ttbr0_enable();
		n = __arch_clear_user(__uaccess_mask_ptr(to), n);
		uaccess_ttbr0_disable();
	}
	return n;
}
#define clear_user	__clear_user

extern long strncpy_from_user(char *dest, const char __user *src, long count);

extern __must_check long strnlen_user(const char __user *str, long n);

#ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
struct page;
void memcpy_page_flushcache(char *to, struct page *page, size_t offset, size_t len);
extern unsigned long __must_check __copy_user_flushcache(void *to, const void __user *from, unsigned long n);

static inline int __copy_from_user_flushcache(void *dst, const void __user *src, unsigned size)
{
	kasan_check_write(dst, size);
	return __copy_user_flushcache(dst, __uaccess_mask_ptr(src), size);
}
#endif

#endif /* __ASM_UACCESS_H */

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