FM / asm

/usr/src/linux-headers-5.15.0-181/arch/hexagon/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/hexagon/include/asm

Name	Size	Mode	Actions
asm-offsets.h	35	0644	edit dl rm
atomic.h	4361	0644	edit dl rm
bitops.h	6152	0644	edit dl rm
cache.h	555	0644	edit dl rm
cacheflush.h	2725	0644	edit dl rm
checksum.h	685	0644	edit dl rm
cmpxchg.h	2003	0644	edit dl rm
delay.h	344	0644	edit dl rm
dma.h	300	0644	edit dl rm
elf.h	5758	0644	edit dl rm
exec.h	398	0644	edit dl rm
fixmap.h	369	0644	edit dl rm
fpu.h	90	0644	edit dl rm
futex.h	2306	0644	edit dl rm
hexagon_vm.h	5909	0644	edit dl rm
intrinsics.h	369	0644	edit dl rm
io.h	6264	0644	edit dl rm
irq.h	523	0644	edit dl rm
irqflags.h	860	0644	edit dl rm
Kbuild	131	0644	edit dl rm
kgdb.h	754	0644	edit dl rm
linkage.h	237	0644	edit dl rm
mem-layout.h	2865	0644	edit dl rm
mmu.h	490	0644	edit dl rm
mmu_context.h	1544	0644	edit dl rm
page.h	4179	0644	edit dl rm
perf_event.h	207	0644	edit dl rm
pgalloc.h	2709	0644	edit dl rm
pgtable.h	11952	0644	edit dl rm
processor.h	3173	0644	edit dl rm
smp.h	707	0644	edit dl rm
spinlock.h	3295	0644	edit dl rm
spinlock_types.h	545	0644	edit dl rm
string.h	472	0644	edit dl rm
suspend.h	238	0644	edit dl rm
switch_to.h	478	0644	edit dl rm
syscall.h	1170	0644	edit dl rm
syscalls.h	204	0644	edit dl rm
thread_info.h	3505	0644	edit dl rm
time.h	346	0644	edit dl rm
timex.h	495	0644	edit dl rm
tlb.h	253	0644	edit dl rm
tlbflush.h	1497	0644	edit dl rm
traps.h	410	0644	edit dl rm
uaccess.h	1870	0644	edit dl rm
vdso.h	307	0644	edit dl rm
vermagic.h	299	0644	edit dl rm
vmalloc.h	99	0644	edit dl rm
vm_fault.h	359	0644	edit dl rm
vm_mmu.h	2818	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/hexagon/include/asm/spinlock.h (3295B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Spinlock support for the Hexagon architecture
 *
 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
 */

#ifndef _ASM_SPINLOCK_H
#define _ASM_SPINLOCK_H

#include <asm/irqflags.h>
#include <asm/barrier.h>
#include <asm/processor.h>

/*
 * This file is pulled in for SMP builds.
 * Really need to check all the barrier stuff for "true" SMP
 */

/*
 * Read locks:
 * - load the lock value
 * - increment it
 * - if the lock value is still negative, go back and try again.
 * - unsuccessful store is unsuccessful.  Go back and try again.  Loser.
 * - successful store new lock value if positive -> lock acquired
 */
static inline void arch_read_lock(arch_rwlock_t *lock)
{
	__asm__ __volatile__(
		"1:	R6 = memw_locked(%0);\n"
		"	{ P3 = cmp.ge(R6,#0); R6 = add(R6,#1);}\n"
		"	{ if (!P3) jump 1b; }\n"
		"	memw_locked(%0,P3) = R6;\n"
		"	{ if (!P3) jump 1b; }\n"
		:
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);

}

static inline void arch_read_unlock(arch_rwlock_t *lock)
{
	__asm__ __volatile__(
		"1:	R6 = memw_locked(%0);\n"
		"	R6 = add(R6,#-1);\n"
		"	memw_locked(%0,P3) = R6\n"
		"	if (!P3) jump 1b;\n"
		:
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);

}

/*  I think this returns 0 on fail, 1 on success.  */
static inline int arch_read_trylock(arch_rwlock_t *lock)
{
	int temp;
	__asm__ __volatile__(
		"	R6 = memw_locked(%1);\n"
		"	{ %0 = #0; P3 = cmp.ge(R6,#0); R6 = add(R6,#1);}\n"
		"	{ if (!P3) jump 1f; }\n"
		"	memw_locked(%1,P3) = R6;\n"
		"	{ %0 = P3 }\n"
		"1:\n"
		: "=&r" (temp)
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);
	return temp;
}

/*  Stuffs a -1 in the lock value?  */
static inline void arch_write_lock(arch_rwlock_t *lock)
{
	__asm__ __volatile__(
		"1:	R6 = memw_locked(%0)\n"
		"	{ P3 = cmp.eq(R6,#0);  R6 = #-1;}\n"
		"	{ if (!P3) jump 1b; }\n"
		"	memw_locked(%0,P3) = R6;\n"
		"	{ if (!P3) jump 1b; }\n"
		:
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);
}

static inline int arch_write_trylock(arch_rwlock_t *lock)
{
	int temp;
	__asm__ __volatile__(
		"	R6 = memw_locked(%1)\n"
		"	{ %0 = #0; P3 = cmp.eq(R6,#0);  R6 = #-1;}\n"
		"	{ if (!P3) jump 1f; }\n"
		"	memw_locked(%1,P3) = R6;\n"
		"	%0 = P3;\n"
		"1:\n"
		: "=&r" (temp)
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);
	return temp;

}

static inline void arch_write_unlock(arch_rwlock_t *lock)
{
	smp_mb();
	lock->lock = 0;
}

static inline void arch_spin_lock(arch_spinlock_t *lock)
{
	__asm__ __volatile__(
		"1:	R6 = memw_locked(%0);\n"
		"	P3 = cmp.eq(R6,#0);\n"
		"	{ if (!P3) jump 1b; R6 = #1; }\n"
		"	memw_locked(%0,P3) = R6;\n"
		"	{ if (!P3) jump 1b; }\n"
		:
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);

}

static inline void arch_spin_unlock(arch_spinlock_t *lock)
{
	smp_mb();
	lock->lock = 0;
}

static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
{
	int temp;
	__asm__ __volatile__(
		"	R6 = memw_locked(%1);\n"
		"	P3 = cmp.eq(R6,#0);\n"
		"	{ if (!P3) jump 1f; R6 = #1; %0 = #0; }\n"
		"	memw_locked(%1,P3) = R6;\n"
		"	%0 = P3;\n"
		"1:\n"
		: "=&r" (temp)
		: "r" (&lock->lock)
		: "memory", "r6", "p3"
	);
	return temp;
}

/*
 * SMP spinlocks are intended to allow only a single CPU at the lock
 */
#define arch_spin_is_locked(x) ((x)->lock != 0)

#endif

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