FM / octeon

/usr/src/linux-headers-5.15.0-181/arch/mips/include/asm/octeon/

/usr/src/linux-headers-5.15.0-181/arch/mips/include/asm/octeon

Name	Size	Mode	Actions
cvmx-address.h	9370	0644	edit dl rm
cvmx-agl-defs.h	41472	0644	edit dl rm
cvmx-asm.h	5200	0644	edit dl rm
cvmx-asxx-defs.h	13834	0644	edit dl rm
cvmx-boot-vector.h	1606	0644	edit dl rm
cvmx-bootinfo.h	14012	0644	edit dl rm
cvmx-bootmem.h	11770	0644	edit dl rm
cvmx-ciu-defs.h	5876	0644	edit dl rm
cvmx-ciu2-defs.h	3033	0644	edit dl rm
cvmx-ciu3-defs.h	10966	0644	edit dl rm
cvmx-cmd-queue.h	18907	0644	edit dl rm
cvmx-config.h	6465	0644	edit dl rm
cvmx-coremask.h	2176	0644	edit dl rm
cvmx-dbg-defs.h	2646	0644	edit dl rm
cvmx-dpi-defs.h	20435	0644	edit dl rm
cvmx-fau.h	18651	0644	edit dl rm
cvmx-fpa-defs.h	28327	0644	edit dl rm
cvmx-fpa.h	8336	0644	edit dl rm
cvmx-gmxx-defs.h	56175	0644	edit dl rm
cvmx-gpio-defs.h	9093	0644	edit dl rm
cvmx-helper-board.h	4665	0644	edit dl rm
cvmx-helper-errata.h	1277	0644	edit dl rm
cvmx-helper-jtag.h	1530	0644	edit dl rm
cvmx-helper-loop.h	1976	0644	edit dl rm
cvmx-helper-npi.h	1957	0644	edit dl rm
cvmx-helper-rgmii.h	2964	0644	edit dl rm
cvmx-helper-sgmii.h	2814	0644	edit dl rm
cvmx-helper-spi.h	2781	0644	edit dl rm
cvmx-helper-util.h	5358	0644	edit dl rm
cvmx-helper-xaui.h	2809	0644	edit dl rm
cvmx-helper.h	5786	0644	edit dl rm
cvmx-iob-defs.h	20013	0644	edit dl rm
cvmx-ipd-defs.h	33621	0644	edit dl rm
cvmx-ipd.h	10740	0644	edit dl rm
cvmx-l2c-defs.h	8134	0644	edit dl rm
cvmx-l2c.h	11389	0644	edit dl rm
cvmx-l2d-defs.h	1941	0644	edit dl rm
cvmx-l2t-defs.h	5098	0644	edit dl rm
cvmx-led-defs.h	5060	0644	edit dl rm
cvmx-lmcx-defs.h	70048	0644	edit dl rm
cvmx-mio-defs.h	97717	0644	edit dl rm
cvmx-mixx-defs.h	10084	0644	edit dl rm
cvmx-npei-defs.h	84985	0644	edit dl rm
cvmx-npi-defs.h	59612	0644	edit dl rm
cvmx-packet.h	2115	0644	edit dl rm
cvmx-pci-defs.h	43270	0644	edit dl rm
cvmx-pciercx-defs.h	11497	0644	edit dl rm
cvmx-pcsx-defs.h	26539	0644	edit dl rm
cvmx-pcsxx-defs.h	19404	0644	edit dl rm
cvmx-pemx-defs.h	15316	0644	edit dl rm
cvmx-pescx-defs.h	13746	0644	edit dl rm
cvmx-pexp-defs.h	17041	0644	edit dl rm
cvmx-pip-defs.h	62364	0644	edit dl rm
cvmx-pip.h	16395	0644	edit dl rm
cvmx-pko-defs.h	48448	0644	edit dl rm
cvmx-pko.h	19611	0644	edit dl rm
cvmx-pow-defs.h	22571	0644	edit dl rm
cvmx-pow.h	65380	0644	edit dl rm
cvmx-rnm-defs.h	4085	0644	edit dl rm
cvmx-rst-defs.h	6482	0644	edit dl rm
cvmx-scratch.h	3869	0644	edit dl rm
cvmx-sli-defs.h	4055	0644	edit dl rm
cvmx-spi.h	9142	0644	edit dl rm
cvmx-spinlock.h	6385	0644	edit dl rm
cvmx-spxx-defs.h	10814	0644	edit dl rm
cvmx-sriox-defs.h	38100	0644	edit dl rm
cvmx-srxx-defs.h	3734	0644	edit dl rm
cvmx-stxx-defs.h	8241	0644	edit dl rm
cvmx-sysinfo.h	4043	0644	edit dl rm
cvmx-uctlx-defs.h	9492	0644	edit dl rm
cvmx-wqe.h	17491	0644	edit dl rm
cvmx.h	14181	0644	edit dl rm
octeon-feature.h	6533	0644	edit dl rm
octeon-model.h	16881	0644	edit dl rm
octeon.h	12451	0644	edit dl rm
pci-octeon.h	1751	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/mips/include/asm/octeon/pci-octeon.h (1751B)

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2005-2009 Cavium Networks
 */

#ifndef __PCI_OCTEON_H__
#define __PCI_OCTEON_H__

#include <linux/pci.h>

/*
 * The physical memory base mapped by BAR1.  256MB at the end of the
 * first 4GB.
 */
#define CVMX_PCIE_BAR1_PHYS_BASE ((1ull << 32) - (1ull << 28))
#define CVMX_PCIE_BAR1_PHYS_SIZE (1ull << 28)

/*
 * The RC base of BAR1.	 gen1 has a 39-bit BAR2, gen2 has 41-bit BAR2,
 * place BAR1 so it is the same for both.
 */
#define CVMX_PCIE_BAR1_RC_BASE (1ull << 41)

/*
 * pcibios_map_irq() is defined inside pci-octeon.c. All it does is
 * call the Octeon specific version pointed to by this variable. This
 * function needs to change for PCI or PCIe based hosts.
 */
extern int (*octeon_pcibios_map_irq)(const struct pci_dev *dev,
				     u8 slot, u8 pin);

/*
 * For PCI (not PCIe) the BAR2 base address.
 */
#define OCTEON_BAR2_PCI_ADDRESS 0x8000000000ull

/*
 * For PCI (not PCIe) the base of the memory mapped by BAR1
 */
extern u64 octeon_bar1_pci_phys;

/*
 * The following defines are used when octeon_dma_bar_type =
 * OCTEON_DMA_BAR_TYPE_BIG
 */
#define OCTEON_PCI_BAR1_HOLE_BITS 5
#define OCTEON_PCI_BAR1_HOLE_SIZE (1ul<<(OCTEON_PCI_BAR1_HOLE_BITS+3))

enum octeon_dma_bar_type {
	OCTEON_DMA_BAR_TYPE_INVALID,
	OCTEON_DMA_BAR_TYPE_SMALL,
	OCTEON_DMA_BAR_TYPE_BIG,
	OCTEON_DMA_BAR_TYPE_PCIE,
	OCTEON_DMA_BAR_TYPE_PCIE2
};

/*
 * This tells the DMA mapping system in dma-octeon.c how to map PCI
 * DMA addresses.
 */
extern enum octeon_dma_bar_type octeon_dma_bar_type;

void octeon_pci_dma_init(void);
extern char *octeon_swiotlb;

#endif

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