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/usr/src/linux-headers-5.15.0-181/arch/nds32/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/nds32/include/asm

Name	Size	Mode	Actions
assembler.h	598	0644	edit dl rm
barrier.h	431	0644	edit dl rm
bitfield.h	47127	0644	edit dl rm
cache.h	276	0644	edit dl rm
cacheflush.h	1986	0644	edit dl rm
cache_info.h	315	0644	edit dl rm
current.h	304	0644	edit dl rm
delay.h	938	0644	edit dl rm
elf.h	6021	0644	edit dl rm
fixmap.h	831	0644	edit dl rm
fpu.h	3195	0644	edit dl rm
fpuemu.h	1272	0644	edit dl rm
ftrace.h	1161	0644	edit dl rm
futex.h	2483	0644	edit dl rm
highmem.h	1624	0644	edit dl rm
io.h	2474	0644	edit dl rm
irqflags.h	848	0644	edit dl rm
Kbuild	194	0644	edit dl rm
l2_cache.h	4791	0644	edit dl rm
linkage.h	264	0644	edit dl rm
memory.h	2713	0644	edit dl rm
mmu.h	213	0644	edit dl rm
mmu_context.h	1409	0644	edit dl rm
nds32.h	2018	0644	edit dl rm
nds32_fpu_inst.h	2510	0644	edit dl rm
page.h	1591	0644	edit dl rm
perf_event.h	445	0644	edit dl rm
pgalloc.h	1419	0644	edit dl rm
pgtable.h	11676	0644	edit dl rm
pmu.h	13350	0644	edit dl rm
proc-fns.h	1668	0644	edit dl rm
processor.h	2405	0644	edit dl rm
ptrace.h	1686	0644	edit dl rm
sfp-machine.h	4463	0644	edit dl rm
shmparam.h	462	0644	edit dl rm
stacktrace.h	884	0644	edit dl rm
string.h	471	0644	edit dl rm
suspend.h	258	0644	edit dl rm
swab.h	810	0644	edit dl rm
syscall.h	5496	0644	edit dl rm
syscalls.h	510	0644	edit dl rm
thread_info.h	2390	0644	edit dl rm
tlb.h	249	0644	edit dl rm
tlbflush.h	1144	0644	edit dl rm
uaccess.h	8272	0644	edit dl rm
unistd.h	156	0644	edit dl rm
vdso.h	429	0644	edit dl rm
vdso_datapage.h	1104	0644	edit dl rm
vdso_timer_info.h	357	0644	edit dl rm
vermagic.h	214	0644	edit dl rm
vmalloc.h	93	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/nds32/include/asm/io.h (2474B)

/* SPDX-License-Identifier: GPL-2.0 */
// Copyright (C) 2005-2017 Andes Technology Corporation

#ifndef __ASM_NDS32_IO_H
#define __ASM_NDS32_IO_H

#include <linux/types.h>

#define __raw_writeb __raw_writeb
static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
{
	asm volatile("sbi %0, [%1]" : : "r" (val), "r" (addr));
}

#define __raw_writew __raw_writew
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
{
	asm volatile("shi %0, [%1]" : : "r" (val), "r" (addr));
}

#define __raw_writel __raw_writel
static inline void __raw_writel(u32 val, volatile void __iomem *addr)
{
	asm volatile("swi %0, [%1]" : : "r" (val), "r" (addr));
}

#define __raw_readb __raw_readb
static inline u8 __raw_readb(const volatile void __iomem *addr)
{
	u8 val;

asm volatile("lbi %0, [%1]" : "=r" (val) : "r" (addr));
	return val;
}

#define __raw_readw __raw_readw
static inline u16 __raw_readw(const volatile void __iomem *addr)
{
	u16 val;

asm volatile("lhi %0, [%1]" : "=r" (val) : "r" (addr));
	return val;
}

#define __raw_readl __raw_readl
static inline u32 __raw_readl(const volatile void __iomem *addr)
{
	u32 val;

asm volatile("lwi %0, [%1]" : "=r" (val) : "r" (addr));
	return val;
}

#define __iormb()               rmb()
#define __iowmb()               wmb()

/*
 * {read,write}{b,w,l,q}_relaxed() are like the regular version, but
 * are not guaranteed to provide ordering against spinlocks or memory
 * accesses.
 */

#define readb_relaxed(c)	({ u8  __v = __raw_readb(c); __v; })
#define readw_relaxed(c)	({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; })
#define readl_relaxed(c)	({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; })
#define writeb_relaxed(v,c)	((void)__raw_writeb((v),(c)))
#define writew_relaxed(v,c)	((void)__raw_writew((__force u16)cpu_to_le16(v),(c)))
#define writel_relaxed(v,c)	((void)__raw_writel((__force u32)cpu_to_le32(v),(c)))

/*
 * {read,write}{b,w,l,q}() access little endian memory and return result in
 * native endianness.
 */
#define readb(c)	({ u8  __v = readb_relaxed(c); __iormb(); __v; })
#define readw(c)	({ u16 __v = readw_relaxed(c); __iormb(); __v; })
#define readl(c)	({ u32 __v = readl_relaxed(c); __iormb(); __v; })

#define writeb(v,c)	({ __iowmb(); writeb_relaxed((v),(c)); })
#define writew(v,c)	({ __iowmb(); writew_relaxed((v),(c)); })
#define writel(v,c)	({ __iowmb(); writel_relaxed((v),(c)); })

#include <asm-generic/io.h>

#endif /* __ASM_NDS32_IO_H */

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