FM / asm

/usr/src/linux-headers-5.15.0-181/arch/s390/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/s390/include/asm

Name	Size	Mode	Actions
fpu/	-	0755	rm
trace/	-	0755	rm
vdso/	-	0755	rm
airq.h	3421	0644	edit dl rm
alternative-asm.h	3148	0644	edit dl rm
alternative.h	5742	0644	edit dl rm
ap.h	13098	0644	edit dl rm
appldata.h	1593	0644	edit dl rm
archrandom.h	1319	0644	edit dl rm
asm-const.h	376	0644	edit dl rm
asm-prototypes.h	227	0644	edit dl rm
atomic.h	4225	0644	edit dl rm
atomic_ops.h	5100	0644	edit dl rm
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futex.h	1927	0644	edit dl rm
gmap.h	5760	0644	edit dl rm
hardirq.h	777	0644	edit dl rm
hugetlb.h	2966	0644	edit dl rm
hw_irq.h	210	0644	edit dl rm
idals.h	5317	0644	edit dl rm
idle.h	753	0644	edit dl rm
io.h	2153	0644	edit dl rm
ipl.h	3708	0644	edit dl rm
irq.h	2635	0644	edit dl rm
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isc.h	1036	0644	edit dl rm
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jump_label.h	1411	0644	edit dl rm
kasan.h	1772	0644	edit dl rm
Kbuild	253	0644	edit dl rm
kdebug.h	386	0644	edit dl rm
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kvm_host.h	27155	0644	edit dl rm
kvm_para.h	3761	0644	edit dl rm
linkage.h	729	0644	edit dl rm
livepatch.h	474	0644	edit dl rm
lowcore.h	6595	0644	edit dl rm
mem_detect.h	2589	0644	edit dl rm
mem_encrypt.h	365	0644	edit dl rm
mmu.h	1515	0644	edit dl rm
mmu_context.h	3491	0644	edit dl rm
mmzone.h	316	0644	edit dl rm
module.h	1209	0644	edit dl rm
nmi.h	3698	0644	edit dl rm
nospec-branch.h	342	0644	edit dl rm
nospec-insn.h	3616	0644	edit dl rm
numa.h	386	0644	edit dl rm
os_info.h	1136	0644	edit dl rm
page-states.h	486	0644	edit dl rm
page.h	5194	0644	edit dl rm
pci.h	8691	0644	edit dl rm
pci_clp.h	5346	0644	edit dl rm
pci_debug.h	608	0644	edit dl rm
pci_dma.h	5541	0644	edit dl rm
pci_insn.h	4089	0644	edit dl rm
pci_io.h	4405	0644	edit dl rm
percpu.h	6638	0644	edit dl rm
perf_event.h	3245	0644	edit dl rm
pgalloc.h	4024	0644	edit dl rm
pgtable.h	51845	0644	edit dl rm
pkey.h	737	0644	edit dl rm
pnet.h	325	0644	edit dl rm
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processor.h	9637	0644	edit dl rm
ptdump.h	255	0644	edit dl rm
ptrace.h	5865	0644	edit dl rm
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schid.h	525	0644	edit dl rm
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seccomp.h	808	0644	edit dl rm
sections.h	1357	0644	edit dl rm
serial.h	147	0644	edit dl rm
setup.h	5156	0644	edit dl rm
set_memory.h	989	0644	edit dl rm
shmparam.h	285	0644	edit dl rm
signal.h	644	0644	edit dl rm
sigp.h	1900	0644	edit dl rm
smp.h	1932	0644	edit dl rm
softirq_stack.h	329	0644	edit dl rm
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string.h	5847	0644	edit dl rm
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termios.h	685	0644	edit dl rm
thread_info.h	3605	0644	edit dl rm
timex.h	6538	0644	edit dl rm
tlb.h	4296	0644	edit dl rm
tlbflush.h	3233	0644	edit dl rm
topology.h	2876	0644	edit dl rm
tpi.h	736	0644	edit dl rm
types.h	318	0644	edit dl rm
uaccess.h	10049	0644	edit dl rm
unistd.h	1030	0644	edit dl rm
unwind.h	3360	0644	edit dl rm
uprobes.h	588	0644	edit dl rm
user.h	3384	0644	edit dl rm
uv.h	10977	0644	edit dl rm
vdso.h	746	0644	edit dl rm
vga.h	170	0644	edit dl rm
vmalloc.h	90	0644	edit dl rm
vmlinux.lds.h	1167	0644	edit dl rm
vtime.h	718	0644	edit dl rm
vtimer.h	830	0644	edit dl rm
vx-insn.h	13477	0644	edit dl rm
xor.h	454	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/s390/include/asm/tlb.h (4296B)

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _S390_TLB_H
#define _S390_TLB_H

/*
 * TLB flushing on s390 is complicated. The following requirement
 * from the principles of operation is the most arduous:
 *
 * "A valid table entry must not be changed while it is attached
 * to any CPU and may be used for translation by that CPU except to
 * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
 * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
 * table entry, or (3) make a change by means of a COMPARE AND SWAP
 * AND PURGE instruction that purges the TLB."
 *
 * The modification of a pte of an active mm struct therefore is
 * a two step process: i) invalidate the pte, ii) store the new pte.
 * This is true for the page protection bit as well.
 * The only possible optimization is to flush at the beginning of
 * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
 *
 * Pages used for the page tables is a different story. FIXME: more
 */

void __tlb_remove_table(void *_table);
static inline void tlb_flush(struct mmu_gather *tlb);
static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
					  struct page *page, int page_size);

#define tlb_start_vma(tlb, vma)			do { } while (0)
#define tlb_end_vma(tlb, vma)			do { } while (0)

#define tlb_flush tlb_flush
#define pte_free_tlb pte_free_tlb
#define pmd_free_tlb pmd_free_tlb
#define p4d_free_tlb p4d_free_tlb
#define pud_free_tlb pud_free_tlb

#include <asm/tlbflush.h>
#include <asm-generic/tlb.h>

/*
 * Release the page cache reference for a pte removed by
 * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page
 * has already been freed, so just do free_page_and_swap_cache.
 */
static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
					  struct page *page, int page_size)
{
	free_page_and_swap_cache(page);
	return false;
}

static inline void tlb_flush(struct mmu_gather *tlb)
{
	__tlb_flush_mm_lazy(tlb->mm);
}

/*
 * pte_free_tlb frees a pte table and clears the CRSTE for the
 * page table from the tlb.
 */
static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
                                unsigned long address)
{
	__tlb_adjust_range(tlb, address, PAGE_SIZE);
	tlb->mm->context.flush_mm = 1;
	tlb->freed_tables = 1;
	tlb->cleared_pmds = 1;
	/*
	 * page_table_free_rcu takes care of the allocation bit masks
	 * of the 2K table fragments in the 4K page table page,
	 * then calls tlb_remove_table.
	 */
	page_table_free_rcu(tlb, (unsigned long *) pte, address);
}

/*
 * pmd_free_tlb frees a pmd table and clears the CRSTE for the
 * segment table entry from the tlb.
 * If the mm uses a two level page table the single pmd is freed
 * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
 * to avoid the double free of the pmd in this case.
 */
static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
				unsigned long address)
{
	if (mm_pmd_folded(tlb->mm))
		return;
	pgtable_pmd_page_dtor(virt_to_page(pmd));
	__tlb_adjust_range(tlb, address, PAGE_SIZE);
	tlb->mm->context.flush_mm = 1;
	tlb->freed_tables = 1;
	tlb->cleared_puds = 1;
	tlb_remove_table(tlb, pmd);
}

/*
 * p4d_free_tlb frees a pud table and clears the CRSTE for the
 * region second table entry from the tlb.
 * If the mm uses a four level page table the single p4d is freed
 * as the pgd. p4d_free_tlb checks the asce_limit against 8PB
 * to avoid the double free of the p4d in this case.
 */
static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
				unsigned long address)
{
	if (mm_p4d_folded(tlb->mm))
		return;
	__tlb_adjust_range(tlb, address, PAGE_SIZE);
	tlb->mm->context.flush_mm = 1;
	tlb->freed_tables = 1;
	tlb_remove_table(tlb, p4d);
}

/*
 * pud_free_tlb frees a pud table and clears the CRSTE for the
 * region third table entry from the tlb.
 * If the mm uses a three level page table the single pud is freed
 * as the pgd. pud_free_tlb checks the asce_limit against 4TB
 * to avoid the double free of the pud in this case.
 */
static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
				unsigned long address)
{
	if (mm_pud_folded(tlb->mm))
		return;
	tlb->mm->context.flush_mm = 1;
	tlb->freed_tables = 1;
	tlb->cleared_p4ds = 1;
	tlb_remove_table(tlb, pud);
}

#endif /* _S390_TLB_H */

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