FM / asm

/usr/src/linux-headers-5.15.0-181/arch/x86/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/x86/include/asm

Name	Size	Mode	Actions
e820/	-	0755	rm
fpu/	-	0755	rm
numachip/	-	0755	rm
trace/	-	0755	rm
uv/	-	0755	rm
vdso/	-	0755	rm
xen/	-	0755	rm
acenv.h	1450	0644	edit dl rm
acpi.h	4804	0644	edit dl rm
acrn.h	1834	0644	edit dl rm
agp.h	1073	0644	edit dl rm
alternative.h	13574	0644	edit dl rm
amd-ibs.h	4247	0644	edit dl rm
amd_nb.h	3136	0644	edit dl rm
apic.h	13646	0644	edit dl rm
apicdef.h	11563	0644	edit dl rm
apm.h	1842	0644	edit dl rm
archrandom.h	2347	0644	edit dl rm
arch_hweight.h	1083	0644	edit dl rm
asm-offsets.h	35	0644	edit dl rm
asm-prototypes.h	431	0644	edit dl rm
asm.h	6060	0644	edit dl rm
atomic.h	6766	0644	edit dl rm
atomic64_32.h	8367	0644	edit dl rm
atomic64_64.h	6410	0644	edit dl rm
audit.h	170	0644	edit dl rm
barrier.h	2368	0644	edit dl rm
bios_ebda.h	914	0644	edit dl rm
bitops.h	10149	0644	edit dl rm
boot.h	2397	0644	edit dl rm
bootparam_utils.h	2866	0644	edit dl rm
bug.h	2392	0644	edit dl rm
bugs.h	344	0644	edit dl rm
cache.h	622	0644	edit dl rm
cacheflush.h	329	0644	edit dl rm
cacheinfo.h	263	0644	edit dl rm
ce4100.h	121	0644	edit dl rm
checksum.h	240	0644	edit dl rm
checksum_32.h	4682	0644	edit dl rm
checksum_64.h	5164	0644	edit dl rm
clocksource.h	480	0644	edit dl rm
cmdline.h	302	0644	edit dl rm
cmpxchg.h	7937	0644	edit dl rm
cmpxchg_32.h	3243	0644	edit dl rm
cmpxchg_64.h	561	0644	edit dl rm
compat.h	4102	0644	edit dl rm
cpu.h	2099	0644	edit dl rm
cpufeature.h	8428	0644	edit dl rm
cpufeatures.h	33383	0644	edit dl rm
cpuidle_haltpoll.h	189	0644	edit dl rm
cpumask.h	829	0644	edit dl rm
cpu_device_id.h	10945	0644	edit dl rm
cpu_entry_area.h	4196	0644	edit dl rm
crash.h	300	0644	edit dl rm
current.h	443	0644	edit dl rm
debugreg.h	3641	0644	edit dl rm
delay.h	275	0644	edit dl rm
desc.h	11524	0644	edit dl rm
desc_defs.h	3396	0644	edit dl rm
device.h	176	0644	edit dl rm
disabled-features.h	3173	0644	edit dl rm
div64.h	2335	0644	edit dl rm
dma-mapping.h	519	0644	edit dl rm
dma.h	9811	0644	edit dl rm
dmi.h	556	0644	edit dl rm
doublefault.h	271	0644	edit dl rm
dwarf2.h	1325	0644	edit dl rm
edac.h	474	0644	edit dl rm
efi.h	12307	0644	edit dl rm
elf.h	12623	0644	edit dl rm
elfcore-compat.h	890	0644	edit dl rm
emergency-restart.h	202	0644	edit dl rm
emulate_prefix.h	484	0644	edit dl rm
enclu.h	181	0644	edit dl rm
entry-common.h	3322	0644	edit dl rm
espfix.h	426	0644	edit dl rm
exec.h	37	0644	edit dl rm
extable.h	1871	0644	edit dl rm
extable_fixup_types.h	1875	0644	edit dl rm
fb.h	540	0644	edit dl rm
fixmap.h	6094	0644	edit dl rm
floppy.h	6860	0644	edit dl rm
frame.h	2555	0644	edit dl rm
fsgsbase.h	2072	0644	edit dl rm
ftrace.h	3234	0644	edit dl rm
futex.h	2553	0644	edit dl rm
gart.h	2704	0644	edit dl rm
GEN-for-each-reg.h	345	0644	edit dl rm
genapic.h	22	0644	edit dl rm
geode.h	693	0644	edit dl rm
hardirq.h	2342	0644	edit dl rm
highmem.h	2466	0644	edit dl rm
hpet.h	3002	0644	edit dl rm
hugetlb.h	243	0644	edit dl rm
hw_breakpoint.h	2112	0644	edit dl rm
hw_irq.h	3070	0644	edit dl rm
hyperv-tlfs.h	17555	0644	edit dl rm
hypervisor.h	2360	0644	edit dl rm
i8259.h	2061	0644	edit dl rm
ia32.h	1791	0644	edit dl rm
ia32_unistd.h	313	0644	edit dl rm
idtentry.h	24197	0644	edit dl rm
imr.h	1684	0644	edit dl rm
inat.h	6092	0644	edit dl rm
inat_types.h	341	0644	edit dl rm
init.h	632	0644	edit dl rm
insn-eval.h	1379	0644	edit dl rm
insn.h	7867	0644	edit dl rm
inst.h	2066	0644	edit dl rm
intel-family.h	5775	0644	edit dl rm
intel-mid.h	1132	0644	edit dl rm
intel_ds.h	849	0644	edit dl rm
intel_pconfig.h	1545	0644	edit dl rm
intel_pt.h	1235	0644	edit dl rm
intel_punit_ipc.h	4666	0644	edit dl rm
intel_scu_ipc.h	2234	0644	edit dl rm
intel_telemetry.h	3723	0644	edit dl rm
invpcid.h	1487	0644	edit dl rm
io.h	12690	0644	edit dl rm
iomap.h	536	0644	edit dl rm
iommu.h	780	0644	edit dl rm
iommu_table.h	3910	0644	edit dl rm
iosf_mbi.h	7384	0644	edit dl rm
io_apic.h	5204	0644	edit dl rm
io_bitmap.h	1370	0644	edit dl rm
irq.h	1280	0644	edit dl rm
irqdomain.h	1915	0644	edit dl rm
irqflags.h	2976	0644	edit dl rm
irq_remapping.h	2061	0644	edit dl rm
irq_stack.h	7536	0644	edit dl rm
irq_vectors.h	4296	0644	edit dl rm
irq_work.h	358	0644	edit dl rm
ist.h	294	0644	edit dl rm
jailhouse_para.h	449	0644	edit dl rm
jump_label.h	1406	0644	edit dl rm
kasan.h	1291	0644	edit dl rm
kaslr.h	398	0644	edit dl rm
kbdleds.h	454	0644	edit dl rm
Kbuild	300	0644	edit dl rm
kdebug.h	1087	0644	edit dl rm
kexec-bzimage64.h	195	0644	edit dl rm
kexec.h	6011	0644	edit dl rm
kfence.h	2065	0644	edit dl rm
kgdb.h	2143	0644	edit dl rm
kprobes.h	3463	0644	edit dl rm
kvm-x86-ops.h	3921	0644	edit dl rm
kvmclock.h	506	0644	edit dl rm
kvm_host.h	60066	0644	edit dl rm
kvm_page_track.h	2504	0644	edit dl rm
kvm_para.h	3467	0644	edit dl rm
kvm_types.h	178	0644	edit dl rm
kvm_vcpu_regs.h	606	0644	edit dl rm
linkage.h	1139	0644	edit dl rm
livepatch.h	472	0644	edit dl rm
local.h	3925	0644	edit dl rm
mach_timer.h	1590	0644	edit dl rm
mach_traps.h	1013	0644	edit dl rm
math_emu.h	395	0644	edit dl rm
mc146818rtc.h	2835	0644	edit dl rm
mce.h	13125	0644	edit dl rm
memtype.h	899	0644	edit dl rm
mem_encrypt.h	3427	0644	edit dl rm
microcode.h	3865	0644	edit dl rm
microcode_amd.h	1573	0644	edit dl rm
microcode_intel.h	2521	0644	edit dl rm
misc.h	143	0644	edit dl rm
mmconfig.h	374	0644	edit dl rm
mmu.h	1740	0644	edit dl rm
mmu_context.h	6074	0644	edit dl rm
mmx.h	337	0644	edit dl rm
mmzone.h	129	0644	edit dl rm
mmzone_32.h	343	0644	edit dl rm
mmzone_64.h	430	0644	edit dl rm
module.h	324	0644	edit dl rm
mpspec.h	3652	0644	edit dl rm
mpspec_def.h	4256	0644	edit dl rm
mshyperv.h	5604	0644	edit dl rm
msi.h	1549	0644	edit dl rm
msr-index.h	40106	0644	edit dl rm
msr-trace.h	1387	0644	edit dl rm
msr.h	11061	0644	edit dl rm
mtrr.h	4753	0644	edit dl rm
mwait.h	4457	0644	edit dl rm
nmi.h	1444	0644	edit dl rm
nops.h	1905	0644	edit dl rm
nospec-branch.h	13073	0644	edit dl rm
numa.h	2193	0644	edit dl rm
numa_32.h	256	0644	edit dl rm
olpc.h	2382	0644	edit dl rm
olpc_ofw.h	1128	0644	edit dl rm
orc_lookup.h	1065	0644	edit dl rm
orc_types.h	2025	0644	edit dl rm
page.h	2510	0644	edit dl rm
page_32.h	1043	0644	edit dl rm
page_32_types.h	2399	0644	edit dl rm
page_64.h	2737	0644	edit dl rm
page_64_types.h	3139	0644	edit dl rm
page_types.h	2262	0644	edit dl rm
paravirt.h	18813	0644	edit dl rm
paravirt_types.h	19671	0644	edit dl rm
parport.h	314	0644	edit dl rm
pc-conf-reg.h	723	0644	edit dl rm
pci-direct.h	850	0644	edit dl rm
pci-functions.h	654	0644	edit dl rm
pci.h	3191	0644	edit dl rm
pci_x86.h	6477	0644	edit dl rm
percpu.h	16992	0644	edit dl rm
perf_event.h	16079	0644	edit dl rm
perf_event_p4.h	26731	0644	edit dl rm
pgalloc.h	5306	0644	edit dl rm
pgtable-2level.h	2815	0644	edit dl rm
pgtable-2level_types.h	921	0644	edit dl rm
pgtable-3level.h	8963	0644	edit dl rm
pgtable-3level_types.h	1030	0644	edit dl rm
pgtable-invert.h	1091	0644	edit dl rm
pgtable.h	33464	0644	edit dl rm
pgtable_32.h	2346	0644	edit dl rm
pgtable_32_areas.h	1582	0644	edit dl rm
pgtable_32_types.h	634	0644	edit dl rm
pgtable_64.h	7257	0644	edit dl rm
pgtable_64_types.h	4468	0644	edit dl rm
pgtable_areas.h	623	0644	edit dl rm
pgtable_types.h	17580	0644	edit dl rm
pkeys.h	3513	0644	edit dl rm
pkru.h	1346	0644	edit dl rm
platform_sst_audio.h	3101	0644	edit dl rm
pm-trace.h	611	0644	edit dl rm
posix_types.h	144	0644	edit dl rm
preempt.h	4051	0644	edit dl rm
probe_roms.h	273	0644	edit dl rm
processor-cyrix.h	383	0644	edit dl rm
processor-flags.h	1750	0644	edit dl rm
processor.h	22471	0644	edit dl rm
prom.h	821	0644	edit dl rm
proto.h	952	0644	edit dl rm
pti.h	372	0644	edit dl rm
ptrace.h	10491	0644	edit dl rm
purgatory.h	235	0644	edit dl rm
pvclock-abi.h	1530	0644	edit dl rm
pvclock.h	2702	0644	edit dl rm
qrwlock.h	199	0644	edit dl rm
qspinlock.h	3132	0644	edit dl rm
qspinlock_paravirt.h	1908	0644	edit dl rm
realmode.h	2099	0644	edit dl rm
reboot.h	948	0644	edit dl rm
reboot_fixups.h	183	0644	edit dl rm
required-features.h	2839	0644	edit dl rm
resctrl.h	2847	0644	edit dl rm
rmwcc.h	2277	0644	edit dl rm
seccomp.h	1205	0644	edit dl rm
sections.h	895	0644	edit dl rm
segment.h	10579	0644	edit dl rm
serial.h	1137	0644	edit dl rm
setup.h	3633	0644	edit dl rm
setup_arch.h	77	0644	edit dl rm
set_memory.h	5388	0644	edit dl rm
sev-common.h	3053	0644	edit dl rm
sev.h	2443	0644	edit dl rm
sgx.h	11389	0644	edit dl rm
shmparam.h	193	0644	edit dl rm
sigcontext.h	261	0644	edit dl rm
sigframe.h	2141	0644	edit dl rm
sighandling.h	526	0644	edit dl rm
signal.h	2428	0644	edit dl rm
simd.h	287	0644	edit dl rm
smap.h	2038	0644	edit dl rm
smp.h	5067	0644	edit dl rm
softirq_stack.h	216	0644	edit dl rm
sparsemem.h	1102	0644	edit dl rm
spec-ctrl.h	2875	0644	edit dl rm
special_insns.h	7170	0644	edit dl rm
spinlock.h	1214	0644	edit dl rm
spinlock_types.h	253	0644	edit dl rm
sta2x11.h	352	0644	edit dl rm
stackprotector.h	3095	0644	edit dl rm
stacktrace.h	2850	0644	edit dl rm
static_call.h	2868	0644	edit dl rm
string.h	129	0644	edit dl rm
string_32.h	6111	0644	edit dl rm
string_64.h	2852	0644	edit dl rm
suspend.h	496	0644	edit dl rm
suspend_32.h	876	0644	edit dl rm
suspend_64.h	1833	0644	edit dl rm
svm.h	10791	0644	edit dl rm
swiotlb.h	645	0644	edit dl rm
switch_to.h	2330	0644	edit dl rm
sync_bitops.h	3336	0644	edit dl rm
sync_core.h	3315	0644	edit dl rm
syscall.h	4310	0644	edit dl rm
syscalls.h	374	0644	edit dl rm
syscall_wrapper.h	9998	0644	edit dl rm
text-patching.h	5646	0644	edit dl rm
thermal.h	428	0644	edit dl rm
thread_info.h	7995	0644	edit dl rm
time.h	331	0644	edit dl rm
timer.h	1027	0644	edit dl rm
timex.h	546	0644	edit dl rm
tlb.h	1200	0644	edit dl rm
tlbbatch.h	332	0644	edit dl rm
tlbflush.h	7710	0644	edit dl rm
topology.h	6482	0644	edit dl rm
trace_clock.h	406	0644	edit dl rm
trapnr.h	1316	0644	edit dl rm
traps.h	1260	0644	edit dl rm
trap_pf.h	709	0644	edit dl rm
tsc.h	2016	0644	edit dl rm
uaccess.h	22210	0644	edit dl rm
uaccess_32.h	1006	0644	edit dl rm
uaccess_64.h	2440	0644	edit dl rm
umip.h	317	0644	edit dl rm
unistd.h	1630	0644	edit dl rm
unwind.h	3220	0644	edit dl rm
unwind_hints.h	1461	0644	edit dl rm
uprobes.h	1017	0644	edit dl rm
user.h	2257	0644	edit dl rm
user32.h	2156	0644	edit dl rm
user_32.h	5042	0644	edit dl rm
user_64.h	5339	0644	edit dl rm
vdso.h	1391	0644	edit dl rm
vermagic.h	1993	0644	edit dl rm
vga.h	740	0644	edit dl rm
vgtod.h	518	0644	edit dl rm
virtext.h	3460	0644	edit dl rm
vm86.h	2182	0644	edit dl rm
vmalloc.h	560	0644	edit dl rm
vmware.h	1942	0644	edit dl rm
vmx.h	26141	0644	edit dl rm
vmxfeatures.h	6049	0644	edit dl rm
vsyscall.h	988	0644	edit dl rm
vvar.h	1591	0644	edit dl rm
word-at-a-time.h	2596	0644	edit dl rm
x86_init.h	10176	0644	edit dl rm
xor.h	10107	0644	edit dl rm
xor_32.h	14347	0644	edit dl rm
xor_64.h	716	0644	edit dl rm
xor_avx.h	4344	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/x86/include/asm/apicdef.h (11563B)

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_APICDEF_H
#define _ASM_X86_APICDEF_H

/*
 * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)
 *
 * Alan Cox <Alan.Cox@linux.org>, 1995.
 * Ingo Molnar <mingo@redhat.com>, 1999, 2000
 */

#define IO_APIC_DEFAULT_PHYS_BASE	0xfec00000
#define	APIC_DEFAULT_PHYS_BASE		0xfee00000

/*
 * This is the IO-APIC register space as specified
 * by Intel docs:
 */
#define IO_APIC_SLOT_SIZE		1024

#define	APIC_ID		0x20

#define	APIC_LVR	0x30
#define		APIC_LVR_MASK		0xFF00FF
#define		APIC_LVR_DIRECTED_EOI	(1 << 24)
#define		GET_APIC_VERSION(x)	((x) & 0xFFu)
#define		GET_APIC_MAXLVT(x)	(((x) >> 16) & 0xFFu)
#ifdef CONFIG_X86_32
#  define	APIC_INTEGRATED(x)	((x) & 0xF0u)
#else
#  define	APIC_INTEGRATED(x)	(1)
#endif
#define		APIC_XAPIC(x)		((x) >= 0x14)
#define		APIC_EXT_SPACE(x)	((x) & 0x80000000)
#define	APIC_TASKPRI	0x80
#define		APIC_TPRI_MASK		0xFFu
#define	APIC_ARBPRI	0x90
#define		APIC_ARBPRI_MASK	0xFFu
#define	APIC_PROCPRI	0xA0
#define	APIC_EOI	0xB0
#define		APIC_EOI_ACK		0x0 /* Docs say 0 for future compat. */
#define	APIC_RRR	0xC0
#define	APIC_LDR	0xD0
#define		APIC_LDR_MASK		(0xFFu << 24)
#define		GET_APIC_LOGICAL_ID(x)	(((x) >> 24) & 0xFFu)
#define		SET_APIC_LOGICAL_ID(x)	(((x) << 24))
#define		APIC_ALL_CPUS		0xFFu
#define	APIC_DFR	0xE0
#define		APIC_DFR_CLUSTER		0x0FFFFFFFul
#define		APIC_DFR_FLAT			0xFFFFFFFFul
#define	APIC_SPIV	0xF0
#define		APIC_SPIV_DIRECTED_EOI		(1 << 12)
#define		APIC_SPIV_FOCUS_DISABLED	(1 << 9)
#define		APIC_SPIV_APIC_ENABLED		(1 << 8)
#define	APIC_ISR	0x100
#define	APIC_ISR_NR     0x8     /* Number of 32 bit ISR registers. */
#define	APIC_TMR	0x180
#define	APIC_IRR	0x200
#define	APIC_ESR	0x280
#define		APIC_ESR_SEND_CS	0x00001
#define		APIC_ESR_RECV_CS	0x00002
#define		APIC_ESR_SEND_ACC	0x00004
#define		APIC_ESR_RECV_ACC	0x00008
#define		APIC_ESR_SENDILL	0x00020
#define		APIC_ESR_RECVILL	0x00040
#define		APIC_ESR_ILLREGA	0x00080
#define 	APIC_LVTCMCI	0x2f0
#define	APIC_ICR	0x300
#define		APIC_DEST_SELF		0x40000
#define		APIC_DEST_ALLINC	0x80000
#define		APIC_DEST_ALLBUT	0xC0000
#define		APIC_ICR_RR_MASK	0x30000
#define		APIC_ICR_RR_INVALID	0x00000
#define		APIC_ICR_RR_INPROG	0x10000
#define		APIC_ICR_RR_VALID	0x20000
#define		APIC_INT_LEVELTRIG	0x08000
#define		APIC_INT_ASSERT		0x04000
#define		APIC_ICR_BUSY		0x01000
#define		APIC_DEST_LOGICAL	0x00800
#define		APIC_DEST_PHYSICAL	0x00000
#define		APIC_DM_FIXED		0x00000
#define		APIC_DM_FIXED_MASK	0x00700
#define		APIC_DM_LOWEST		0x00100
#define		APIC_DM_SMI		0x00200
#define		APIC_DM_REMRD		0x00300
#define		APIC_DM_NMI		0x00400
#define		APIC_DM_INIT		0x00500
#define		APIC_DM_STARTUP		0x00600
#define		APIC_DM_EXTINT		0x00700
#define		APIC_VECTOR_MASK	0x000FF
#define	APIC_ICR2	0x310
#define		GET_APIC_DEST_FIELD(x)	(((x) >> 24) & 0xFF)
#define		SET_APIC_DEST_FIELD(x)	((x) << 24)
#define	APIC_LVTT	0x320
#define	APIC_LVTTHMR	0x330
#define	APIC_LVTPC	0x340
#define	APIC_LVT0	0x350
#define		APIC_LVT_TIMER_BASE_MASK	(0x3 << 18)
#define		GET_APIC_TIMER_BASE(x)		(((x) >> 18) & 0x3)
#define		SET_APIC_TIMER_BASE(x)		(((x) << 18))
#define		APIC_TIMER_BASE_CLKIN		0x0
#define		APIC_TIMER_BASE_TMBASE		0x1
#define		APIC_TIMER_BASE_DIV		0x2
#define		APIC_LVT_TIMER_ONESHOT		(0 << 17)
#define		APIC_LVT_TIMER_PERIODIC		(1 << 17)
#define		APIC_LVT_TIMER_TSCDEADLINE	(2 << 17)
#define		APIC_LVT_MASKED			(1 << 16)
#define		APIC_LVT_LEVEL_TRIGGER		(1 << 15)
#define		APIC_LVT_REMOTE_IRR		(1 << 14)
#define		APIC_INPUT_POLARITY		(1 << 13)
#define		APIC_SEND_PENDING		(1 << 12)
#define		APIC_MODE_MASK			0x700
#define		GET_APIC_DELIVERY_MODE(x)	(((x) >> 8) & 0x7)
#define		SET_APIC_DELIVERY_MODE(x, y)	(((x) & ~0x700) | ((y) << 8))
#define			APIC_MODE_FIXED		0x0
#define			APIC_MODE_NMI		0x4
#define			APIC_MODE_EXTINT	0x7
#define	APIC_LVT1	0x360
#define	APIC_LVTERR	0x370
#define	APIC_TMICT	0x380
#define	APIC_TMCCT	0x390
#define	APIC_TDCR	0x3E0
#define APIC_SELF_IPI	0x3F0
#define		APIC_TDR_DIV_TMBASE	(1 << 2)
#define		APIC_TDR_DIV_1		0xB
#define		APIC_TDR_DIV_2		0x0
#define		APIC_TDR_DIV_4		0x1
#define		APIC_TDR_DIV_8		0x2
#define		APIC_TDR_DIV_16		0x3
#define		APIC_TDR_DIV_32		0x8
#define		APIC_TDR_DIV_64		0x9
#define		APIC_TDR_DIV_128	0xA
#define	APIC_EFEAT	0x400
#define	APIC_ECTRL	0x410
#define APIC_EILVTn(n)	(0x500 + 0x10 * n)
#define		APIC_EILVT_NR_AMD_K8	1	/* # of extended interrupts */
#define		APIC_EILVT_NR_AMD_10H	4
#define		APIC_EILVT_NR_MAX	APIC_EILVT_NR_AMD_10H
#define		APIC_EILVT_LVTOFF(x)	(((x) >> 4) & 0xF)
#define		APIC_EILVT_MSG_FIX	0x0
#define		APIC_EILVT_MSG_SMI	0x2
#define		APIC_EILVT_MSG_NMI	0x4
#define		APIC_EILVT_MSG_EXT	0x7
#define		APIC_EILVT_MASKED	(1 << 16)

#define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
#define APIC_BASE_MSR	0x800
#define XAPIC_ENABLE	(1UL << 11)
#define X2APIC_ENABLE	(1UL << 10)

#ifdef CONFIG_X86_32
# define MAX_IO_APICS 64
# define MAX_LOCAL_APIC 256
#else
# define MAX_IO_APICS 128
# define MAX_LOCAL_APIC 32768
#endif

/*
 * All x86-64 systems are xAPIC compatible.
 * In the following, "apicid" is a physical APIC ID.
 */
#define XAPIC_DEST_CPUS_SHIFT	4
#define XAPIC_DEST_CPUS_MASK	((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
#define XAPIC_DEST_CLUSTER_MASK	(XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
#define APIC_CLUSTER(apicid)	((apicid) & XAPIC_DEST_CLUSTER_MASK)
#define APIC_CLUSTERID(apicid)	(APIC_CLUSTER(apicid) >> XAPIC_DEST_CPUS_SHIFT)
#define APIC_CPUID(apicid)	((apicid) & XAPIC_DEST_CPUS_MASK)
#define NUM_APIC_CLUSTERS	((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)

/*
 * the local APIC register structure, memory mapped. Not terribly well
 * tested, but we might eventually use this one in the future - the
 * problem why we cannot use it right now is the P5 APIC, it has an
 * errata which cannot take 8-bit reads and writes, only 32-bit ones ...
 */
#define u32 unsigned int

struct local_apic {

/*000*/	struct { u32 __reserved[4]; } __reserved_01;

/*010*/	struct { u32 __reserved[4]; } __reserved_02;

/*020*/	struct { /* APIC ID Register */
		u32   __reserved_1	: 24,
			phys_apic_id	:  4,
			__reserved_2	:  4;
		u32 __reserved[3];
	} id;

/*030*/	const
	struct { /* APIC Version Register */
		u32   version		:  8,
			__reserved_1	:  8,
			max_lvt		:  8,
			__reserved_2	:  8;
		u32 __reserved[3];
	} version;

/*040*/	struct { u32 __reserved[4]; } __reserved_03;

/*050*/	struct { u32 __reserved[4]; } __reserved_04;

/*060*/	struct { u32 __reserved[4]; } __reserved_05;

/*070*/	struct { u32 __reserved[4]; } __reserved_06;

/*080*/	struct { /* Task Priority Register */
		u32   priority	:  8,
			__reserved_1	: 24;
		u32 __reserved_2[3];
	} tpr;

/*090*/	const
	struct { /* Arbitration Priority Register */
		u32   priority	:  8,
			__reserved_1	: 24;
		u32 __reserved_2[3];
	} apr;

/*0A0*/	const
	struct { /* Processor Priority Register */
		u32   priority	:  8,
			__reserved_1	: 24;
		u32 __reserved_2[3];
	} ppr;

/*0B0*/	struct { /* End Of Interrupt Register */
		u32   eoi;
		u32 __reserved[3];
	} eoi;

/*0C0*/	struct { u32 __reserved[4]; } __reserved_07;

/*0D0*/	struct { /* Logical Destination Register */
		u32   __reserved_1	: 24,
			logical_dest	:  8;
		u32 __reserved_2[3];
	} ldr;

/*0E0*/	struct { /* Destination Format Register */
		u32   __reserved_1	: 28,
			model		:  4;
		u32 __reserved_2[3];
	} dfr;

/*0F0*/	struct { /* Spurious Interrupt Vector Register */
		u32	spurious_vector	:  8,
			apic_enabled	:  1,
			focus_cpu	:  1,
			__reserved_2	: 22;
		u32 __reserved_3[3];
	} svr;

/*100*/	struct { /* In Service Register */
/*170*/		u32 bitfield;
		u32 __reserved[3];
	} isr [8];

/*180*/	struct { /* Trigger Mode Register */
/*1F0*/		u32 bitfield;
		u32 __reserved[3];
	} tmr [8];

/*200*/	struct { /* Interrupt Request Register */
/*270*/		u32 bitfield;
		u32 __reserved[3];
	} irr [8];

/*280*/	union { /* Error Status Register */
		struct {
			u32   send_cs_error			:  1,
				receive_cs_error		:  1,
				send_accept_error		:  1,
				receive_accept_error		:  1,
				__reserved_1			:  1,
				send_illegal_vector		:  1,
				receive_illegal_vector		:  1,
				illegal_register_address	:  1,
				__reserved_2			: 24;
			u32 __reserved_3[3];
		} error_bits;
		struct {
			u32 errors;
			u32 __reserved_3[3];
		} all_errors;
	} esr;

/*290*/	struct { u32 __reserved[4]; } __reserved_08;

/*2A0*/	struct { u32 __reserved[4]; } __reserved_09;

/*2B0*/	struct { u32 __reserved[4]; } __reserved_10;

/*2C0*/	struct { u32 __reserved[4]; } __reserved_11;

/*2D0*/	struct { u32 __reserved[4]; } __reserved_12;

/*2E0*/	struct { u32 __reserved[4]; } __reserved_13;

/*2F0*/	struct { u32 __reserved[4]; } __reserved_14;

/*300*/	struct { /* Interrupt Command Register 1 */
		u32   vector			:  8,
			delivery_mode		:  3,
			destination_mode	:  1,
			delivery_status		:  1,
			__reserved_1		:  1,
			level			:  1,
			trigger			:  1,
			__reserved_2		:  2,
			shorthand		:  2,
			__reserved_3		:  12;
		u32 __reserved_4[3];
	} icr1;

/*310*/	struct { /* Interrupt Command Register 2 */
		union {
			u32   __reserved_1	: 24,
				phys_dest	:  4,
				__reserved_2	:  4;
			u32   __reserved_3	: 24,
				logical_dest	:  8;
		} dest;
		u32 __reserved_4[3];
	} icr2;

/*320*/	struct { /* LVT - Timer */
		u32   vector		:  8,
			__reserved_1	:  4,
			delivery_status	:  1,
			__reserved_2	:  3,
			mask		:  1,
			timer_mode	:  1,
			__reserved_3	: 14;
		u32 __reserved_4[3];
	} lvt_timer;

/*330*/	struct { /* LVT - Thermal Sensor */
		u32  vector		:  8,
			delivery_mode	:  3,
			__reserved_1	:  1,
			delivery_status	:  1,
			__reserved_2	:  3,
			mask		:  1,
			__reserved_3	: 15;
		u32 __reserved_4[3];
	} lvt_thermal;

/*340*/	struct { /* LVT - Performance Counter */
		u32   vector		:  8,
			delivery_mode	:  3,
			__reserved_1	:  1,
			delivery_status	:  1,
			__reserved_2	:  3,
			mask		:  1,
			__reserved_3	: 15;
		u32 __reserved_4[3];
	} lvt_pc;

/*350*/	struct { /* LVT - LINT0 */
		u32   vector		:  8,
			delivery_mode	:  3,
			__reserved_1	:  1,
			delivery_status	:  1,
			polarity	:  1,
			remote_irr	:  1,
			trigger		:  1,
			mask		:  1,
			__reserved_2	: 15;
		u32 __reserved_3[3];
	} lvt_lint0;

/*360*/	struct { /* LVT - LINT1 */
		u32   vector		:  8,
			delivery_mode	:  3,
			__reserved_1	:  1,
			delivery_status	:  1,
			polarity	:  1,
			remote_irr	:  1,
			trigger		:  1,
			mask		:  1,
			__reserved_2	: 15;
		u32 __reserved_3[3];
	} lvt_lint1;

/*370*/	struct { /* LVT - Error */
		u32   vector		:  8,
			__reserved_1	:  4,
			delivery_status	:  1,
			__reserved_2	:  3,
			mask		:  1,
			__reserved_3	: 15;
		u32 __reserved_4[3];
	} lvt_error;

/*380*/	struct { /* Timer Initial Count Register */
		u32   initial_count;
		u32 __reserved_2[3];
	} timer_icr;

/*390*/	const
	struct { /* Timer Current Count Register */
		u32   curr_count;
		u32 __reserved_2[3];
	} timer_ccr;

/*3A0*/	struct { u32 __reserved[4]; } __reserved_16;

/*3B0*/	struct { u32 __reserved[4]; } __reserved_17;

/*3C0*/	struct { u32 __reserved[4]; } __reserved_18;

/*3D0*/	struct { u32 __reserved[4]; } __reserved_19;

/*3E0*/	struct { /* Timer Divide Configuration Register */
		u32   divisor		:  4,
			__reserved_1	: 28;
		u32 __reserved_2[3];
	} timer_dcr;

/*3F0*/	struct { u32 __reserved[4]; } __reserved_20;

} __attribute__ ((packed));

#undef u32

#ifdef CONFIG_X86_32
 #define BAD_APICID 0xFFu
#else
 #define BAD_APICID 0xFFFFu
#endif

enum apic_delivery_modes {
	APIC_DELIVERY_MODE_FIXED	= 0,
	APIC_DELIVERY_MODE_LOWESTPRIO   = 1,
	APIC_DELIVERY_MODE_SMI		= 2,
	APIC_DELIVERY_MODE_NMI		= 4,
	APIC_DELIVERY_MODE_INIT		= 5,
	APIC_DELIVERY_MODE_EXTINT	= 7,
};

#endif /* _ASM_X86_APICDEF_H */

cmd: