FM / asm

/usr/src/linux-headers-5.15.0-181/arch/xtensa/include/asm/

/usr/src/linux-headers-5.15.0-181/arch/xtensa/include/asm

Name	Size	Mode	Actions
asm-offsets.h	35	0644	edit dl rm
asm-uaccess.h	4180	0644	edit dl rm
asmmacro.h	4763	0644	edit dl rm
atomic.h	7301	0644	edit dl rm
barrier.h	594	0644	edit dl rm
bitops.h	5398	0644	edit dl rm
bootparam.h	1402	0644	edit dl rm
cache.h	1114	0644	edit dl rm
cacheasm.h	3856	0644	edit dl rm
cacheflush.h	5968	0644	edit dl rm
checksum.h	5893	0644	edit dl rm
cmpxchg.h	5684	0644	edit dl rm
coprocessor.h	4623	0644	edit dl rm
core.h	830	0644	edit dl rm
current.h	679	0644	edit dl rm
delay.h	1668	0644	edit dl rm
dma.h	1830	0644	edit dl rm
elf.h	5115	0644	edit dl rm
fixmap.h	1106	0644	edit dl rm
flat.h	440	0644	edit dl rm
ftrace.h	979	0644	edit dl rm
futex.h	3889	0644	edit dl rm
highmem.h	2167	0644	edit dl rm
hw_breakpoint.h	1597	0644	edit dl rm
initialize_mmu.h	5196	0644	edit dl rm
io.h	1959	0644	edit dl rm
irq.h	1127	0644	edit dl rm
irqflags.h	2069	0644	edit dl rm
jump_label.h	1655	0644	edit dl rm
kasan.h	859	0644	edit dl rm
Kbuild	230	0644	edit dl rm
kmem_layout.h	2790	0644	edit dl rm
linkage.h	154	0644	edit dl rm
mmu.h	462	0644	edit dl rm
mmu_context.h	3624	0644	edit dl rm
mxregs.h	1330	0644	edit dl rm
nommu_context.h	156	0644	edit dl rm
page.h	5793	0644	edit dl rm
pci-bridge.h	2170	0644	edit dl rm
pci.h	1302	0644	edit dl rm
perf_event.h	108	0644	edit dl rm
pgalloc.h	1405	0644	edit dl rm
pgtable.h	14470	0644	edit dl rm
platform.h	1528	0644	edit dl rm
processor.h	7705	0644	edit dl rm
ptrace.h	3321	0644	edit dl rm
regs.h	4017	0644	edit dl rm
seccomp.h	287	0644	edit dl rm
serial.h	443	0644	edit dl rm
shmparam.h	561	0644	edit dl rm
signal.h	502	0644	edit dl rm
smp.h	967	0644	edit dl rm
spinlock.h	472	0644	edit dl rm
spinlock_types.h	317	0644	edit dl rm
stackprotector.h	1140	0644	edit dl rm
stacktrace.h	1158	0644	edit dl rm
string.h	3385	0644	edit dl rm
switch_to.h	601	0644	edit dl rm
syscall.h	2140	0644	edit dl rm
sysmem.h	426	0644	edit dl rm
thread_info.h	3965	0644	edit dl rm
timex.h	1440	0644	edit dl rm
tlb.h	475	0644	edit dl rm
tlbflush.h	5620	0644	edit dl rm
traps.h	2779	0644	edit dl rm
uaccess.h	9375	0644	edit dl rm
ucontext.h	540	0644	edit dl rm
unistd.h	370	0644	edit dl rm
vectors.h	3276	0644	edit dl rm
vermagic.h	433	0644	edit dl rm
vmalloc.h	96	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/arch/xtensa/include/asm/cmpxchg.h (5684B)

/*
 * Atomic xchg and cmpxchg operations.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2005 Tensilica Inc.
 */

#ifndef _XTENSA_CMPXCHG_H
#define _XTENSA_CMPXCHG_H

#ifndef __ASSEMBLY__

#include <linux/bits.h>
#include <linux/stringify.h>

/*
 * cmpxchg
 */

static inline unsigned long
__cmpxchg_u32(volatile int *p, int old, int new)
{
#if XCHAL_HAVE_EXCLUSIVE
	unsigned long tmp, result;

__asm__ __volatile__(
			"1:     l32ex   %[result], %[addr]\n"
			"       bne     %[result], %[cmp], 2f\n"
			"       mov     %[tmp], %[new]\n"
			"       s32ex   %[tmp], %[addr]\n"
			"       getex   %[tmp]\n"
			"       beqz    %[tmp], 1b\n"
			"2:\n"
			: [result] "=&a" (result), [tmp] "=&a" (tmp)
			: [new] "a" (new), [addr] "a" (p), [cmp] "a" (old)
			: "memory"
			);

return result;
#elif XCHAL_HAVE_S32C1I
	__asm__ __volatile__(
			"       wsr     %[cmp], scompare1\n"
			"       s32c1i  %[new], %[mem]\n"
			: [new] "+a" (new), [mem] "+m" (*p)
			: [cmp] "a" (old)
			: "memory"
			);

return new;
#else
	__asm__ __volatile__(
			"       rsil    a15, "__stringify(TOPLEVEL)"\n"
			"       l32i    %[old], %[mem]\n"
			"       bne     %[old], %[cmp], 1f\n"
			"       s32i    %[new], %[mem]\n"
			"1:\n"
			"       wsr     a15, ps\n"
			"       rsync\n"
			: [old] "=&a" (old), [mem] "+m" (*p)
			: [cmp] "a" (old), [new] "r" (new)
			: "a15", "memory");
	return old;
#endif
}
/* This function doesn't exist, so you'll get a linker error
 * if something tries to do an invalid cmpxchg(). */

extern void __cmpxchg_called_with_bad_pointer(void);

static __inline__ unsigned long
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
{
	switch (size) {
	case 4:  return __cmpxchg_u32(ptr, old, new);
	default: __cmpxchg_called_with_bad_pointer();
		 return old;
	}
}

#define arch_cmpxchg(ptr,o,n)						      \
	({ __typeof__(*(ptr)) _o_ = (o);				      \
	   __typeof__(*(ptr)) _n_ = (n);				      \
	   (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,	      \
	   			        (unsigned long)_n_, sizeof (*(ptr))); \
	})

#include <asm-generic/cmpxchg-local.h>

static inline unsigned long __cmpxchg_local(volatile void *ptr,
				      unsigned long old,
				      unsigned long new, int size)
{
	switch (size) {
	case 4:
		return __cmpxchg_u32(ptr, old, new);
	default:
		return __generic_cmpxchg_local(ptr, old, new, size);
	}

return old;
}

/*
 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
 * them available.
 */
#define arch_cmpxchg_local(ptr, o, n)				  	       \
	((__typeof__(*(ptr)))__generic_cmpxchg_local((ptr), (unsigned long)(o),\
			(unsigned long)(n), sizeof(*(ptr))))
#define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n))
#define arch_cmpxchg64(ptr, o, n)    arch_cmpxchg64_local((ptr), (o), (n))

/*
 * xchg_u32
 *
 * Note that a15 is used here because the register allocation
 * done by the compiler is not guaranteed and a window overflow
 * may not occur between the rsil and wsr instructions. By using
 * a15 in the rsil, the machine is guaranteed to be in a state
 * where no register reference will cause an overflow.
 */

static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
{
#if XCHAL_HAVE_EXCLUSIVE
	unsigned long tmp, result;

__asm__ __volatile__(
			"1:     l32ex   %[result], %[addr]\n"
			"       mov     %[tmp], %[val]\n"
			"       s32ex   %[tmp], %[addr]\n"
			"       getex   %[tmp]\n"
			"       beqz    %[tmp], 1b\n"
			: [result] "=&a" (result), [tmp] "=&a" (tmp)
			: [val] "a" (val), [addr] "a" (m)
			: "memory"
			);

return result;
#elif XCHAL_HAVE_S32C1I
	unsigned long tmp, result;
	__asm__ __volatile__(
			"1:     l32i    %[tmp], %[mem]\n"
			"       mov     %[result], %[val]\n"
			"       wsr     %[tmp], scompare1\n"
			"       s32c1i  %[result], %[mem]\n"
			"       bne     %[result], %[tmp], 1b\n"
			: [result] "=&a" (result), [tmp] "=&a" (tmp),
			  [mem] "+m" (*m)
			: [val] "a" (val)
			: "memory"
			);
	return result;
#else
	unsigned long tmp;
	__asm__ __volatile__(
			"       rsil    a15, "__stringify(TOPLEVEL)"\n"
			"       l32i    %[tmp], %[mem]\n"
			"       s32i    %[val], %[mem]\n"
			"       wsr     a15, ps\n"
			"       rsync\n"
			: [tmp] "=&a" (tmp), [mem] "+m" (*m)
			: [val] "a" (val)
			: "a15", "memory");
	return tmp;
#endif
}

#define arch_xchg(ptr,x) \
	((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))

static inline u32 xchg_small(volatile void *ptr, u32 x, int size)
{
	int off = (unsigned long)ptr % sizeof(u32);
	volatile u32 *p = ptr - off;
#ifdef __BIG_ENDIAN
	int bitoff = (sizeof(u32) - size - off) * BITS_PER_BYTE;
#else
	int bitoff = off * BITS_PER_BYTE;
#endif
	u32 bitmask = ((0x1 << size * BITS_PER_BYTE) - 1) << bitoff;
	u32 oldv, newv;
	u32 ret;

do {
		oldv = READ_ONCE(*p);
		ret = (oldv & bitmask) >> bitoff;
		newv = (oldv & ~bitmask) | (x << bitoff);
	} while (__cmpxchg_u32(p, oldv, newv) != oldv);

return ret;
}

/*
 * This only works if the compiler isn't horribly bad at optimizing.
 * gcc-2.5.8 reportedly can't handle this, but I define that one to
 * be dead anyway.
 */

extern void __xchg_called_with_bad_pointer(void);

static __inline__ unsigned long
__xchg(unsigned long x, volatile void * ptr, int size)
{
	switch (size) {
	case 1:
		return xchg_small(ptr, x, 1);
	case 2:
		return xchg_small(ptr, x, 2);
	case 4:
		return xchg_u32(ptr, x);
	default:
		__xchg_called_with_bad_pointer();
		return x;
	}
}

#endif /* __ASSEMBLY__ */

#endif /* _XTENSA_CMPXCHG_H */

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