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usr
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src
/
linux-headers-5.15.0-181
/
include
/
drm
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/usr/src/linux-headers-5.15.0-181/include/drm
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bridge/
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i2c/
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ttm/
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amd_asic_type.h
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drm_aperture.h
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drm_atomic.h
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drm_atomic_helper.h
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drm_atomic_state_helper.h
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drm_atomic_uapi.h
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drm_audio_component.h
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drm_auth.h
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drm_blend.h
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drm_bridge.h
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drm_bridge_connector.h
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drm_cache.h
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drm_client.h
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drm_color_mgmt.h
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drm_connector.h
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drm_crtc.h
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drm_crtc_helper.h
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drm_damage_helper.h
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drm_debugfs.h
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drm_debugfs_crc.h
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drm_device.h
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drm_displayid.h
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drm_dp_aux_bus.h
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drm_dp_dual_mode_helper.h
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drm_dp_helper.h
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drm_dp_mst_helper.h
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drm_drv.h
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drm_dsc.h
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drm_edid.h
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drm_encoder.h
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drm_encoder_slave.h
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drm_fb_cma_helper.h
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drm_fb_helper.h
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drm_file.h
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drm_fixed.h
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drm_flip_work.h
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drm_format_helper.h
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drm_fourcc.h
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drm_framebuffer.h
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drm_gem.h
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drm_gem_atomic_helper.h
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drm_gem_cma_helper.h
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drm_gem_framebuffer_helper.h
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drm_gem_shmem_helper.h
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drm_gem_ttm_helper.h
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drm_gem_vram_helper.h
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drm_hashtab.h
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drm_hdcp.h
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drm_ioctl.h
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drm_lease.h
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drm_legacy.h
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drm_managed.h
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drm_mipi_dbi.h
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drm_mipi_dsi.h
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drm_mm.h
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drm_modes.h
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drm_modeset_helper.h
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drm_modeset_helper_vtables.h
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drm_modeset_lock.h
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drm_mode_config.h
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drm_mode_object.h
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drm_of.h
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drm_panel.h
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drm_pciids.h
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drm_plane.h
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drm_plane_helper.h
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drm_prime.h
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drm_print.h
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drm_probe_helper.h
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drm_property.h
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drm_rect.h
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drm_scdc_helper.h
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drm_self_refresh_helper.h
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drm_simple_kms_helper.h
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drm_syncobj.h
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drm_sysfs.h
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drm_util.h
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drm_utils.h
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drm_vblank.h
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drm_vblank_work.h
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drm_vma_manager.h
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drm_writeback.h
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gma_drm.h
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gpu_scheduler.h
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gud.h
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i915_component.h
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i915_drm.h
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i915_mei_hdcp_interface.h
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i915_pciids.h
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intel-gtt.h
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intel_lpe_audio.h
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spsc_queue.h
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task_barrier.h
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Edit:
/usr/src/linux-headers-5.15.0-181/include/drm/drm_cache.h
(3082B)
/************************************************************************** * * Copyright 2009 Red Hat Inc. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * **************************************************************************/ /* * Authors: * Dave Airlie <airlied@redhat.com> */ #ifndef _DRM_CACHE_H_ #define _DRM_CACHE_H_ #include <linux/scatterlist.h> struct dma_buf_map; void drm_clflush_pages(struct page *pages[], unsigned long num_pages); void drm_clflush_sg(struct sg_table *st); void drm_clflush_virt_range(void *addr, unsigned long length); bool drm_need_swiotlb(int dma_bits); static inline bool drm_arch_can_wc_memory(void) { #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE) return false; #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON64) return false; #elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) /* * The DRM driver stack is designed to work with cache coherent devices * only, but permits an optimization to be enabled in some cases, where * for some buffers, both the CPU and the GPU use uncached mappings, * removing the need for DMA snooping and allocation in the CPU caches. * * The use of uncached GPU mappings relies on the correct implementation * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU * will use cached mappings nonetheless. On x86 platforms, this does not * seem to matter, as uncached CPU mappings will snoop the caches in any * case. However, on ARM and arm64, enabling this optimization on a * platform where NoSnoop is ignored results in loss of coherency, which * breaks correct operation of the device. Since we have no way of * detecting whether NoSnoop works or not, just disable this * optimization entirely for ARM and arm64. */ return false; #else return true; #endif } void drm_memcpy_init_early(void); void drm_memcpy_from_wc(struct dma_buf_map *dst, const struct dma_buf_map *src, unsigned long len); #endif
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