FM / drm

/usr/src/linux-headers-5.15.0-181/include/drm/

/usr/src/linux-headers-5.15.0-181/include/drm

Name	Size	Mode	Actions
bridge/	-	0755	rm
i2c/	-	0755	rm
ttm/	-	0755	rm
amd_asic_type.h	2199	0644	edit dl rm
drm_aperture.h	1160	0644	edit dl rm
drm_atomic.h	42646	0644	edit dl rm
drm_atomic_helper.h	9488	0644	edit dl rm
drm_atomic_state_helper.h	4307	0644	edit dl rm
drm_atomic_uapi.h	2218	0644	edit dl rm
drm_audio_component.h	3879	0644	edit dl rm
drm_auth.h	4754	0644	edit dl rm
drm_blend.h	2407	0644	edit dl rm
drm_bridge.h	34359	0644	edit dl rm
drm_bridge_connector.h	548	0644	edit dl rm
drm_cache.h	3082	0644	edit dl rm
drm_client.h	5056	0644	edit dl rm
drm_color_mgmt.h	3910	0644	edit dl rm
drm_connector.h	57270	0644	edit dl rm
drm_crtc.h	45550	0644	edit dl rm
drm_crtc_helper.h	2448	0644	edit dl rm
drm_damage_helper.h	3408	0644	edit dl rm
drm_debugfs.h	3486	0644	edit dl rm
drm_debugfs_crc.h	2723	0644	edit dl rm
drm_device.h	8727	0644	edit dl rm
drm_displayid.h	3399	0644	edit dl rm
drm_dp_aux_bus.h	1740	0644	edit dl rm
drm_dp_dual_mode_helper.h	4731	0644	edit dl rm
drm_dp_helper.h	89773	0644	edit dl rm
drm_dp_mst_helper.h	28721	0644	edit dl rm
drm_drv.h	19117	0644	edit dl rm
drm_dsc.h	16682	0644	edit dl rm
drm_edid.h	17644	0644	edit dl rm
drm_encoder.h	10891	0644	edit dl rm
drm_encoder_slave.h	6590	0644	edit dl rm
drm_fb_cma_helper.h	575	0644	edit dl rm
drm_fb_helper.h	13008	0644	edit dl rm
drm_file.h	12518	0644	edit dl rm
drm_fixed.h	4826	0644	edit dl rm
drm_flip_work.h	3080	0644	edit dl rm
drm_format_helper.h	1522	0644	edit dl rm
drm_fourcc.h	9933	0644	edit dl rm
drm_framebuffer.h	10649	0644	edit dl rm
drm_gem.h	12082	0644	edit dl rm
drm_gem_atomic_helper.h	4718	0644	edit dl rm
drm_gem_cma_helper.h	6998	0644	edit dl rm
drm_gem_framebuffer_helper.h	2105	0644	edit dl rm
drm_gem_shmem_helper.h	8497	0644	edit dl rm
drm_gem_ttm_helper.h	861	0644	edit dl rm
drm_gem_vram_helper.h	6313	0644	edit dl rm
drm_hashtab.h	3083	0644	edit dl rm
drm_hdcp.h	9006	0644	edit dl rm
drm_ioctl.h	6381	0644	edit dl rm
drm_lease.h	1010	0644	edit dl rm
drm_legacy.h	9479	0644	edit dl rm
drm_managed.h	3426	0644	edit dl rm
drm_mipi_dbi.h	4834	0644	edit dl rm
drm_mipi_dsi.h	11553	0644	edit dl rm
drm_mm.h	17924	0644	edit dl rm
drm_modes.h	18616	0644	edit dl rm
drm_modeset_helper.h	1814	0644	edit dl rm
drm_modeset_helper_vtables.h	57322	0644	edit dl rm
drm_modeset_lock.h	6964	0644	edit dl rm
drm_mode_config.h	33017	0644	edit dl rm
drm_mode_object.h	5294	0644	edit dl rm
drm_of.h	4205	0644	edit dl rm
drm_panel.h	6408	0644	edit dl rm
drm_pciids.h	68070	0644	edit dl rm
drm_plane.h	29161	0644	edit dl rm
drm_plane_helper.h	1787	0644	edit dl rm
drm_prime.h	4168	0644	edit dl rm
drm_print.h	18139	0644	edit dl rm
drm_probe_helper.h	922	0644	edit dl rm
drm_property.h	12042	0644	edit dl rm
drm_rect.h	7022	0644	edit dl rm
drm_scdc_helper.h	4445	0644	edit dl rm
drm_self_refresh_helper.h	594	0644	edit dl rm
drm_simple_kms_helper.h	9119	0644	edit dl rm
drm_syncobj.h	3943	0644	edit dl rm
drm_sysfs.h	442	0644	edit dl rm
drm_util.h	2642	0644	edit dl rm
drm_utils.h	504	0644	edit dl rm
drm_vblank.h	9255	0644	edit dl rm
drm_vblank_work.h	1956	0644	edit dl rm
drm_vma_manager.h	8343	0644	edit dl rm
drm_writeback.h	4150	0644	edit dl rm
gma_drm.h	413	0644	edit dl rm
gpu_scheduler.h	15814	0644	edit dl rm
gud.h	11856	0644	edit dl rm
i915_component.h	1805	0644	edit dl rm
i915_drm.h	3690	0644	edit dl rm
i915_mei_hdcp_interface.h	5899	0644	edit dl rm
i915_pciids.h	21821	0644	edit dl rm
intel-gtt.h	996	0644	edit dl rm
intel_lpe_audio.h	1758	0644	edit dl rm
spsc_queue.h	3157	0644	edit dl rm
task_barrier.h	3020	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/include/drm/i915_drm.h (3690B)

/*
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#ifndef _I915_DRM_H_
#define _I915_DRM_H_

#include <drm/i915_pciids.h>
#include <uapi/drm/i915_drm.h>

/* For use by IPS driver */
unsigned long i915_read_mch_val(void);
bool i915_gpu_raise(void);
bool i915_gpu_lower(void);
bool i915_gpu_busy(void);
bool i915_gpu_turbo_disable(void);

/* Exported from arch/x86/kernel/early-quirks.c */
extern struct resource intel_graphics_stolen_res;

/*
 * The Bridge device's PCI config space has information about the
 * fb aperture size and the amount of pre-reserved memory.
 * This is all handled in the intel-gtt.ko module. i915.ko only
 * cares about the vga bit for the vga rbiter.
 */
#define INTEL_GMCH_CTRL		0x52
#define INTEL_GMCH_VGA_DISABLE  (1 << 1)
#define SNB_GMCH_CTRL		0x50
#define    SNB_GMCH_GGMS_SHIFT	8 /* GTT Graphics Memory Size */
#define    SNB_GMCH_GGMS_MASK	0x3
#define    SNB_GMCH_GMS_SHIFT   3 /* Graphics Mode Select */
#define    SNB_GMCH_GMS_MASK    0x1f
#define    BDW_GMCH_GGMS_SHIFT	6
#define    BDW_GMCH_GGMS_MASK	0x3
#define    BDW_GMCH_GMS_SHIFT   8
#define    BDW_GMCH_GMS_MASK    0xff

#define I830_GMCH_CTRL			0x52

#define I830_GMCH_GMS_MASK		0x70
#define I830_GMCH_GMS_LOCAL		0x10
#define I830_GMCH_GMS_STOLEN_512	0x20
#define I830_GMCH_GMS_STOLEN_1024	0x30
#define I830_GMCH_GMS_STOLEN_8192	0x40

#define I855_GMCH_GMS_MASK		0xF0
#define I855_GMCH_GMS_STOLEN_0M		0x0
#define I855_GMCH_GMS_STOLEN_1M		(0x1 << 4)
#define I855_GMCH_GMS_STOLEN_4M		(0x2 << 4)
#define I855_GMCH_GMS_STOLEN_8M		(0x3 << 4)
#define I855_GMCH_GMS_STOLEN_16M	(0x4 << 4)
#define I855_GMCH_GMS_STOLEN_32M	(0x5 << 4)
#define I915_GMCH_GMS_STOLEN_48M	(0x6 << 4)
#define I915_GMCH_GMS_STOLEN_64M	(0x7 << 4)
#define G33_GMCH_GMS_STOLEN_128M	(0x8 << 4)
#define G33_GMCH_GMS_STOLEN_256M	(0x9 << 4)
#define INTEL_GMCH_GMS_STOLEN_96M	(0xa << 4)
#define INTEL_GMCH_GMS_STOLEN_160M	(0xb << 4)
#define INTEL_GMCH_GMS_STOLEN_224M	(0xc << 4)
#define INTEL_GMCH_GMS_STOLEN_352M	(0xd << 4)

#define I830_DRB3		0x63
#define I85X_DRB3		0x43
#define I865_TOUD		0xc4

#define I830_ESMRAMC		0x91
#define I845_ESMRAMC		0x9e
#define I85X_ESMRAMC		0x61
#define    TSEG_ENABLE		(1 << 0)
#define    I830_TSEG_SIZE_512K	(0 << 1)
#define    I830_TSEG_SIZE_1M	(1 << 1)
#define    I845_TSEG_SIZE_MASK	(3 << 1)
#define    I845_TSEG_SIZE_512K	(2 << 1)
#define    I845_TSEG_SIZE_1M	(3 << 1)

#define INTEL_BSM		0x5c
#define INTEL_GEN11_BSM_DW0	0xc0
#define INTEL_GEN11_BSM_DW1	0xc4
#define   INTEL_BSM_MASK	(-(1u << 20))

#endif				/* _I915_DRM_H_ */

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