FM / mfd

/usr/src/linux-headers-5.15.0-181/include/linux/mfd/

/usr/src/linux-headers-5.15.0-181/include/linux/mfd

Name	Size	Mode	Actions
abx500/	-	0755	rm
arizona/	-	0755	rm
atc260x/	-	0755	rm
da9052/	-	0755	rm
da9055/	-	0755	rm
da9062/	-	0755	rm
da9063/	-	0755	rm
da9150/	-	0755	rm
madera/	-	0755	rm
mt6323/	-	0755	rm
mt6358/	-	0755	rm
mt6359/	-	0755	rm
mt6359p/	-	0755	rm
mt6397/	-	0755	rm
pcf50633/	-	0755	rm
samsung/	-	0755	rm
syscon/	-	0755	rm
wcd934x/	-	0755	rm
wm831x/	-	0755	rm
wm8350/	-	0755	rm
wm8994/	-	0755	rm
88pm80x.h	10080	0644	edit dl rm
88pm860x.h	13508	0644	edit dl rm
aat2870.h	4014	0644	edit dl rm
abx500.h	2401	0644	edit dl rm
ac100.h	6121	0644	edit dl rm
adp5520.h	8506	0644	edit dl rm
altera-a10sr.h	2955	0644	edit dl rm
altera-sysmgr.h	725	0644	edit dl rm
as3711.h	2808	0644	edit dl rm
as3722.h	14879	0644	edit dl rm
asic3.h	12368	0644	edit dl rm
atmel-hlcdc.h	2094	0644	edit dl rm
axp20x.h	17105	0644	edit dl rm
bcm590xx.h	618	0644	edit dl rm
bcm2835-pm.h	235	0644	edit dl rm
bd9571mwv.h	3537	0644	edit dl rm
core.h	4760	0644	edit dl rm
da8xx-cfgchip.h	7046	0644	edit dl rm
da903x.h	7218	0644	edit dl rm
davinci_voicecodec.h	2658	0644	edit dl rm
db8500-prcmu.h	21842	0644	edit dl rm
dbx500-prcmu.h	14268	0644	edit dl rm
dln2.h	3617	0644	edit dl rm
dm355evm_msp.h	2879	0644	edit dl rm
ds1wm.h	817	0644	edit dl rm
ezx-pcap.h	7932	0644	edit dl rm
gsc.h	1818	0644	edit dl rm
hi655x-pmic.h	1934	0644	edit dl rm
hi6421-pmic.h	1184	0644	edit dl rm
hi6421-spmi-pmic.h	519	0644	edit dl rm
htc-pasic3.h	1225	0644	edit dl rm
idt8a340_reg.h	30024	0644	edit dl rm
idt82p33_reg.h	2938	0644	edit dl rm
imx25-tsadc.h	4972	0644	edit dl rm
ingenic-tcu.h	1753	0644	edit dl rm
intel-m10-bmc.h	4907	0644	edit dl rm
intel_pmc_bxt.h	1542	0644	edit dl rm
intel_soc_pmic.h	1693	0644	edit dl rm
intel_soc_pmic_bxtwc.h	1641	0644	edit dl rm
intel_soc_pmic_mrfld.h	2288	0644	edit dl rm
ipaq-micro.h	3750	0644	edit dl rm
iqs62x.h	2797	0644	edit dl rm
janz.h	846	0644	edit dl rm
kempld.h	4122	0644	edit dl rm
khadas-mcu.h	3545	0644	edit dl rm
ljca.h	1043	0644	edit dl rm
lm3533.h	2440	0644	edit dl rm
lochnagar.h	1624	0644	edit dl rm
lochnagar1_regs.h	7896	0644	edit dl rm
lochnagar2_regs.h	15550	0644	edit dl rm
lp873x.h	8896	0644	edit dl rm
lp3943.h	2598	0644	edit dl rm
lp8788-isink.h	1069	0644	edit dl rm
lp8788.h	8424	0644	edit dl rm
lp87565.h	7588	0644	edit dl rm
lpc_ich.h	655	0644	edit dl rm
max8907.h	7555	0644	edit dl rm
max8925.h	7204	0644	edit dl rm
max8997-private.h	12057	0644	edit dl rm
max8997.h	5513	0644	edit dl rm
max8998-private.h	4450	0644	edit dl rm
max8998.h	2983	0644	edit dl rm
max14577-private.h	15776	0644	edit dl rm
max14577.h	2281	0644	edit dl rm
max77620.h	10967	0644	edit dl rm
max77650.h	1887	0644	edit dl rm
max77686-private.h	12850	0644	edit dl rm
max77686.h	2033	0644	edit dl rm
max77693-common.h	1088	0644	edit dl rm
max77693-private.h	17705	0644	edit dl rm
max77693.h	1619	0644	edit dl rm
max77843-private.h	15589	0644	edit dl rm
mc13xxx.h	7769	0644	edit dl rm
mc13783.h	2756	0644	edit dl rm
mc13892.h	792	0644	edit dl rm
mcp.h	1647	0644	edit dl rm
menelaus.h	1284	0644	edit dl rm
motorola-cpcap.h	12651	0644	edit dl rm
mp2629.h	422	0644	edit dl rm
mxs-lradc.h	5736	0644	edit dl rm
ntxec.h	907	0644	edit dl rm
palmas.h	152382	0644	edit dl rm
qcom_rpm.h	293	0644	edit dl rm
rave-sp.h	1448	0644	edit dl rm
rc5t583.h	9501	0644	edit dl rm
rdc321x.h	591	0644	edit dl rm
retu.h	723	0644	edit dl rm
rk808.h	19885	0644	edit dl rm
rn5t618.h	7840	0644	edit dl rm
rohm-bd718x7.h	9038	0644	edit dl rm
rohm-bd957x.h	4362	0644	edit dl rm
rohm-bd70528.h	11082	0644	edit dl rm
rohm-bd71815.h	15608	0644	edit dl rm
rohm-bd71828.h	13084	0644	edit dl rm
rohm-generic.h	2825	0644	edit dl rm
rohm-shared.h	631	0644	edit dl rm
rsmu.h	897	0644	edit dl rm
rt5033-private.h	7927	0644	edit dl rm
rt5033.h	1098	0644	edit dl rm
sc27xx-pmic.h	228	0644	edit dl rm
si476x-core.h	15192	0644	edit dl rm
si476x-platform.h	6189	0644	edit dl rm
si476x-reports.h	4596	0644	edit dl rm
sky81452.h	354	0644	edit dl rm
sta2x11-mfd.h	18565	0644	edit dl rm
stm32-lptimer.h	2102	0644	edit dl rm
stm32-timers.h	5948	0644	edit dl rm
stmfx.h	4051	0644	edit dl rm
stmpe.h	4083	0644	edit dl rm
stpmic1.h	5750	0644	edit dl rm
stw481x.h	1422	0644	edit dl rm
sun4i-gpadc.h	3564	0644	edit dl rm
syscon.h	1871	0644	edit dl rm
t7l66xb.h	622	0644	edit dl rm
tc3589x.h	4123	0644	edit dl rm
tc6387xb.h	516	0644	edit dl rm
tc6393xb.h	1402	0644	edit dl rm
ti-lmu-register.h	5666	0644	edit dl rm
ti-lmu.h	1857	0644	edit dl rm
ti_am335x_tscadc.h	6028	0644	edit dl rm
tmio.h	3894	0644	edit dl rm
tps6105x.h	3079	0644	edit dl rm
tps6507x.h	5055	0644	edit dl rm
tps6586x.h	2802	0644	edit dl rm
tps65010.h	6685	0644	edit dl rm
tps65086.h	3581	0644	edit dl rm
tps65090.h	3814	0644	edit dl rm
tps65217.h	8436	0644	edit dl rm
tps65218.h	8218	0644	edit dl rm
tps65910.h	30093	0644	edit dl rm
tps65912.h	10145	0644	edit dl rm
tps68470.h	3002	0644	edit dl rm
tps80031.h	20059	0644	edit dl rm
twl.h	25494	0644	edit dl rm
twl4030-audio.h	8129	0644	edit dl rm
twl6040.h	6716	0644	edit dl rm
ucb1x00.h	6559	0644	edit dl rm
viperboard.h	2802	0644	edit dl rm
wl1273-core.h	7887	0644	edit dl rm
wm97xx.h	369	0644	edit dl rm
wm8400-audio.h	70819	0644	edit dl rm
wm8400-private.h	58492	0644	edit dl rm
wm8400.h	561	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/include/linux/mfd/88pm80x.h (10080B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Marvell 88PM80x Interface
 *
 * Copyright (C) 2012 Marvell International Ltd.
 * Qiao Zhou <zhouqiao@marvell.com>
 */

#ifndef __LINUX_MFD_88PM80X_H
#define __LINUX_MFD_88PM80X_H

#include <linux/platform_device.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/atomic.h>

enum {
	CHIP_INVALID = 0,
	CHIP_PM800,
	CHIP_PM805,
	CHIP_PM860,
	CHIP_MAX,
};

enum {
	PM800_ID_BUCK1 = 0,
	PM800_ID_BUCK2,
	PM800_ID_BUCK3,
	PM800_ID_BUCK4,
	PM800_ID_BUCK5,

PM800_ID_LDO1,
	PM800_ID_LDO2,
	PM800_ID_LDO3,
	PM800_ID_LDO4,
	PM800_ID_LDO5,
	PM800_ID_LDO6,
	PM800_ID_LDO7,
	PM800_ID_LDO8,
	PM800_ID_LDO9,
	PM800_ID_LDO10,
	PM800_ID_LDO11,
	PM800_ID_LDO12,
	PM800_ID_LDO13,
	PM800_ID_LDO14,
	PM800_ID_LDO15,
	PM800_ID_LDO16,
	PM800_ID_LDO17,
	PM800_ID_LDO18,
	PM800_ID_LDO19,

PM800_ID_RG_MAX,
};
#define PM800_MAX_REGULATOR	PM800_ID_RG_MAX	/* 5 Bucks, 19 LDOs */
#define PM800_NUM_BUCK (5)	/*5 Bucks */
#define PM800_NUM_LDO (19)	/*19 Bucks */

/* page 0 basic: slave adder 0x60 */

#define PM800_STATUS_1			(0x01)
#define PM800_ONKEY_STS1		BIT(0)
#define PM800_EXTON_STS1		BIT(1)
#define PM800_CHG_STS1			BIT(2)
#define PM800_BAT_STS1			BIT(3)
#define PM800_VBUS_STS1			BIT(4)
#define PM800_LDO_PGOOD_STS1		BIT(5)
#define PM800_BUCK_PGOOD_STS1		BIT(6)

#define PM800_STATUS_2			(0x02)
#define PM800_RTC_ALARM_STS2		BIT(0)

/* Wakeup Registers */
#define PM800_WAKEUP1			(0x0D)

#define PM800_WAKEUP2			(0x0E)
#define PM800_WAKEUP2_INV_INT		BIT(0)
#define PM800_WAKEUP2_INT_CLEAR		BIT(1)
#define PM800_WAKEUP2_INT_MASK		BIT(2)

#define PM800_POWER_UP_LOG		(0x10)

/* Referance and low power registers */
#define PM800_LOW_POWER1		(0x20)
#define PM800_LOW_POWER2		(0x21)
#define PM800_LOW_POWER_CONFIG3		(0x22)
#define PM800_LOW_POWER_CONFIG4		(0x23)

/* GPIO register */
#define PM800_GPIO_0_1_CNTRL		(0x30)
#define PM800_GPIO0_VAL			BIT(0)
#define PM800_GPIO0_GPIO_MODE(x)	(x << 1)
#define PM800_GPIO1_VAL			BIT(4)
#define PM800_GPIO1_GPIO_MODE(x)	(x << 5)

#define PM800_GPIO_2_3_CNTRL		(0x31)
#define PM800_GPIO2_VAL			BIT(0)
#define PM800_GPIO2_GPIO_MODE(x)	(x << 1)
#define PM800_GPIO3_VAL			BIT(4)
#define PM800_GPIO3_GPIO_MODE(x)	(x << 5)
#define PM800_GPIO3_MODE_MASK		0x1F
#define PM800_GPIO3_HEADSET_MODE	PM800_GPIO3_GPIO_MODE(6)

#define PM800_GPIO_4_CNTRL		(0x32)
#define PM800_GPIO4_VAL			BIT(0)
#define PM800_GPIO4_GPIO_MODE(x)	(x << 1)

#define PM800_HEADSET_CNTRL		(0x38)
#define PM800_HEADSET_DET_EN		BIT(7)
#define PM800_HSDET_SLP			BIT(1)
/* PWM register */
#define PM800_PWM1			(0x40)
#define PM800_PWM2			(0x41)
#define PM800_PWM3			(0x42)
#define PM800_PWM4			(0x43)

/* RTC Registers */
#define PM800_RTC_CONTROL		(0xD0)
#define PM800_RTC_MISC1			(0xE1)
#define PM800_RTC_MISC2			(0xE2)
#define PM800_RTC_MISC3			(0xE3)
#define PM800_RTC_MISC4			(0xE4)
#define PM800_RTC_MISC5			(0xE7)
/* bit definitions of RTC Register 1 (0xD0) */
#define PM800_ALARM1_EN			BIT(0)
#define PM800_ALARM_WAKEUP		BIT(4)
#define PM800_ALARM			BIT(5)
#define PM800_RTC1_USE_XO		BIT(7)

/* Regulator Control Registers: BUCK1,BUCK5,LDO1 have DVC */

/* buck registers */
#define PM800_SLEEP_BUCK1		(0x30)

/* BUCK Sleep Mode Register 1: BUCK[1..4] */
#define PM800_BUCK_SLP1			(0x5A)
#define PM800_BUCK1_SLP1_SHIFT		0
#define PM800_BUCK1_SLP1_MASK		(0x3 << PM800_BUCK1_SLP1_SHIFT)

/* page 2 GPADC: slave adder 0x02 */
#define PM800_GPADC_MEAS_EN1		(0x01)
#define PM800_MEAS_EN1_VBAT		BIT(2)
#define PM800_GPADC_MEAS_EN2		(0x02)
#define PM800_MEAS_EN2_RFTMP		BIT(0)
#define PM800_MEAS_GP0_EN		BIT(2)
#define PM800_MEAS_GP1_EN		BIT(3)
#define PM800_MEAS_GP2_EN		BIT(4)
#define PM800_MEAS_GP3_EN		BIT(5)
#define PM800_MEAS_GP4_EN		BIT(6)

#define PM800_GPADC_MISC_CONFIG1	(0x05)
#define PM800_GPADC_MISC_CONFIG2	(0x06)
#define PM800_GPADC_MISC_GPFSM_EN	BIT(0)
#define PM800_GPADC_SLOW_MODE(x)	(x << 3)

#define PM800_GPADC_MISC_CONFIG3	(0x09)
#define PM800_GPADC_MISC_CONFIG4	(0x0A)

#define PM800_GPADC_PREBIAS1		(0x0F)
#define PM800_GPADC0_GP_PREBIAS_TIME(x)	(x << 0)
#define PM800_GPADC_PREBIAS2		(0x10)

#define PM800_GP_BIAS_ENA1		(0x14)
#define PM800_GPADC_GP_BIAS_EN0		BIT(0)
#define PM800_GPADC_GP_BIAS_EN1		BIT(1)
#define PM800_GPADC_GP_BIAS_EN2		BIT(2)
#define PM800_GPADC_GP_BIAS_EN3		BIT(3)

#define PM800_GP_BIAS_OUT1		(0x15)
#define PM800_BIAS_OUT_GP0		BIT(0)
#define PM800_BIAS_OUT_GP1		BIT(1)
#define PM800_BIAS_OUT_GP2		BIT(2)
#define PM800_BIAS_OUT_GP3		BIT(3)

#define PM800_GPADC0_LOW_TH		0x20
#define PM800_GPADC1_LOW_TH		0x21
#define PM800_GPADC2_LOW_TH		0x22
#define PM800_GPADC3_LOW_TH		0x23
#define PM800_GPADC4_LOW_TH		0x24

#define PM800_GPADC0_UPP_TH		0x30
#define PM800_GPADC1_UPP_TH		0x31
#define PM800_GPADC2_UPP_TH		0x32
#define PM800_GPADC3_UPP_TH		0x33
#define PM800_GPADC4_UPP_TH		0x34

#define PM800_VBBAT_MEAS1		0x40
#define PM800_VBBAT_MEAS2		0x41
#define PM800_VBAT_MEAS1		0x42
#define PM800_VBAT_MEAS2		0x43
#define PM800_VSYS_MEAS1		0x44
#define PM800_VSYS_MEAS2		0x45
#define PM800_VCHG_MEAS1		0x46
#define PM800_VCHG_MEAS2		0x47
#define PM800_TINT_MEAS1		0x50
#define PM800_TINT_MEAS2		0x51
#define PM800_PMOD_MEAS1		0x52
#define PM800_PMOD_MEAS2		0x53

#define PM800_GPADC0_MEAS1		0x54
#define PM800_GPADC0_MEAS2		0x55
#define PM800_GPADC1_MEAS1		0x56
#define PM800_GPADC1_MEAS2		0x57
#define PM800_GPADC2_MEAS1		0x58
#define PM800_GPADC2_MEAS2		0x59
#define PM800_GPADC3_MEAS1		0x5A
#define PM800_GPADC3_MEAS2		0x5B
#define PM800_GPADC4_MEAS1		0x5C
#define PM800_GPADC4_MEAS2		0x5D

#define PM800_GPADC4_AVG1		0xA8
#define PM800_GPADC4_AVG2		0xA9

/* 88PM805 Registers */
#define PM805_MAIN_POWERUP		(0x01)
#define PM805_INT_STATUS0		(0x02)	/* for ena/dis all interrupts */

#define PM805_STATUS0_INT_CLEAR		(1 << 0)
#define PM805_STATUS0_INV_INT		(1 << 1)
#define PM800_STATUS0_INT_MASK		(1 << 2)

#define PM805_INT_STATUS1		(0x03)

#define PM805_INT1_HP1_SHRT		BIT(0)
#define PM805_INT1_HP2_SHRT		BIT(1)
#define PM805_INT1_MIC_CONFLICT		BIT(2)
#define PM805_INT1_CLIP_FAULT		BIT(3)
#define PM805_INT1_LDO_OFF		BIT(4)
#define PM805_INT1_SRC_DPLL_LOCK	BIT(5)

#define PM805_INT_STATUS2		(0x04)

#define PM805_INT2_MIC_DET		BIT(0)
#define PM805_INT2_SHRT_BTN_DET		BIT(1)
#define PM805_INT2_VOLM_BTN_DET		BIT(2)
#define PM805_INT2_VOLP_BTN_DET		BIT(3)
#define PM805_INT2_RAW_PLL_FAULT	BIT(4)
#define PM805_INT2_FINE_PLL_FAULT	BIT(5)

#define PM805_INT_MASK1			(0x05)
#define PM805_INT_MASK2			(0x06)
#define PM805_SHRT_BTN_DET		BIT(1)

/* number of status and int reg in a row */
#define PM805_INT_REG_NUM		(2)

#define PM805_MIC_DET1			(0x07)
#define PM805_MIC_DET_EN_MIC_DET	BIT(0)
#define PM805_MIC_DET2			(0x08)
#define PM805_MIC_DET_STATUS1		(0x09)

#define PM805_MIC_DET_STATUS3		(0x0A)
#define PM805_AUTO_SEQ_STATUS1		(0x0B)
#define PM805_AUTO_SEQ_STATUS2		(0x0C)

#define PM805_ADC_SETTING1		(0x10)
#define PM805_ADC_SETTING2		(0x11)
#define PM805_ADC_SETTING3		(0x11)
#define PM805_ADC_GAIN1			(0x12)
#define PM805_ADC_GAIN2			(0x13)
#define PM805_DMIC_SETTING		(0x15)
#define PM805_DWS_SETTING		(0x16)
#define PM805_MIC_CONFLICT_STS		(0x17)

#define PM805_PDM_SETTING1		(0x20)
#define PM805_PDM_SETTING2		(0x21)
#define PM805_PDM_SETTING3		(0x22)
#define PM805_PDM_CONTROL1		(0x23)
#define PM805_PDM_CONTROL2		(0x24)
#define PM805_PDM_CONTROL3		(0x25)

#define PM805_HEADPHONE_SETTING		(0x26)
#define PM805_HEADPHONE_GAIN_A2A	(0x27)
#define PM805_HEADPHONE_SHORT_STATE	(0x28)
#define PM805_EARPHONE_SETTING		(0x29)
#define PM805_AUTO_SEQ_SETTING		(0x2A)

struct pm80x_rtc_pdata {
	int		vrtc;
	int		rtc_wakeup;
};

struct pm80x_subchip {
	struct i2c_client *power_page;	/* chip client for power page */
	struct i2c_client *gpadc_page;	/* chip client for gpadc page */
	struct regmap *regmap_power;
	struct regmap *regmap_gpadc;
	unsigned short power_page_addr;	/* power page I2C address */
	unsigned short gpadc_page_addr;	/* gpadc page I2C address */
};

struct pm80x_chip {
	struct pm80x_subchip *subchip;
	struct device *dev;
	struct i2c_client *client;
	struct i2c_client *companion;
	struct regmap *regmap;
	struct regmap_irq_chip *regmap_irq_chip;
	struct regmap_irq_chip_data *irq_data;
	int type;
	int irq;
	int irq_mode;
	unsigned long wu_flag;
	spinlock_t lock;
};

struct pm80x_platform_data {
	struct pm80x_rtc_pdata *rtc;
	/*
	 * For the regulator not defined, set regulators[not_defined] to be
	 * NULL. num_regulators are the number of regulators supposed to be
	 * initialized. If all regulators are not defined, set num_regulators
	 * to be 0.
	 */
	struct regulator_init_data *regulators[PM800_ID_RG_MAX];
	unsigned int num_regulators;
	int irq_mode;		/* Clear interrupt by read/write(0/1) */
	int batt_det;		/* enable/disable */
	int (*plat_config)(struct pm80x_chip *chip,
				struct pm80x_platform_data *pdata);
};

extern const struct dev_pm_ops pm80x_pm_ops;
extern const struct regmap_config pm80x_regmap_config;

static inline int pm80x_request_irq(struct pm80x_chip *pm80x, int irq,
				     irq_handler_t handler, unsigned long flags,
				     const char *name, void *data)
{
	if (!pm80x->irq_data)
		return -EINVAL;
	return request_threaded_irq(regmap_irq_get_virq(pm80x->irq_data, irq),
				    NULL, handler, flags, name, data);
}

static inline void pm80x_free_irq(struct pm80x_chip *pm80x, int irq, void *data)
{
	if (!pm80x->irq_data)
		return;
	free_irq(regmap_irq_get_virq(pm80x->irq_data, irq), data);
}

#ifdef CONFIG_PM
static inline int pm80x_dev_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
	int irq = platform_get_irq(pdev, 0);

if (device_may_wakeup(dev))
		set_bit(irq, &chip->wu_flag);

return 0;
}

static inline int pm80x_dev_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
	int irq = platform_get_irq(pdev, 0);

if (device_may_wakeup(dev))
		clear_bit(irq, &chip->wu_flag);

return 0;
}
#endif

extern int pm80x_init(struct i2c_client *client);
extern int pm80x_deinit(void);
#endif /* __LINUX_MFD_88PM80X_H */

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