FM / mfd

/usr/src/linux-headers-5.15.0-181/include/linux/mfd/

/usr/src/linux-headers-5.15.0-181/include/linux/mfd

Name	Size	Mode	Actions
abx500/	-	0755	rm
arizona/	-	0755	rm
atc260x/	-	0755	rm
da9052/	-	0755	rm
da9055/	-	0755	rm
da9062/	-	0755	rm
da9063/	-	0755	rm
da9150/	-	0755	rm
madera/	-	0755	rm
mt6323/	-	0755	rm
mt6358/	-	0755	rm
mt6359/	-	0755	rm
mt6359p/	-	0755	rm
mt6397/	-	0755	rm
pcf50633/	-	0755	rm
samsung/	-	0755	rm
syscon/	-	0755	rm
wcd934x/	-	0755	rm
wm831x/	-	0755	rm
wm8350/	-	0755	rm
wm8994/	-	0755	rm
88pm80x.h	10080	0644	edit dl rm
88pm860x.h	13508	0644	edit dl rm
aat2870.h	4014	0644	edit dl rm
abx500.h	2401	0644	edit dl rm
ac100.h	6121	0644	edit dl rm
adp5520.h	8506	0644	edit dl rm
altera-a10sr.h	2955	0644	edit dl rm
altera-sysmgr.h	725	0644	edit dl rm
as3711.h	2808	0644	edit dl rm
as3722.h	14879	0644	edit dl rm
asic3.h	12368	0644	edit dl rm
atmel-hlcdc.h	2094	0644	edit dl rm
axp20x.h	17105	0644	edit dl rm
bcm590xx.h	618	0644	edit dl rm
bcm2835-pm.h	235	0644	edit dl rm
bd9571mwv.h	3537	0644	edit dl rm
core.h	4760	0644	edit dl rm
da8xx-cfgchip.h	7046	0644	edit dl rm
da903x.h	7218	0644	edit dl rm
davinci_voicecodec.h	2658	0644	edit dl rm
db8500-prcmu.h	21842	0644	edit dl rm
dbx500-prcmu.h	14268	0644	edit dl rm
dln2.h	3617	0644	edit dl rm
dm355evm_msp.h	2879	0644	edit dl rm
ds1wm.h	817	0644	edit dl rm
ezx-pcap.h	7932	0644	edit dl rm
gsc.h	1818	0644	edit dl rm
hi655x-pmic.h	1934	0644	edit dl rm
hi6421-pmic.h	1184	0644	edit dl rm
hi6421-spmi-pmic.h	519	0644	edit dl rm
htc-pasic3.h	1225	0644	edit dl rm
idt8a340_reg.h	30024	0644	edit dl rm
idt82p33_reg.h	2938	0644	edit dl rm
imx25-tsadc.h	4972	0644	edit dl rm
ingenic-tcu.h	1753	0644	edit dl rm
intel-m10-bmc.h	4907	0644	edit dl rm
intel_pmc_bxt.h	1542	0644	edit dl rm
intel_soc_pmic.h	1693	0644	edit dl rm
intel_soc_pmic_bxtwc.h	1641	0644	edit dl rm
intel_soc_pmic_mrfld.h	2288	0644	edit dl rm
ipaq-micro.h	3750	0644	edit dl rm
iqs62x.h	2797	0644	edit dl rm
janz.h	846	0644	edit dl rm
kempld.h	4122	0644	edit dl rm
khadas-mcu.h	3545	0644	edit dl rm
ljca.h	1043	0644	edit dl rm
lm3533.h	2440	0644	edit dl rm
lochnagar.h	1624	0644	edit dl rm
lochnagar1_regs.h	7896	0644	edit dl rm
lochnagar2_regs.h	15550	0644	edit dl rm
lp873x.h	8896	0644	edit dl rm
lp3943.h	2598	0644	edit dl rm
lp8788-isink.h	1069	0644	edit dl rm
lp8788.h	8424	0644	edit dl rm
lp87565.h	7588	0644	edit dl rm
lpc_ich.h	655	0644	edit dl rm
max8907.h	7555	0644	edit dl rm
max8925.h	7204	0644	edit dl rm
max8997-private.h	12057	0644	edit dl rm
max8997.h	5513	0644	edit dl rm
max8998-private.h	4450	0644	edit dl rm
max8998.h	2983	0644	edit dl rm
max14577-private.h	15776	0644	edit dl rm
max14577.h	2281	0644	edit dl rm
max77620.h	10967	0644	edit dl rm
max77650.h	1887	0644	edit dl rm
max77686-private.h	12850	0644	edit dl rm
max77686.h	2033	0644	edit dl rm
max77693-common.h	1088	0644	edit dl rm
max77693-private.h	17705	0644	edit dl rm
max77693.h	1619	0644	edit dl rm
max77843-private.h	15589	0644	edit dl rm
mc13xxx.h	7769	0644	edit dl rm
mc13783.h	2756	0644	edit dl rm
mc13892.h	792	0644	edit dl rm
mcp.h	1647	0644	edit dl rm
menelaus.h	1284	0644	edit dl rm
motorola-cpcap.h	12651	0644	edit dl rm
mp2629.h	422	0644	edit dl rm
mxs-lradc.h	5736	0644	edit dl rm
ntxec.h	907	0644	edit dl rm
palmas.h	152382	0644	edit dl rm
qcom_rpm.h	293	0644	edit dl rm
rave-sp.h	1448	0644	edit dl rm
rc5t583.h	9501	0644	edit dl rm
rdc321x.h	591	0644	edit dl rm
retu.h	723	0644	edit dl rm
rk808.h	19885	0644	edit dl rm
rn5t618.h	7840	0644	edit dl rm
rohm-bd718x7.h	9038	0644	edit dl rm
rohm-bd957x.h	4362	0644	edit dl rm
rohm-bd70528.h	11082	0644	edit dl rm
rohm-bd71815.h	15608	0644	edit dl rm
rohm-bd71828.h	13084	0644	edit dl rm
rohm-generic.h	2825	0644	edit dl rm
rohm-shared.h	631	0644	edit dl rm
rsmu.h	897	0644	edit dl rm
rt5033-private.h	7927	0644	edit dl rm
rt5033.h	1098	0644	edit dl rm
sc27xx-pmic.h	228	0644	edit dl rm
si476x-core.h	15192	0644	edit dl rm
si476x-platform.h	6189	0644	edit dl rm
si476x-reports.h	4596	0644	edit dl rm
sky81452.h	354	0644	edit dl rm
sta2x11-mfd.h	18565	0644	edit dl rm
stm32-lptimer.h	2102	0644	edit dl rm
stm32-timers.h	5948	0644	edit dl rm
stmfx.h	4051	0644	edit dl rm
stmpe.h	4083	0644	edit dl rm
stpmic1.h	5750	0644	edit dl rm
stw481x.h	1422	0644	edit dl rm
sun4i-gpadc.h	3564	0644	edit dl rm
syscon.h	1871	0644	edit dl rm
t7l66xb.h	622	0644	edit dl rm
tc3589x.h	4123	0644	edit dl rm
tc6387xb.h	516	0644	edit dl rm
tc6393xb.h	1402	0644	edit dl rm
ti-lmu-register.h	5666	0644	edit dl rm
ti-lmu.h	1857	0644	edit dl rm
ti_am335x_tscadc.h	6028	0644	edit dl rm
tmio.h	3894	0644	edit dl rm
tps6105x.h	3079	0644	edit dl rm
tps6507x.h	5055	0644	edit dl rm
tps6586x.h	2802	0644	edit dl rm
tps65010.h	6685	0644	edit dl rm
tps65086.h	3581	0644	edit dl rm
tps65090.h	3814	0644	edit dl rm
tps65217.h	8436	0644	edit dl rm
tps65218.h	8218	0644	edit dl rm
tps65910.h	30093	0644	edit dl rm
tps65912.h	10145	0644	edit dl rm
tps68470.h	3002	0644	edit dl rm
tps80031.h	20059	0644	edit dl rm
twl.h	25494	0644	edit dl rm
twl4030-audio.h	8129	0644	edit dl rm
twl6040.h	6716	0644	edit dl rm
ucb1x00.h	6559	0644	edit dl rm
viperboard.h	2802	0644	edit dl rm
wl1273-core.h	7887	0644	edit dl rm
wm97xx.h	369	0644	edit dl rm
wm8400-audio.h	70819	0644	edit dl rm
wm8400-private.h	58492	0644	edit dl rm
wm8400.h	561	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/include/linux/mfd/lp87565.h (7588B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Functions to access LP87565 power management chip.
 *
 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
 */

#ifndef __LINUX_MFD_LP87565_H
#define __LINUX_MFD_LP87565_H

#include <linux/i2c.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>

enum lp87565_device_type {
	LP87565_DEVICE_TYPE_UNKNOWN	= 0,
	LP87565_DEVICE_TYPE_LP87524_Q1,
	LP87565_DEVICE_TYPE_LP87561_Q1,
	LP87565_DEVICE_TYPE_LP87565_Q1,
};

/* All register addresses */
#define LP87565_REG_DEV_REV		0X00
#define LP87565_REG_OTP_REV		0X01
#define LP87565_REG_BUCK0_CTRL_1		0X02
#define LP87565_REG_BUCK0_CTRL_2		0X03

#define LP87565_REG_BUCK1_CTRL_1		0X04
#define LP87565_REG_BUCK1_CTRL_2		0X05

#define LP87565_REG_BUCK2_CTRL_1		0X06
#define LP87565_REG_BUCK2_CTRL_2		0X07

#define LP87565_REG_BUCK3_CTRL_1		0X08
#define LP87565_REG_BUCK3_CTRL_2		0X09

#define LP87565_REG_BUCK0_VOUT			0X0A
#define LP87565_REG_BUCK0_FLOOR_VOUT		0X0B

#define LP87565_REG_BUCK1_VOUT			0X0C
#define LP87565_REG_BUCK1_FLOOR_VOUT		0X0D

#define LP87565_REG_BUCK2_VOUT			0X0E
#define LP87565_REG_BUCK2_FLOOR_VOUT		0X0F

#define LP87565_REG_BUCK3_VOUT			0X10
#define LP87565_REG_BUCK3_FLOOR_VOUT		0X11

#define LP87565_REG_BUCK0_DELAY			0X12
#define LP87565_REG_BUCK1_DELAY			0X13

#define LP87565_REG_BUCK2_DELAY			0X14
#define LP87565_REG_BUCK3_DELAY			0X15

#define LP87565_REG_GPO2_DELAY			0X16
#define LP87565_REG_GPO3_DELAY			0X17
#define LP87565_REG_RESET			0X18
#define LP87565_REG_CONFIG			0X19

#define LP87565_REG_INT_TOP_1			0X1A
#define LP87565_REG_INT_TOP_2			0X1B

#define LP87565_REG_INT_BUCK_0_1		0X1C
#define LP87565_REG_INT_BUCK_2_3		0X1D
#define LP87565_REG_TOP_STAT			0X1E
#define LP87565_REG_BUCK_0_1_STAT		0X1F
#define LP87565_REG_BUCK_2_3_STAT		0x20

#define LP87565_REG_TOP_MASK_1			0x21
#define LP87565_REG_TOP_MASK_2			0x22

#define LP87565_REG_BUCK_0_1_MASK		0x23
#define LP87565_REG_BUCK_2_3_MASK		0x24
#define LP87565_REG_SEL_I_LOAD			0x25

#define LP87565_REG_I_LOAD_2			0x26
#define LP87565_REG_I_LOAD_1			0x27

#define LP87565_REG_PGOOD_CTRL1			0x28
#define LP87565_REG_PGOOD_CTRL2			0x29
#define LP87565_REG_PGOOD_FLT			0x2A
#define LP87565_REG_PLL_CTRL			0x2B
#define LP87565_REG_PIN_FUNCTION		0x2C
#define LP87565_REG_GPIO_CONFIG			0x2D
#define LP87565_REG_GPIO_IN			0x2E
#define LP87565_REG_GPIO_OUT			0x2F

#define LP87565_REG_MAX			LP87565_REG_GPIO_OUT

/* Register field definitions */
#define LP87565_DEV_REV_DEV_ID			0xC0
#define LP87565_DEV_REV_ALL_LAYER		0x30
#define LP87565_DEV_REV_METAL_LAYER		0x0F

#define LP87565_OTP_REV_OTP_ID			0xFF

#define LP87565_BUCK_CTRL_1_EN			BIT(7)
#define LP87565_BUCK_CTRL_1_EN_PIN_CTRL		BIT(6)
#define LP87565_BUCK_CTRL_1_PIN_SELECT_EN	0x30

#define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN	BIT(3)
#define LP87565_BUCK_CTRL_1_RDIS_EN		BIT(2)
#define LP87565_BUCK_CTRL_1_FPWM		BIT(1)
/* Bit0 is reserved for BUCK1 and BUCK3 and valid only for BUCK0 and BUCK2 */
#define LP87565_BUCK_CTRL_1_FPWM_MP_0_2		BIT(0)

#define LP87565_BUCK_CTRL_2_ILIM		0x38
#define LP87565_BUCK_CTRL_2_SLEW_RATE		0x07

#define LP87565_BUCK_VSET			0xFF
#define LP87565_BUCK_FLOOR_VSET			0xFF

#define LP87565_BUCK_SHUTDOWN_DELAY		0xF0
#define LP87565_BUCK_STARTUP_DELAY		0x0F

#define LP87565_GPIO_SHUTDOWN_DELAY		0xF0
#define LP87565_GPIO_STARTUP_DELAY		0x0F

#define LP87565_RESET_SW_RESET			BIT(0)

#define LP87565_CONFIG_DOUBLE_DELAY		BIT(7)
#define LP87565_CONFIG_CLKIN_PD			BIT(6)
#define LP87565_CONFIG_EN4_PD			BIT(5)
#define LP87565_CONFIG_EN3_PD			BIT(4)
#define LP87565_CONFIG_TDIE_WARN_LEVEL		BIT(3)
#define LP87565_CONFIG_EN2_PD			BIT(2)
#define LP87565_CONFIG_EN1_PD			BIT(1)

#define LP87565_INT_GPIO			BIT(7)
#define LP87565_INT_BUCK23			BIT(6)
#define LP87565_INT_BUCK01			BIT(5)
#define LP87565_NO_SYNC_CLK			BIT(4)
#define LP87565_TDIE_SD				BIT(3)
#define LP87565_TDIE_WARN			BIT(2)
#define LP87565_INT_OVP				BIT(1)
#define LP87565_I_LOAD_READY			BIT(0)

#define LP87565_INT_TOP2_RESET_REG		BIT(0)

#define LP87565_BUCK1_PG_INT			BIT(6)
#define LP87565_BUCK1_SC_INT			BIT(5)
#define LP87565_BUCK1_ILIM_INT			BIT(4)
#define LP87565_BUCK0_PG_INT			BIT(2)
#define LP87565_BUCK0_SC_INT			BIT(1)
#define LP87565_BUCK0_ILIM_INT			BIT(0)

#define LP87565_BUCK3_PG_INT			BIT(6)
#define LP87565_BUCK3_SC_INT			BIT(5)
#define LP87565_BUCK3_ILIM_INT			BIT(4)
#define LP87565_BUCK2_PG_INT			BIT(2)
#define LP87565_BUCK2_SC_INT			BIT(1)
#define LP87565_BUCK2_ILIM_INT			BIT(0)

#define LP87565_SYNC_CLK_STAT			BIT(4)
#define LP87565_TDIE_SD_STAT			BIT(3)
#define LP87565_TDIE_WARN_STAT			BIT(2)
#define LP87565_OVP_STAT			BIT(1)

#define LP87565_BUCK1_STAT			BIT(7)
#define LP87565_BUCK1_PG_STAT			BIT(6)
#define LP87565_BUCK1_ILIM_STAT			BIT(4)
#define LP87565_BUCK0_STAT			BIT(3)
#define LP87565_BUCK0_PG_STAT			BIT(2)
#define LP87565_BUCK0_ILIM_STAT			BIT(0)

#define LP87565_BUCK3_STAT			BIT(7)
#define LP87565_BUCK3_PG_STAT			BIT(6)
#define LP87565_BUCK3_ILIM_STAT			BIT(4)
#define LP87565_BUCK2_STAT			BIT(3)
#define LP87565_BUCK2_PG_STAT			BIT(2)
#define LP87565_BUCK2_ILIM_STAT			BIT(0)

#define LPL87565_GPIO_MASK			BIT(7)
#define LPL87565_SYNC_CLK_MASK			BIT(4)
#define LPL87565_TDIE_WARN_MASK			BIT(2)
#define LPL87565_I_LOAD_READY_MASK		BIT(0)

#define LPL87565_RESET_REG_MASK			BIT(0)

#define LPL87565_BUCK1_PG_MASK			BIT(6)
#define LPL87565_BUCK1_ILIM_MASK		BIT(4)
#define LPL87565_BUCK0_PG_MASK			BIT(2)
#define LPL87565_BUCK0_ILIM_MASK		BIT(0)

#define LPL87565_BUCK3_PG_MASK			BIT(6)
#define LPL87565_BUCK3_ILIM_MASK		BIT(4)
#define LPL87565_BUCK2_PG_MASK			BIT(2)
#define LPL87565_BUCK2_ILIM_MASK		BIT(0)

#define LP87565_LOAD_CURRENT_BUCK_SELECT	0x3

#define LP87565_I_LOAD2_BUCK_LOAD_CURRENT	0x3
#define LP87565_I_LOAD1_BUCK_LOAD_CURRENT	0xFF

#define LP87565_PG3_SEL				0xC0
#define LP87565_PG2_SEL				0x30
#define LP87565_PG1_SEL				0x0C
#define LP87565_PG0_SEL				0x03

#define LP87565_HALF_DAY			BIT(7)
#define LP87565_EN_PG0_NINT			BIT(6)
#define LP87565_PGOOD_SET_DELAY			BIT(5)
#define LP87565_EN_PGFLT_STAT			BIT(4)
#define LP87565_PGOOD_WINDOW			BIT(2)
#define LP87565_PGOOD_OD			BIT(1)
#define LP87565_PGOOD_POL			BIT(0)

#define LP87565_PG3_FLT				BIT(3)
#define LP87565_PG2_FLT				BIT(2)
#define LP87565_PG1_FLT				BIT(1)
#define LP87565_PG0_FLT				BIT(0)

#define LP87565_PLL_MODE			0xC0
#define LP87565_EXT_CLK_FREQ			0x1F

#define LP87565_EN_SPREAD_SPEC			BIT(7)
#define LP87565_EN_PIN_CTRL_GPIO3		BIT(6)
#define LP87565_EN_PIN_SELECT_GPIO3		BIT(5)
#define LP87565_EN_PIN_CTRL_GPIO2		BIT(4)
#define LP87565_EN_PIN_SELECT_GPIO2		BIT(3)
#define LP87565_GPIO3_SEL			BIT(2)
#define LP87565_GPIO2_SEL			BIT(1)
#define LP87565_GPIO1_SEL			BIT(0)

#define LP87565_GPIO3_OD			BIT(6)
#define LP87565_GPIO2_OD			BIT(5)
#define LP87565_GPIO1_OD			BIT(4)
#define LP87565_GPIO3_DIR			BIT(2)
#define LP87565_GPIO2_DIR			BIT(1)
#define LP87565_GPIO1_DIR			BIT(0)

#define LP87565_GPIO3_IN			BIT(2)
#define LP87565_GPIO2_IN			BIT(1)
#define LP87565_GPIO1_IN			BIT(0)

#define LP87565_GPIO3_OUT			BIT(2)
#define LP87565_GPIO2_OUT			BIT(1)
#define LP87565_GPIO1_OUT			BIT(0)

/**
 * struct LP87565 - state holder for the LP87565 driver
 * @dev: struct device pointer for MFD device
 * @rev: revision of the LP87565
 * @dev_type: The device type for example lp87565-q1
 * @lock: lock guarding the data structure
 * @regmap: register map of the LP87565 PMIC
 *
 * Device data may be used to access the LP87565 chip
 */
struct lp87565 {
	struct device *dev;
	u8 rev;
	u8 dev_type;
	struct regmap *regmap;
	struct gpio_desc *reset_gpio;
};
#endif /* __LINUX_MFD_LP87565_H */

cmd: