FM / mfd

/usr/src/linux-headers-5.15.0-181/include/linux/mfd/

/usr/src/linux-headers-5.15.0-181/include/linux/mfd

Name	Size	Mode	Actions
abx500/	-	0755	rm
arizona/	-	0755	rm
atc260x/	-	0755	rm
da9052/	-	0755	rm
da9055/	-	0755	rm
da9062/	-	0755	rm
da9063/	-	0755	rm
da9150/	-	0755	rm
madera/	-	0755	rm
mt6323/	-	0755	rm
mt6358/	-	0755	rm
mt6359/	-	0755	rm
mt6359p/	-	0755	rm
mt6397/	-	0755	rm
pcf50633/	-	0755	rm
samsung/	-	0755	rm
syscon/	-	0755	rm
wcd934x/	-	0755	rm
wm831x/	-	0755	rm
wm8350/	-	0755	rm
wm8994/	-	0755	rm
88pm80x.h	10080	0644	edit dl rm
88pm860x.h	13508	0644	edit dl rm
aat2870.h	4014	0644	edit dl rm
abx500.h	2401	0644	edit dl rm
ac100.h	6121	0644	edit dl rm
adp5520.h	8506	0644	edit dl rm
altera-a10sr.h	2955	0644	edit dl rm
altera-sysmgr.h	725	0644	edit dl rm
as3711.h	2808	0644	edit dl rm
as3722.h	14879	0644	edit dl rm
asic3.h	12368	0644	edit dl rm
atmel-hlcdc.h	2094	0644	edit dl rm
axp20x.h	17105	0644	edit dl rm
bcm590xx.h	618	0644	edit dl rm
bcm2835-pm.h	235	0644	edit dl rm
bd9571mwv.h	3537	0644	edit dl rm
core.h	4760	0644	edit dl rm
da8xx-cfgchip.h	7046	0644	edit dl rm
da903x.h	7218	0644	edit dl rm
davinci_voicecodec.h	2658	0644	edit dl rm
db8500-prcmu.h	21842	0644	edit dl rm
dbx500-prcmu.h	14268	0644	edit dl rm
dln2.h	3617	0644	edit dl rm
dm355evm_msp.h	2879	0644	edit dl rm
ds1wm.h	817	0644	edit dl rm
ezx-pcap.h	7932	0644	edit dl rm
gsc.h	1818	0644	edit dl rm
hi655x-pmic.h	1934	0644	edit dl rm
hi6421-pmic.h	1184	0644	edit dl rm
hi6421-spmi-pmic.h	519	0644	edit dl rm
htc-pasic3.h	1225	0644	edit dl rm
idt8a340_reg.h	30024	0644	edit dl rm
idt82p33_reg.h	2938	0644	edit dl rm
imx25-tsadc.h	4972	0644	edit dl rm
ingenic-tcu.h	1753	0644	edit dl rm
intel-m10-bmc.h	4907	0644	edit dl rm
intel_pmc_bxt.h	1542	0644	edit dl rm
intel_soc_pmic.h	1693	0644	edit dl rm
intel_soc_pmic_bxtwc.h	1641	0644	edit dl rm
intel_soc_pmic_mrfld.h	2288	0644	edit dl rm
ipaq-micro.h	3750	0644	edit dl rm
iqs62x.h	2797	0644	edit dl rm
janz.h	846	0644	edit dl rm
kempld.h	4122	0644	edit dl rm
khadas-mcu.h	3545	0644	edit dl rm
ljca.h	1043	0644	edit dl rm
lm3533.h	2440	0644	edit dl rm
lochnagar.h	1624	0644	edit dl rm
lochnagar1_regs.h	7896	0644	edit dl rm
lochnagar2_regs.h	15550	0644	edit dl rm
lp873x.h	8896	0644	edit dl rm
lp3943.h	2598	0644	edit dl rm
lp8788-isink.h	1069	0644	edit dl rm
lp8788.h	8424	0644	edit dl rm
lp87565.h	7588	0644	edit dl rm
lpc_ich.h	655	0644	edit dl rm
max8907.h	7555	0644	edit dl rm
max8925.h	7204	0644	edit dl rm
max8997-private.h	12057	0644	edit dl rm
max8997.h	5513	0644	edit dl rm
max8998-private.h	4450	0644	edit dl rm
max8998.h	2983	0644	edit dl rm
max14577-private.h	15776	0644	edit dl rm
max14577.h	2281	0644	edit dl rm
max77620.h	10967	0644	edit dl rm
max77650.h	1887	0644	edit dl rm
max77686-private.h	12850	0644	edit dl rm
max77686.h	2033	0644	edit dl rm
max77693-common.h	1088	0644	edit dl rm
max77693-private.h	17705	0644	edit dl rm
max77693.h	1619	0644	edit dl rm
max77843-private.h	15589	0644	edit dl rm
mc13xxx.h	7769	0644	edit dl rm
mc13783.h	2756	0644	edit dl rm
mc13892.h	792	0644	edit dl rm
mcp.h	1647	0644	edit dl rm
menelaus.h	1284	0644	edit dl rm
motorola-cpcap.h	12651	0644	edit dl rm
mp2629.h	422	0644	edit dl rm
mxs-lradc.h	5736	0644	edit dl rm
ntxec.h	907	0644	edit dl rm
palmas.h	152382	0644	edit dl rm
qcom_rpm.h	293	0644	edit dl rm
rave-sp.h	1448	0644	edit dl rm
rc5t583.h	9501	0644	edit dl rm
rdc321x.h	591	0644	edit dl rm
retu.h	723	0644	edit dl rm
rk808.h	19885	0644	edit dl rm
rn5t618.h	7840	0644	edit dl rm
rohm-bd718x7.h	9038	0644	edit dl rm
rohm-bd957x.h	4362	0644	edit dl rm
rohm-bd70528.h	11082	0644	edit dl rm
rohm-bd71815.h	15608	0644	edit dl rm
rohm-bd71828.h	13084	0644	edit dl rm
rohm-generic.h	2825	0644	edit dl rm
rohm-shared.h	631	0644	edit dl rm
rsmu.h	897	0644	edit dl rm
rt5033-private.h	7927	0644	edit dl rm
rt5033.h	1098	0644	edit dl rm
sc27xx-pmic.h	228	0644	edit dl rm
si476x-core.h	15192	0644	edit dl rm
si476x-platform.h	6189	0644	edit dl rm
si476x-reports.h	4596	0644	edit dl rm
sky81452.h	354	0644	edit dl rm
sta2x11-mfd.h	18565	0644	edit dl rm
stm32-lptimer.h	2102	0644	edit dl rm
stm32-timers.h	5948	0644	edit dl rm
stmfx.h	4051	0644	edit dl rm
stmpe.h	4083	0644	edit dl rm
stpmic1.h	5750	0644	edit dl rm
stw481x.h	1422	0644	edit dl rm
sun4i-gpadc.h	3564	0644	edit dl rm
syscon.h	1871	0644	edit dl rm
t7l66xb.h	622	0644	edit dl rm
tc3589x.h	4123	0644	edit dl rm
tc6387xb.h	516	0644	edit dl rm
tc6393xb.h	1402	0644	edit dl rm
ti-lmu-register.h	5666	0644	edit dl rm
ti-lmu.h	1857	0644	edit dl rm
ti_am335x_tscadc.h	6028	0644	edit dl rm
tmio.h	3894	0644	edit dl rm
tps6105x.h	3079	0644	edit dl rm
tps6507x.h	5055	0644	edit dl rm
tps6586x.h	2802	0644	edit dl rm
tps65010.h	6685	0644	edit dl rm
tps65086.h	3581	0644	edit dl rm
tps65090.h	3814	0644	edit dl rm
tps65217.h	8436	0644	edit dl rm
tps65218.h	8218	0644	edit dl rm
tps65910.h	30093	0644	edit dl rm
tps65912.h	10145	0644	edit dl rm
tps68470.h	3002	0644	edit dl rm
tps80031.h	20059	0644	edit dl rm
twl.h	25494	0644	edit dl rm
twl4030-audio.h	8129	0644	edit dl rm
twl6040.h	6716	0644	edit dl rm
ucb1x00.h	6559	0644	edit dl rm
viperboard.h	2802	0644	edit dl rm
wl1273-core.h	7887	0644	edit dl rm
wm97xx.h	369	0644	edit dl rm
wm8400-audio.h	70819	0644	edit dl rm
wm8400-private.h	58492	0644	edit dl rm
wm8400.h	561	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/include/linux/mfd/max8997-private.h (12057B)

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * max8997-private.h - Voltage regulator driver for the Maxim 8997
 *
 *  Copyright (C) 2010 Samsung Electrnoics
 *  MyungJoo Ham <myungjoo.ham@samsung.com>
 */

#ifndef __LINUX_MFD_MAX8997_PRIV_H
#define __LINUX_MFD_MAX8997_PRIV_H

#include <linux/i2c.h>
#include <linux/export.h>
#include <linux/irqdomain.h>

#define MAX8997_REG_INVALID	(0xff)

enum max8997_pmic_reg {
	MAX8997_REG_PMIC_ID0	= 0x00,
	MAX8997_REG_PMIC_ID1	= 0x01,
	MAX8997_REG_INTSRC	= 0x02,
	MAX8997_REG_INT1	= 0x03,
	MAX8997_REG_INT2	= 0x04,
	MAX8997_REG_INT3	= 0x05,
	MAX8997_REG_INT4	= 0x06,

MAX8997_REG_INT1MSK	= 0x08,
	MAX8997_REG_INT2MSK	= 0x09,
	MAX8997_REG_INT3MSK	= 0x0a,
	MAX8997_REG_INT4MSK	= 0x0b,

MAX8997_REG_STATUS1	= 0x0d,
	MAX8997_REG_STATUS2	= 0x0e,
	MAX8997_REG_STATUS3	= 0x0f,
	MAX8997_REG_STATUS4	= 0x10,

MAX8997_REG_MAINCON1	= 0x13,
	MAX8997_REG_MAINCON2	= 0x14,
	MAX8997_REG_BUCKRAMP	= 0x15,

MAX8997_REG_BUCK1CTRL	= 0x18,
	MAX8997_REG_BUCK1DVS1	= 0x19,
	MAX8997_REG_BUCK1DVS2	= 0x1a,
	MAX8997_REG_BUCK1DVS3	= 0x1b,
	MAX8997_REG_BUCK1DVS4	= 0x1c,
	MAX8997_REG_BUCK1DVS5	= 0x1d,
	MAX8997_REG_BUCK1DVS6	= 0x1e,
	MAX8997_REG_BUCK1DVS7	= 0x1f,
	MAX8997_REG_BUCK1DVS8	= 0x20,
	MAX8997_REG_BUCK2CTRL	= 0x21,
	MAX8997_REG_BUCK2DVS1	= 0x22,
	MAX8997_REG_BUCK2DVS2	= 0x23,
	MAX8997_REG_BUCK2DVS3	= 0x24,
	MAX8997_REG_BUCK2DVS4	= 0x25,
	MAX8997_REG_BUCK2DVS5	= 0x26,
	MAX8997_REG_BUCK2DVS6	= 0x27,
	MAX8997_REG_BUCK2DVS7	= 0x28,
	MAX8997_REG_BUCK2DVS8	= 0x29,
	MAX8997_REG_BUCK3CTRL	= 0x2a,
	MAX8997_REG_BUCK3DVS	= 0x2b,
	MAX8997_REG_BUCK4CTRL	= 0x2c,
	MAX8997_REG_BUCK4DVS	= 0x2d,
	MAX8997_REG_BUCK5CTRL	= 0x2e,
	MAX8997_REG_BUCK5DVS1	= 0x2f,
	MAX8997_REG_BUCK5DVS2	= 0x30,
	MAX8997_REG_BUCK5DVS3	= 0x31,
	MAX8997_REG_BUCK5DVS4	= 0x32,
	MAX8997_REG_BUCK5DVS5	= 0x33,
	MAX8997_REG_BUCK5DVS6	= 0x34,
	MAX8997_REG_BUCK5DVS7	= 0x35,
	MAX8997_REG_BUCK5DVS8	= 0x36,
	MAX8997_REG_BUCK6CTRL	= 0x37,
	MAX8997_REG_BUCK6BPSKIPCTRL	= 0x38,
	MAX8997_REG_BUCK7CTRL	= 0x39,
	MAX8997_REG_BUCK7DVS	= 0x3a,
	MAX8997_REG_LDO1CTRL	= 0x3b,
	MAX8997_REG_LDO2CTRL	= 0x3c,
	MAX8997_REG_LDO3CTRL	= 0x3d,
	MAX8997_REG_LDO4CTRL	= 0x3e,
	MAX8997_REG_LDO5CTRL	= 0x3f,
	MAX8997_REG_LDO6CTRL	= 0x40,
	MAX8997_REG_LDO7CTRL	= 0x41,
	MAX8997_REG_LDO8CTRL	= 0x42,
	MAX8997_REG_LDO9CTRL	= 0x43,
	MAX8997_REG_LDO10CTRL	= 0x44,
	MAX8997_REG_LDO11CTRL	= 0x45,
	MAX8997_REG_LDO12CTRL	= 0x46,
	MAX8997_REG_LDO13CTRL	= 0x47,
	MAX8997_REG_LDO14CTRL	= 0x48,
	MAX8997_REG_LDO15CTRL	= 0x49,
	MAX8997_REG_LDO16CTRL	= 0x4a,
	MAX8997_REG_LDO17CTRL	= 0x4b,
	MAX8997_REG_LDO18CTRL	= 0x4c,
	MAX8997_REG_LDO21CTRL	= 0x4d,

MAX8997_REG_MBCCTRL1	= 0x50,
	MAX8997_REG_MBCCTRL2	= 0x51,
	MAX8997_REG_MBCCTRL3	= 0x52,
	MAX8997_REG_MBCCTRL4	= 0x53,
	MAX8997_REG_MBCCTRL5	= 0x54,
	MAX8997_REG_MBCCTRL6	= 0x55,
	MAX8997_REG_OTPCGHCVS	= 0x56,

MAX8997_REG_SAFEOUTCTRL	= 0x5a,

MAX8997_REG_LBCNFG1	= 0x5e,
	MAX8997_REG_LBCNFG2	= 0x5f,
	MAX8997_REG_BBCCTRL	= 0x60,

MAX8997_REG_FLASH1_CUR	= 0x63, /* 0x63 ~ 0x6e for FLASH */
	MAX8997_REG_FLASH2_CUR	= 0x64,
	MAX8997_REG_MOVIE_CUR	= 0x65,
	MAX8997_REG_GSMB_CUR	= 0x66,
	MAX8997_REG_BOOST_CNTL	= 0x67,
	MAX8997_REG_LEN_CNTL	= 0x68,
	MAX8997_REG_FLASH_CNTL	= 0x69,
	MAX8997_REG_WDT_CNTL	= 0x6a,
	MAX8997_REG_MAXFLASH1	= 0x6b,
	MAX8997_REG_MAXFLASH2	= 0x6c,
	MAX8997_REG_FLASHSTATUS	= 0x6d,
	MAX8997_REG_FLASHSTATUSMASK	= 0x6e,

MAX8997_REG_GPIOCNTL1	= 0x70,
	MAX8997_REG_GPIOCNTL2	= 0x71,
	MAX8997_REG_GPIOCNTL3	= 0x72,
	MAX8997_REG_GPIOCNTL4	= 0x73,
	MAX8997_REG_GPIOCNTL5	= 0x74,
	MAX8997_REG_GPIOCNTL6	= 0x75,
	MAX8997_REG_GPIOCNTL7	= 0x76,
	MAX8997_REG_GPIOCNTL8	= 0x77,
	MAX8997_REG_GPIOCNTL9	= 0x78,
	MAX8997_REG_GPIOCNTL10	= 0x79,
	MAX8997_REG_GPIOCNTL11	= 0x7a,
	MAX8997_REG_GPIOCNTL12	= 0x7b,

MAX8997_REG_LDO1CONFIG	= 0x80,
	MAX8997_REG_LDO2CONFIG	= 0x81,
	MAX8997_REG_LDO3CONFIG	= 0x82,
	MAX8997_REG_LDO4CONFIG	= 0x83,
	MAX8997_REG_LDO5CONFIG	= 0x84,
	MAX8997_REG_LDO6CONFIG	= 0x85,
	MAX8997_REG_LDO7CONFIG	= 0x86,
	MAX8997_REG_LDO8CONFIG	= 0x87,
	MAX8997_REG_LDO9CONFIG	= 0x88,
	MAX8997_REG_LDO10CONFIG	= 0x89,
	MAX8997_REG_LDO11CONFIG	= 0x8a,
	MAX8997_REG_LDO12CONFIG	= 0x8b,
	MAX8997_REG_LDO13CONFIG	= 0x8c,
	MAX8997_REG_LDO14CONFIG	= 0x8d,
	MAX8997_REG_LDO15CONFIG	= 0x8e,
	MAX8997_REG_LDO16CONFIG	= 0x8f,
	MAX8997_REG_LDO17CONFIG	= 0x90,
	MAX8997_REG_LDO18CONFIG	= 0x91,
	MAX8997_REG_LDO21CONFIG	= 0x92,

MAX8997_REG_DVSOKTIMER1	= 0x97,
	MAX8997_REG_DVSOKTIMER2	= 0x98,
	MAX8997_REG_DVSOKTIMER4	= 0x99,
	MAX8997_REG_DVSOKTIMER5	= 0x9a,

MAX8997_REG_PMIC_END	= 0x9b,
};

enum max8997_muic_reg {
	MAX8997_MUIC_REG_ID		= 0x0,
	MAX8997_MUIC_REG_INT1		= 0x1,
	MAX8997_MUIC_REG_INT2		= 0x2,
	MAX8997_MUIC_REG_INT3		= 0x3,
	MAX8997_MUIC_REG_STATUS1	= 0x4,
	MAX8997_MUIC_REG_STATUS2	= 0x5,
	MAX8997_MUIC_REG_STATUS3	= 0x6,
	MAX8997_MUIC_REG_INTMASK1	= 0x7,
	MAX8997_MUIC_REG_INTMASK2	= 0x8,
	MAX8997_MUIC_REG_INTMASK3	= 0x9,
	MAX8997_MUIC_REG_CDETCTRL	= 0xa,

MAX8997_MUIC_REG_CONTROL1	= 0xc,
	MAX8997_MUIC_REG_CONTROL2	= 0xd,
	MAX8997_MUIC_REG_CONTROL3	= 0xe,

MAX8997_MUIC_REG_END		= 0xf,
};

/* MAX8997-MUIC STATUS1 register */
#define STATUS1_ADC_SHIFT		0
#define STATUS1_ADCLOW_SHIFT		5
#define STATUS1_ADCERR_SHIFT		6
#define STATUS1_ADC_MASK		(0x1f << STATUS1_ADC_SHIFT)
#define STATUS1_ADCLOW_MASK		(0x1 << STATUS1_ADCLOW_SHIFT)
#define STATUS1_ADCERR_MASK		(0x1 << STATUS1_ADCERR_SHIFT)

/* MAX8997-MUIC STATUS2 register */
#define STATUS2_CHGTYP_SHIFT		0
#define STATUS2_CHGDETRUN_SHIFT		3
#define STATUS2_DCDTMR_SHIFT		4
#define STATUS2_DBCHG_SHIFT		5
#define STATUS2_VBVOLT_SHIFT		6
#define STATUS2_CHGTYP_MASK		(0x7 << STATUS2_CHGTYP_SHIFT)
#define STATUS2_CHGDETRUN_MASK		(0x1 << STATUS2_CHGDETRUN_SHIFT)
#define STATUS2_DCDTMR_MASK		(0x1 << STATUS2_DCDTMR_SHIFT)
#define STATUS2_DBCHG_MASK		(0x1 << STATUS2_DBCHG_SHIFT)
#define STATUS2_VBVOLT_MASK		(0x1 << STATUS2_VBVOLT_SHIFT)

/* MAX8997-MUIC STATUS3 register */
#define STATUS3_OVP_SHIFT		2
#define STATUS3_OVP_MASK		(0x1 << STATUS3_OVP_SHIFT)

/* MAX8997-MUIC CONTROL1 register */
#define COMN1SW_SHIFT			0
#define COMP2SW_SHIFT			3
#define COMN1SW_MASK			(0x7 << COMN1SW_SHIFT)
#define COMP2SW_MASK			(0x7 << COMP2SW_SHIFT)
#define COMP_SW_MASK		(COMP2SW_MASK | COMN1SW_MASK)

#define CONTROL1_SW_USB			((1 << COMP2SW_SHIFT) \
						| (1 << COMN1SW_SHIFT))
#define CONTROL1_SW_AUDIO		((2 << COMP2SW_SHIFT) \
						| (2 << COMN1SW_SHIFT))
#define CONTROL1_SW_UART		((3 << COMP2SW_SHIFT) \
						| (3 << COMN1SW_SHIFT))
#define CONTROL1_SW_OPEN		((0 << COMP2SW_SHIFT) \
						| (0 << COMN1SW_SHIFT))

#define CONTROL2_LOWPWR_SHIFT		(0)
#define CONTROL2_ADCEN_SHIFT		(1)
#define CONTROL2_CPEN_SHIFT		(2)
#define CONTROL2_SFOUTASRT_SHIFT	(3)
#define CONTROL2_SFOUTORD_SHIFT		(4)
#define CONTROL2_ACCDET_SHIFT		(5)
#define CONTROL2_USBCPINT_SHIFT		(6)
#define CONTROL2_RCPS_SHIFT		(7)
#define CONTROL2_LOWPWR_MASK		(0x1 << CONTROL2_LOWPWR_SHIFT)
#define CONTROL2_ADCEN_MASK		(0x1 << CONTROL2_ADCEN_SHIFT)
#define CONTROL2_CPEN_MASK		(0x1 << CONTROL2_CPEN_SHIFT)
#define CONTROL2_SFOUTASRT_MASK		(0x1 << CONTROL2_SFOUTASRT_SHIFT)
#define CONTROL2_SFOUTORD_MASK		(0x1 << CONTROL2_SFOUTORD_SHIFT)
#define CONTROL2_ACCDET_MASK		(0x1 << CONTROL2_ACCDET_SHIFT)
#define CONTROL2_USBCPINT_MASK		(0x1 << CONTROL2_USBCPINT_SHIFT)
#define CONTROL2_RCPS_MASK		(0x1 << CONTROL2_RCPS_SHIFT)

#define CONTROL3_JIGSET_SHIFT		(0)
#define CONTROL3_BTLDSET_SHIFT		(2)
#define CONTROL3_ADCDBSET_SHIFT		(4)
#define CONTROL3_JIGSET_MASK		(0x3 << CONTROL3_JIGSET_SHIFT)
#define CONTROL3_BTLDSET_MASK		(0x3 << CONTROL3_BTLDSET_SHIFT)
#define CONTROL3_ADCDBSET_MASK		(0x3 << CONTROL3_ADCDBSET_SHIFT)

enum max8997_haptic_reg {
	MAX8997_HAPTIC_REG_GENERAL	= 0x00,
	MAX8997_HAPTIC_REG_CONF1	= 0x01,
	MAX8997_HAPTIC_REG_CONF2	= 0x02,
	MAX8997_HAPTIC_REG_DRVCONF	= 0x03,
	MAX8997_HAPTIC_REG_CYCLECONF1	= 0x04,
	MAX8997_HAPTIC_REG_CYCLECONF2	= 0x05,
	MAX8997_HAPTIC_REG_SIGCONF1	= 0x06,
	MAX8997_HAPTIC_REG_SIGCONF2	= 0x07,
	MAX8997_HAPTIC_REG_SIGCONF3	= 0x08,
	MAX8997_HAPTIC_REG_SIGCONF4	= 0x09,
	MAX8997_HAPTIC_REG_SIGDC1	= 0x0a,
	MAX8997_HAPTIC_REG_SIGDC2	= 0x0b,
	MAX8997_HAPTIC_REG_SIGPWMDC1	= 0x0c,
	MAX8997_HAPTIC_REG_SIGPWMDC2	= 0x0d,
	MAX8997_HAPTIC_REG_SIGPWMDC3	= 0x0e,
	MAX8997_HAPTIC_REG_SIGPWMDC4	= 0x0f,
	MAX8997_HAPTIC_REG_MTR_REV	= 0x10,

MAX8997_HAPTIC_REG_END		= 0x11,
};

/* slave addr = 0x0c: using "2nd part" of rev4 datasheet */
enum max8997_rtc_reg {
	MAX8997_RTC_CTRLMASK		= 0x02,
	MAX8997_RTC_CTRL		= 0x03,
	MAX8997_RTC_UPDATE1		= 0x04,
	MAX8997_RTC_UPDATE2		= 0x05,
	MAX8997_RTC_WTSR_SMPL		= 0x06,

MAX8997_RTC_SEC			= 0x10,
	MAX8997_RTC_MIN			= 0x11,
	MAX8997_RTC_HOUR		= 0x12,
	MAX8997_RTC_DAY_OF_WEEK		= 0x13,
	MAX8997_RTC_MONTH		= 0x14,
	MAX8997_RTC_YEAR		= 0x15,
	MAX8997_RTC_DAY_OF_MONTH	= 0x16,
	MAX8997_RTC_ALARM1_SEC		= 0x17,
	MAX8997_RTC_ALARM1_MIN		= 0x18,
	MAX8997_RTC_ALARM1_HOUR		= 0x19,
	MAX8997_RTC_ALARM1_DAY_OF_WEEK	= 0x1a,
	MAX8997_RTC_ALARM1_MONTH	= 0x1b,
	MAX8997_RTC_ALARM1_YEAR		= 0x1c,
	MAX8997_RTC_ALARM1_DAY_OF_MONTH	= 0x1d,
	MAX8997_RTC_ALARM2_SEC		= 0x1e,
	MAX8997_RTC_ALARM2_MIN		= 0x1f,
	MAX8997_RTC_ALARM2_HOUR		= 0x20,
	MAX8997_RTC_ALARM2_DAY_OF_WEEK	= 0x21,
	MAX8997_RTC_ALARM2_MONTH	= 0x22,
	MAX8997_RTC_ALARM2_YEAR		= 0x23,
	MAX8997_RTC_ALARM2_DAY_OF_MONTH	= 0x24,
};

enum max8997_irq_source {
	PMIC_INT1 = 0,
	PMIC_INT2,
	PMIC_INT3,
	PMIC_INT4,

FUEL_GAUGE, /* Ignored (MAX17042 driver handles) */

MUIC_INT1,
	MUIC_INT2,
	MUIC_INT3,

GPIO_LOW, /* Not implemented */
	GPIO_HI, /* Not implemented */

FLASH_STATUS, /* Not implemented */

MAX8997_IRQ_GROUP_NR,
};

enum max8997_irq {
	MAX8997_PMICIRQ_PWRONR,
	MAX8997_PMICIRQ_PWRONF,
	MAX8997_PMICIRQ_PWRON1SEC,
	MAX8997_PMICIRQ_JIGONR,
	MAX8997_PMICIRQ_JIGONF,
	MAX8997_PMICIRQ_LOWBAT2,
	MAX8997_PMICIRQ_LOWBAT1,

MAX8997_PMICIRQ_JIGR,
	MAX8997_PMICIRQ_JIGF,
	MAX8997_PMICIRQ_MR,
	MAX8997_PMICIRQ_DVS1OK,
	MAX8997_PMICIRQ_DVS2OK,
	MAX8997_PMICIRQ_DVS3OK,
	MAX8997_PMICIRQ_DVS4OK,

MAX8997_PMICIRQ_CHGINS,
	MAX8997_PMICIRQ_CHGRM,
	MAX8997_PMICIRQ_DCINOVP,
	MAX8997_PMICIRQ_TOPOFFR,
	MAX8997_PMICIRQ_CHGRSTF,
	MAX8997_PMICIRQ_MBCHGTMEXPD,

MAX8997_PMICIRQ_RTC60S,
	MAX8997_PMICIRQ_RTCA1,
	MAX8997_PMICIRQ_RTCA2,
	MAX8997_PMICIRQ_SMPL_INT,
	MAX8997_PMICIRQ_RTC1S,
	MAX8997_PMICIRQ_WTSR,

MAX8997_MUICIRQ_ADCError,
	MAX8997_MUICIRQ_ADCLow,
	MAX8997_MUICIRQ_ADC,

MAX8997_MUICIRQ_VBVolt,
	MAX8997_MUICIRQ_DBChg,
	MAX8997_MUICIRQ_DCDTmr,
	MAX8997_MUICIRQ_ChgDetRun,
	MAX8997_MUICIRQ_ChgTyp,

MAX8997_MUICIRQ_OVP,

MAX8997_IRQ_NR,
};

#define MAX8997_NUM_GPIO	12
struct max8997_dev {
	struct device *dev;
	struct max8997_platform_data *pdata;
	struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
	struct i2c_client *rtc; /* slave addr 0x0c */
	struct i2c_client *haptic; /* slave addr 0x90 */
	struct i2c_client *muic; /* slave addr 0x4a */
	struct mutex iolock;

unsigned long type;
	struct platform_device *battery; /* battery control (not fuel gauge) */

int irq;
	int ono;
	struct irq_domain *irq_domain;
	struct mutex irqlock;
	int irq_masks_cur[MAX8997_IRQ_GROUP_NR];
	int irq_masks_cache[MAX8997_IRQ_GROUP_NR];

/* For hibernation */
	u8 reg_dump[MAX8997_REG_PMIC_END + MAX8997_MUIC_REG_END +
		MAX8997_HAPTIC_REG_END];

bool gpio_status[MAX8997_NUM_GPIO];
};

enum max8997_types {
	TYPE_MAX8997,
	TYPE_MAX8966,
};

extern int max8997_irq_init(struct max8997_dev *max8997);
extern void max8997_irq_exit(struct max8997_dev *max8997);
extern int max8997_irq_resume(struct max8997_dev *max8997);

extern int max8997_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
extern int max8997_bulk_read(struct i2c_client *i2c, u8 reg, int count,
				u8 *buf);
extern int max8997_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
extern int max8997_bulk_write(struct i2c_client *i2c, u8 reg, int count,
				u8 *buf);
extern int max8997_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);

#define MAX8997_GPIO_INT_BOTH	(0x3 << 4)
#define MAX8997_GPIO_INT_RISE	(0x2 << 4)
#define MAX8997_GPIO_INT_FALL	(0x1 << 4)

#define MAX8997_GPIO_INT_MASK	(0x3 << 4)
#define MAX8997_GPIO_DATA_MASK	(0x1 << 2)
#endif /*  __LINUX_MFD_MAX8997_PRIV_H */

cmd: