FM / mlx5

/usr/src/linux-headers-5.15.0-181/include/linux/mlx5/

/usr/src/linux-headers-5.15.0-181/include/linux/mlx5

Name	Size	Mode	Actions
accel.h	4337	0644	edit dl rm
cq.h	5786	0644	edit dl rm
device.h	37932	0644	edit dl rm
doorbell.h	2271	0644	edit dl rm
driver.h	33453	0644	edit dl rm
eq.h	1807	0644	edit dl rm
eswitch.h	5933	0644	edit dl rm
fs.h	8176	0644	edit dl rm
fs_helpers.h	4423	0644	edit dl rm
mlx5_ifc.h	274553	0644	edit dl rm
mlx5_ifc_fpga.h	14453	0644	edit dl rm
mlx5_ifc_vdpa.h	3914	0644	edit dl rm
mpfs.h	540	0644	edit dl rm
port.h	7732	0644	edit dl rm
qp.h	12251	0644	edit dl rm
rsc_dump.h	1288	0644	edit dl rm
transobj.h	3567	0644	edit dl rm
vport.h	5622	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/include/linux/mlx5/eq.h (1807B)

/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/* Copyright (c) 2018 Mellanox Technologies. */

#ifndef MLX5_CORE_EQ_H
#define MLX5_CORE_EQ_H

#define MLX5_IRQ_VEC_COMP_BASE 1
#define MLX5_NUM_CMD_EQE   (32)
#define MLX5_NUM_ASYNC_EQE (0x1000)
#define MLX5_NUM_SPARE_EQE (0x80)

struct mlx5_eq;
struct mlx5_core_dev;

struct mlx5_eq_param {
	u8             irq_index;
	int            nent;
	u64            mask[4];
	cpumask_var_t  affinity;
};

struct mlx5_eq *
mlx5_eq_create_generic(struct mlx5_core_dev *dev, struct mlx5_eq_param *param);
int
mlx5_eq_destroy_generic(struct mlx5_core_dev *dev, struct mlx5_eq *eq);
int mlx5_eq_enable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
		   struct notifier_block *nb);
void mlx5_eq_disable(struct mlx5_core_dev *dev, struct mlx5_eq *eq,
		     struct notifier_block *nb);

struct mlx5_eqe *mlx5_eq_get_eqe(struct mlx5_eq *eq, u32 cc);
void mlx5_eq_update_ci(struct mlx5_eq *eq, u32 cc, bool arm);

/* The HCA will think the queue has overflowed if we
 * don't tell it we've been processing events.  We
 * create EQs with MLX5_NUM_SPARE_EQE extra entries,
 * so we must update our consumer index at
 * least that often.
 *
 * mlx5_eq_update_cc must be called on every EQE @EQ irq handler
 */
static inline u32 mlx5_eq_update_cc(struct mlx5_eq *eq, u32 cc)
{
	if (unlikely(cc >= MLX5_NUM_SPARE_EQE)) {
		mlx5_eq_update_ci(eq, cc, 0);
		cc = 0;
	}
	return cc;
}

struct mlx5_nb {
	struct notifier_block nb;
	u8 event_type;
};

#define mlx5_nb_cof(ptr, type, member) \
	(container_of(container_of(ptr, struct mlx5_nb, nb), type, member))

#define MLX5_NB_INIT(name, handler, event) do {              \
	(name)->nb.notifier_call = handler;                  \
	(name)->event_type = MLX5_EVENT_TYPE_##event;        \
} while (0)

#endif /* MLX5_CORE_EQ_H */

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