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/usr/src/linux-headers-5.15.0-181/include/linux/platform_data/

/usr/src/linux-headers-5.15.0-181/include/linux/platform_data

Name	Size	Mode	Actions
gpio/	-	0755	rm
media/	-	0755	rm
txx9/	-	0755	rm
x86/	-	0755	rm
ad5449.h	1196	0644	edit dl rm
ad5755.h	2813	0644	edit dl rm
ad5761.h	1266	0644	edit dl rm
ad7266.h	1367	0644	edit dl rm
ad7791.h	530	0644	edit dl rm
ad7793.h	3842	0644	edit dl rm
ad7887.h	573	0644	edit dl rm
adau17x1.h	3597	0644	edit dl rm
adp5588.h	6707	0644	edit dl rm
adp8860.h	4720	0644	edit dl rm
adp8870.h	4624	0644	edit dl rm
ads7828.h	690	0644	edit dl rm
ams-delta-fiq.h	1657	0644	edit dl rm
apds990x.h	1876	0644	edit dl rm
arm-ux500-pm.h	566	0644	edit dl rm
asoc-imx-ssi.h	686	0644	edit dl rm
asoc-kirkwood.h	145	0644	edit dl rm
asoc-palm27x.h	152	0644	edit dl rm
asoc-s3c.h	1355	0644	edit dl rm
asoc-s3c24xx_simtec.h	746	0644	edit dl rm
asoc-ti-mcbsp.h	820	0644	edit dl rm
asoc-ux500-msp.h	433	0644	edit dl rm
ata-pxa.h	392	0644	edit dl rm
ata-samsung_cf.h	816	0644	edit dl rm
atmel.h	374	0644	edit dl rm
b53.h	1160	0644	edit dl rm
bcmgenet.h	402	0644	edit dl rm
bd6107.h	237	0644	edit dl rm
bh1770glc.h	1206	0644	edit dl rm
brcmfmac.h	6791	0644	edit dl rm
clk-da8xx-cfgchip.h	504	0644	edit dl rm
clk-davinci-pll.h	465	0644	edit dl rm
clk-fch.h	286	0644	edit dl rm
clk-s3c2410.h	518	0644	edit dl rm
cpuidle-exynos.h	361	0644	edit dl rm
cros_ec_chardev.h	1101	0644	edit dl rm
cros_ec_commands.h	182366	0644	edit dl rm
cros_ec_proto.h	8950	0644	edit dl rm
cros_ec_sensorhub.h	6259	0644	edit dl rm
cros_usbpd_notify.h	436	0644	edit dl rm
crypto-ux500.h	526	0644	edit dl rm
cyttsp4.h	1627	0644	edit dl rm
davinci-cpufreq.h	428	0644	edit dl rm
davinci_asp.h	3351	0644	edit dl rm
dma-dw.h	2633	0644	edit dl rm
dma-ep93xx.h	2746	0644	edit dl rm
dma-hsu.h	332	0644	edit dl rm
dma-imx.h	1875	0644	edit dl rm
dma-iop32x.h	3347	0644	edit dl rm
dma-mcf-edma.h	1147	0644	edit dl rm
dma-mmp_tdma.h	647	0644	edit dl rm
dma-mv_xor.h	375	0644	edit dl rm
dma-s3c24xx.h	1331	0644	edit dl rm
dma-ste-dma40.h	6176	0644	edit dl rm
dmtimer-omap.h	1982	0644	edit dl rm
ds620.h	430	0644	edit dl rm
dsa.h	1653	0644	edit dl rm
edma.h	2577	0644	edit dl rm
elm.h	1322	0644	edit dl rm
emif_plat.h	4010	0644	edit dl rm
eth-ep93xx.h	207	0644	edit dl rm
eth_ixp4xx.h	541	0644	edit dl rm
fb-s3c2410.h	2802	0644	edit dl rm
g762.h	698	0644	edit dl rm
gpio-ath79.h	330	0644	edit dl rm
gpio-davinci.h	854	0644	edit dl rm
gpio-htc-egpio.h	1660	0644	edit dl rm
gpio-omap.h	5776	0644	edit dl rm
gpio_backlight.h	253	0644	edit dl rm
gpmc-omap.h	5659	0644	edit dl rm
gsc_hwmon.h	1098	0644	edit dl rm
hirschmann-hellcreek.h	719	0644	edit dl rm
hsmmc-omap.h	2144	0644	edit dl rm
hwmon-s3c.h	1212	0644	edit dl rm
i2c-davinci.h	835	0644	edit dl rm
i2c-gpio.h	1072	0644	edit dl rm
i2c-imx.h	420	0644	edit dl rm
i2c-mux-gpio.h	955	0644	edit dl rm
i2c-mux-reg.h	1235	0644	edit dl rm
i2c-ocores.h	644	0644	edit dl rm
i2c-omap.h	1241	0644	edit dl rm
i2c-pca-platform.h	291	0644	edit dl rm
i2c-pxa.h	354	0644	edit dl rm
i2c-s3c2410.h	2929	0644	edit dl rm
i2c-xiic.h	853	0644	edit dl rm
ina2xx.h	412	0644	edit dl rm
intel-mid_wdt.h	456	0644	edit dl rm
invensense_mpu6050.h	865	0644	edit dl rm
iommu-omap.h	618	0644	edit dl rm
irda-pxaficp.h	704	0644	edit dl rm
irda-sa11x0.h	411	0644	edit dl rm
isl9305.h	487	0644	edit dl rm
itco_wdt.h	588	0644	edit dl rm
keyboard-pxa930_rotary.h	642	0644	edit dl rm
keyboard-spear.h	3897	0644	edit dl rm
keypad-ep93xx.h	1030	0644	edit dl rm
keypad-nomadik-ske.h	1196	0644	edit dl rm
keypad-omap.h	1332	0644	edit dl rm
keypad-pxa27x.h	2213	0644	edit dl rm
keyscan-davinci.h	517	0644	edit dl rm
lcd-mipid.h	586	0644	edit dl rm
leds-lm355x.h	1454	0644	edit dl rm
leds-lm3642.h	818	0644	edit dl rm
leds-lp55xx.h	2171	0644	edit dl rm
leds-omap.h	352	0644	edit dl rm
leds-s3c24xx.h	345	0644	edit dl rm
lm3630a_bl.h	1671	0644	edit dl rm
lm3639_bl.h	1401	0644	edit dl rm
lm8323.h	746	0644	edit dl rm
lp855x.h	4055	0644	edit dl rm
lp8727.h	1477	0644	edit dl rm
lp8755.h	1505	0644	edit dl rm
ltc4245.h	331	0644	edit dl rm
lv5207lp.h	273	0644	edit dl rm
max197.h	615	0644	edit dl rm
max732x.h	573	0644	edit dl rm
max3421-hcd.h	808	0644	edit dl rm
max6639.h	433	0644	edit dl rm
max6697.h	912	0644	edit dl rm
mcs.h	693	0644	edit dl rm
mdio-bcm-unimac.h	275	0644	edit dl rm
mdio-gpio.h	273	0644	edit dl rm
mfd-mcp-sa11x0.h	272	0644	edit dl rm
microchip-ksz.h	961	0644	edit dl rm
mlxcpld.h	885	0644	edit dl rm
mlxreg.h	4194	0644	edit dl rm
mmc-davinci.h	736	0644	edit dl rm
mmc-esdhc-mcf.h	447	0644	edit dl rm
mmc-mxcmmc.h	1099	0644	edit dl rm
mmc-omap.h	3381	0644	edit dl rm
mmc-pxamci.h	809	0644	edit dl rm
mmc-s3cmci.h	2004	0644	edit dl rm
mmc-sdhci-s3c.h	2278	0644	edit dl rm
mmp_audio.h	340	0644	edit dl rm
mmp_dma.h	350	0644	edit dl rm
mouse-pxa930_trkball.h	226	0644	edit dl rm
mtd-davinci-aemif.h	715	0644	edit dl rm
mtd-davinci.h	2447	0644	edit dl rm
mtd-nand-omap2.h	2049	0644	edit dl rm
mtd-nand-pxa3xx.h	812	0644	edit dl rm
mtd-nand-s3c2410.h	2101	0644	edit dl rm
mtd-orion_nand.h	520	0644	edit dl rm
mv88e6xxx.h	416	0644	edit dl rm
mv_usb.h	900	0644	edit dl rm
net-cw1200.h	2764	0644	edit dl rm
nfcmrvl.h	1262	0644	edit dl rm
ntc_thermistor.h	1292	0644	edit dl rm
omap-twl4030.h	1067	0644	edit dl rm
omap-wd-timer.h	901	0644	edit dl rm
omap1_bl.h	229	0644	edit dl rm
omapdss.h	897	0644	edit dl rm
pata_ixp4xx_cf.h	466	0644	edit dl rm
pca953x.h	690	0644	edit dl rm
pcf857x.h	1825	0644	edit dl rm
pcmcia-pxa2xx_viper.h	200	0644	edit dl rm
phy-da8xx-usb.h	474	0644	edit dl rm
pinctrl-single.h	425	0644	edit dl rm
pm33xx.h	2305	0644	edit dl rm
pxa2xx_udc.h	983	0644	edit dl rm
pxa_sdhci.h	1482	0644	edit dl rm
regulator-haptic.h	691	0644	edit dl rm
rtc-ds2404.h	467	0644	edit dl rm
rtc-v3020.h	1057	0644	edit dl rm
s3c-hsotg.h	1064	0644	edit dl rm
s3c-hsudc.h	1069	0644	edit dl rm
sa11x0-serial.h	874	0644	edit dl rm
sc18is602.h	401	0644	edit dl rm
sdhci-pic32.h	360	0644	edit dl rm
serial-omap.h	1024	0644	edit dl rm
serial-sccnxp.h	1938	0644	edit dl rm
sgi-w1.h	222	0644	edit dl rm
shmob_drm.h	2601	0644	edit dl rm
sht3x.h	342	0644	edit dl rm
shtc1.h	303	0644	edit dl rm
si5351.h	3634	0644	edit dl rm
simplefb.h	2181	0644	edit dl rm
spi-clps711x.h	421	0644	edit dl rm
spi-davinci.h	2308	0644	edit dl rm
spi-ep93xx.h	311	0644	edit dl rm
spi-mt65xx.h	361	0644	edit dl rm
spi-omap2-mcspi.h	475	0644	edit dl rm
spi-s3c64xx.h	2057	0644	edit dl rm
ssm2518.h	501	0644	edit dl rm
st33zp24.h	367	0644	edit dl rm
st_sensors_pdata.h	966	0644	edit dl rm
syscon.h	163	0644	edit dl rm
tda9950.h	282	0644	edit dl rm
ti-aemif.h	1108	0644	edit dl rm
ti-prm.h	524	0644	edit dl rm
ti-sysc.h	5067	0644	edit dl rm
timer-ixp4xx.h	244	0644	edit dl rm
touchscreen-s3c2410.h	595	0644	edit dl rm
tsc2007.h	655	0644	edit dl rm
tsl2563.h	180	0644	edit dl rm
tsl2772.h	3819	0644	edit dl rm
uio_dmem_genirq.h	800	0644	edit dl rm
uio_pruss.h	828	0644	edit dl rm
usb-davinci.h	596	0644	edit dl rm
usb-ehci-orion.h	440	0644	edit dl rm
usb-musb-ux500.h	558	0644	edit dl rm
usb-ohci-pxa27x.h	925	0644	edit dl rm
usb-ohci-s3c2410.h	941	0644	edit dl rm
usb-omap.h	2881	0644	edit dl rm
usb-omap1.h	1531	0644	edit dl rm
usb-pxa3xx-ulpi.h	675	0644	edit dl rm
usb-s3c2410_udc.h	1069	0644	edit dl rm
usb3503.h	409	0644	edit dl rm
ux500_wdt.h	313	0644	edit dl rm
video-ep93xx.h	1525	0644	edit dl rm
video-imxfb.h	1796	0644	edit dl rm
video-mx3fb.h	1427	0644	edit dl rm
video-pxafb.h	5354	0644	edit dl rm
video_s3c.h	1756	0644	edit dl rm
voltage-omap.h	1180	0644	edit dl rm
wan_ixp4xx_hss.h	465	0644	edit dl rm
wilco-ec.h	7076	0644	edit dl rm
wiznet.h	511	0644	edit dl rm
wkup_m3.h	542	0644	edit dl rm
xilinx-ll-temac.h	1320	0644	edit dl rm
xtalk-bridge.h	437	0644	edit dl rm
zforce_ts.h	313	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-181/include/linux/platform_data/gpmc-omap.h (5659B)

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * OMAP GPMC Platform data
 *
 * Copyright (C) 2014 Texas Instruments, Inc. - https://www.ti.com
 *	Roger Quadros <rogerq@ti.com>
 */

#ifndef _GPMC_OMAP_H_
#define _GPMC_OMAP_H_

/* Maximum Number of Chip Selects */
#define GPMC_CS_NUM		8

/* bool type time settings */
struct gpmc_bool_timings {
	bool cycle2cyclediffcsen;
	bool cycle2cyclesamecsen;
	bool we_extra_delay;
	bool oe_extra_delay;
	bool adv_extra_delay;
	bool cs_extra_delay;
	bool time_para_granularity;
};

/*
 * Note that all values in this struct are in nanoseconds except sync_clk
 * (which is in picoseconds), while the register values are in gpmc_fck cycles.
 */
struct gpmc_timings {
	/* Minimum clock period for synchronous mode (in picoseconds) */
	u32 sync_clk;

/* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */
	u32 cs_on;		/* Assertion time */
	u32 cs_rd_off;		/* Read deassertion time */
	u32 cs_wr_off;		/* Write deassertion time */

/* ADV signal timings corresponding to GPMC_CONFIG3 */
	u32 adv_on;		/* Assertion time */
	u32 adv_rd_off;		/* Read deassertion time */
	u32 adv_wr_off;		/* Write deassertion time */
	u32 adv_aad_mux_on;	/* ADV assertion time for AAD */
	u32 adv_aad_mux_rd_off;	/* ADV read deassertion time for AAD */
	u32 adv_aad_mux_wr_off;	/* ADV write deassertion time for AAD */

/* WE signals timings corresponding to GPMC_CONFIG4 */
	u32 we_on;		/* WE assertion time */
	u32 we_off;		/* WE deassertion time */

/* OE signals timings corresponding to GPMC_CONFIG4 */
	u32 oe_on;		/* OE assertion time */
	u32 oe_off;		/* OE deassertion time */
	u32 oe_aad_mux_on;	/* OE assertion time for AAD */
	u32 oe_aad_mux_off;	/* OE deassertion time for AAD */

/* Access time and cycle time timings corresponding to GPMC_CONFIG5 */
	u32 page_burst_access;	/* Multiple access word delay */
	u32 access;		/* Start-cycle to first data valid delay */
	u32 rd_cycle;		/* Total read cycle time */
	u32 wr_cycle;		/* Total write cycle time */

u32 bus_turnaround;
	u32 cycle2cycle_delay;

u32 wait_monitoring;
	u32 clk_activation;

/* The following are only on OMAP3430 */
	u32 wr_access;		/* WRACCESSTIME */
	u32 wr_data_mux_bus;	/* WRDATAONADMUXBUS */

struct gpmc_bool_timings bool_timings;
};

/* Device timings in picoseconds */
struct gpmc_device_timings {
	u32 t_ceasu;	/* address setup to CS valid */
	u32 t_avdasu;	/* address setup to ADV valid */
	/* XXX: try to combine t_avdp_r & t_avdp_w. Issue is
	 * of tusb using these timings even for sync whilst
	 * ideally for adv_rd/(wr)_off it should have considered
	 * t_avdh instead. This indirectly necessitates r/w
	 * variations of t_avdp as it is possible to have one
	 * sync & other async
	 */
	u32 t_avdp_r;	/* ADV low time (what about t_cer ?) */
	u32 t_avdp_w;
	u32 t_aavdh;	/* address hold time */
	u32 t_oeasu;	/* address setup to OE valid */
	u32 t_aa;	/* access time from ADV assertion */
	u32 t_iaa;	/* initial access time */
	u32 t_oe;	/* access time from OE assertion */
	u32 t_ce;	/* access time from CS asertion */
	u32 t_rd_cycle;	/* read cycle time */
	u32 t_cez_r;	/* read CS deassertion to high Z */
	u32 t_cez_w;	/* write CS deassertion to high Z */
	u32 t_oez;	/* OE deassertion to high Z */
	u32 t_weasu;	/* address setup to WE valid */
	u32 t_wpl;	/* write assertion time */
	u32 t_wph;	/* write deassertion time */
	u32 t_wr_cycle;	/* write cycle time */

u32 clk;
	u32 t_bacc;	/* burst access valid clock to output delay */
	u32 t_ces;	/* CS setup time to clk */
	u32 t_avds;	/* ADV setup time to clk */
	u32 t_avdh;	/* ADV hold time from clk */
	u32 t_ach;	/* address hold time from clk */
	u32 t_rdyo;	/* clk to ready valid */

u32 t_ce_rdyz;	/* XXX: description ?, or use t_cez instead */
	u32 t_ce_avd;	/* CS on to ADV on delay */

/* XXX: check the possibility of combining
	 * cyc_aavhd_oe & cyc_aavdh_we
	 */
	u8 cyc_aavdh_oe;/* read address hold time in cycles */
	u8 cyc_aavdh_we;/* write address hold time in cycles */
	u8 cyc_oe;	/* access time from OE assertion in cycles */
	u8 cyc_wpl;	/* write deassertion time in cycles */
	u32 cyc_iaa;	/* initial access time in cycles */

/* extra delays */
	bool ce_xdelay;
	bool avd_xdelay;
	bool oe_xdelay;
	bool we_xdelay;
};

#define GPMC_BURST_4			4	/* 4 word burst */
#define GPMC_BURST_8			8	/* 8 word burst */
#define GPMC_BURST_16			16	/* 16 word burst */
#define GPMC_DEVWIDTH_8BIT		1	/* 8-bit device width */
#define GPMC_DEVWIDTH_16BIT		2	/* 16-bit device width */
#define GPMC_MUX_AAD			1	/* Addr-Addr-Data multiplex */
#define GPMC_MUX_AD			2	/* Addr-Data multiplex */

struct gpmc_settings {
	bool burst_wrap;	/* enables wrap bursting */
	bool burst_read;	/* enables read page/burst mode */
	bool burst_write;	/* enables write page/burst mode */
	bool device_nand;	/* device is NAND */
	bool sync_read;		/* enables synchronous reads */
	bool sync_write;	/* enables synchronous writes */
	bool wait_on_read;	/* monitor wait on reads */
	bool wait_on_write;	/* monitor wait on writes */
	u32 burst_len;		/* page/burst length */
	u32 device_width;	/* device bus width (8 or 16 bit) */
	u32 mux_add_data;	/* multiplex address & data */
	u32 wait_pin;		/* wait-pin to be used */
};

/* Data for each chip select */
struct gpmc_omap_cs_data {
	bool valid;			/* data is valid */
	bool is_nand;			/* device within this CS is NAND */
	struct gpmc_settings *settings;
	struct gpmc_device_timings *device_timings;
	struct gpmc_timings *gpmc_timings;
	struct platform_device *pdev;	/* device within this CS region */
	unsigned int pdata_size;
};

struct gpmc_omap_platform_data {
	struct gpmc_omap_cs_data cs[GPMC_CS_NUM];
};

#endif /* _GPMC_OMAP_H */

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