/
usr
/
src
/
linux-headers-5.15.0-181
/
include
/
sound
/
/usr/src/linux-headers-5.15.0-181/include/sound
mkdir
upload
Name
Size
Mode
Actions
ac97/
-
0755
rm
sof/
-
0755
rm
ac97_codec.h
16044
0644
edit
dl
rm
aci.h
2458
0644
edit
dl
rm
ad1816a.h
4843
0644
edit
dl
rm
ad1843.h
1516
0644
edit
dl
rm
adau1373.h
706
0644
edit
dl
rm
ak4xxx-adda.h
2724
0644
edit
dl
rm
ak4113.h
10461
0644
edit
dl
rm
ak4114.h
9773
0644
edit
dl
rm
ak4117.h
8542
0644
edit
dl
rm
ak4531_codec.h
2478
0644
edit
dl
rm
ak4641.h
476
0644
edit
dl
rm
alc5623.h
536
0644
edit
dl
rm
asequencer.h
2975
0644
edit
dl
rm
asound.h
590
0644
edit
dl
rm
asoundef.h
16403
0644
edit
dl
rm
compress_driver.h
7986
0644
edit
dl
rm
control.h
9958
0644
edit
dl
rm
core.h
15895
0644
edit
dl
rm
cs35l33.h
888
0644
edit
dl
rm
cs35l34.h
741
0644
edit
dl
rm
cs35l35.h
2267
0644
edit
dl
rm
cs35l36.h
772
0644
edit
dl
rm
cs35l41.h
30889
0644
edit
dl
rm
cs42l42.h
35149
0644
edit
dl
rm
cs42l52.h
592
0644
edit
dl
rm
cs42l56.h
1046
0644
edit
dl
rm
cs42l73.h
361
0644
edit
dl
rm
cs4231-regs.h
7785
0644
edit
dl
rm
cs4271.h
961
0644
edit
dl
rm
cs8403.h
8138
0644
edit
dl
rm
cs8427.h
9954
0644
edit
dl
rm
da7213.h
1032
0644
edit
dl
rm
da7218.h
2468
0644
edit
dl
rm
da7219-aad.h
2263
0644
edit
dl
rm
da7219.h
998
0644
edit
dl
rm
da9055.h
707
0644
edit
dl
rm
designware_i2s.h
1631
0644
edit
dl
rm
dmaengine_pcm.h
6913
0644
edit
dl
rm
emu10k1.h
90722
0644
edit
dl
rm
emu10k1_synth.h
693
0644
edit
dl
rm
emu8000.h
3333
0644
edit
dl
rm
emu8000_reg.h
9767
0644
edit
dl
rm
emux_legacy.h
4811
0644
edit
dl
rm
emux_synth.h
6948
0644
edit
dl
rm
es1688.h
2923
0644
edit
dl
rm
graph_card.h
271
0644
edit
dl
rm
gus.h
20119
0644
edit
dl
rm
hdaudio.h
21538
0644
edit
dl
rm
hdaudio_ext.h
5680
0644
edit
dl
rm
hda_chmap.h
2660
0644
edit
dl
rm
hda_codec.h
17669
0644
edit
dl
rm
hda_component.h
2085
0644
edit
dl
rm
hda_hwdep.h
736
0644
edit
dl
rm
hda_i915.h
589
0644
edit
dl
rm
hda_register.h
10655
0644
edit
dl
rm
hda_regmap.h
6934
0644
edit
dl
rm
hda_verbs.h
17296
0644
edit
dl
rm
hdmi-codec.h
3011
0644
edit
dl
rm
hwdep.h
1925
0644
edit
dl
rm
i2c.h
2857
0644
edit
dl
rm
info.h
8053
0644
edit
dl
rm
initval.h
2484
0644
edit
dl
rm
intel-dsp-config.h
869
0644
edit
dl
rm
intel-nhlt.h
2851
0644
edit
dl
rm
jack.h
3172
0644
edit
dl
rm
l3.h
524
0644
edit
dl
rm
madera-pdata.h
1996
0644
edit
dl
rm
max9768.h
729
0644
edit
dl
rm
max98088.h
1074
0644
edit
dl
rm
max98090.h
534
0644
edit
dl
rm
max98095.h
1357
0644
edit
dl
rm
memalloc.h
2642
0644
edit
dl
rm
minors.h
3738
0644
edit
dl
rm
mixer_oss.h
1773
0644
edit
dl
rm
mpu401.h
3905
0644
edit
dl
rm
omap-hdmi-audio.h
971
0644
edit
dl
rm
opl3.h
11909
0644
edit
dl
rm
opl4.h
459
0644
edit
dl
rm
pcm-indirect.h
5159
0644
edit
dl
rm
pcm.h
53684
0644
edit
dl
rm
pcm_drm_eld.h
183
0644
edit
dl
rm
pcm_iec958.h
597
0644
edit
dl
rm
pcm_oss.h
2063
0644
edit
dl
rm
pcm_params.h
8864
0644
edit
dl
rm
pt2258.h
513
0644
edit
dl
rm
pxa2xx-lib.h
2190
0644
edit
dl
rm
rawmidi.h
5881
0644
edit
dl
rm
rt286.h
314
0644
edit
dl
rm
rt298.h
373
0644
edit
dl
rm
rt1015.h
283
0644
edit
dl
rm
rt5514.h
399
0644
edit
dl
rm
rt5659.h
880
0644
edit
dl
rm
rt5660.h
578
0644
edit
dl
rm
rt5663.h
476
0644
edit
dl
rm
rt5665.h
761
0644
edit
dl
rm
rt5668.h
646
0644
edit
dl
rm
rt5682.h
901
0644
edit
dl
rm
s3c24xx_uda134x.h
229
0644
edit
dl
rm
sb.h
10550
0644
edit
dl
rm
sb16_csp.h
2100
0644
edit
dl
rm
seq_device.h
2165
0644
edit
dl
rm
seq_kernel.h
3378
0644
edit
dl
rm
seq_midi_emul.h
6757
0644
edit
dl
rm
seq_midi_event.h
1356
0644
edit
dl
rm
seq_oss.h
2264
0644
edit
dl
rm
seq_oss_legacy.h
360
0644
edit
dl
rm
seq_virmidi.h
2123
0644
edit
dl
rm
sh_dac_audio.h
441
0644
edit
dl
rm
sh_fsi.h
693
0644
edit
dl
rm
simple_card.h
529
0644
edit
dl
rm
simple_card_utils.h
8351
0644
edit
dl
rm
snd_wavefront.h
5620
0644
edit
dl
rm
soc-acpi-intel-match.h
2074
0644
edit
dl
rm
soc-acpi.h
5637
0644
edit
dl
rm
soc-card.h
2944
0644
edit
dl
rm
soc-component.h
19387
0644
edit
dl
rm
soc-dai.h
19957
0644
edit
dl
rm
soc-dapm.h
32957
0644
edit
dl
rm
soc-dpcm.h
5523
0644
edit
dl
rm
soc-jack.h
3822
0644
edit
dl
rm
soc-link.h
1172
0644
edit
dl
rm
soc-topology.h
5835
0644
edit
dl
rm
soc.h
47899
0644
edit
dl
rm
sof.h
2596
0644
edit
dl
rm
soundfont.h
3903
0644
edit
dl
rm
spear_dma.h
350
0644
edit
dl
rm
spear_spdif.h
345
0644
edit
dl
rm
sta32x.h
1015
0644
edit
dl
rm
sta350.h
1474
0644
edit
dl
rm
tas2552-plat.h
283
0644
edit
dl
rm
tas5086.h
210
0644
edit
dl
rm
tea6330t.h
468
0644
edit
dl
rm
timer.h
5109
0644
edit
dl
rm
tlv.h
1627
0644
edit
dl
rm
tlv320aic3x.h
1777
0644
edit
dl
rm
tlv320aic32x4.h
1320
0644
edit
dl
rm
tlv320dac33-plat.h
574
0644
edit
dl
rm
tpa6130a2-plat.h
291
0644
edit
dl
rm
uda134x.h
451
0644
edit
dl
rm
uda1380.h
335
0644
edit
dl
rm
util_mem.h
1623
0644
edit
dl
rm
vx_core.h
15055
0644
edit
dl
rm
wavefront.h
18518
0644
edit
dl
rm
wm0010.h
466
0644
edit
dl
rm
wm1250-ev1.h
510
0644
edit
dl
rm
wm2000.h
479
0644
edit
dl
rm
wm2200.h
1353
0644
edit
dl
rm
wm5100.h
1129
0644
edit
dl
rm
wm8903.h
15377
0644
edit
dl
rm
wm8904.h
7389
0644
edit
dl
rm
wm8955.h
442
0644
edit
dl
rm
wm8960.h
888
0644
edit
dl
rm
wm8962.h
1694
0644
edit
dl
rm
wm8993.h
1076
0644
edit
dl
rm
wm8996.h
1289
0644
edit
dl
rm
wm9081.h
515
0644
edit
dl
rm
wm9090.h
634
0644
edit
dl
rm
wss.h
7949
0644
edit
dl
rm
Edit:
/usr/src/linux-headers-5.15.0-181/include/sound/wm8904.h
(7389B)
/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Platform data for WM8904 * * Copyright 2009 Wolfson Microelectronics PLC. * * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> */ #ifndef __MFD_WM8994_PDATA_H__ #define __MFD_WM8994_PDATA_H__ /* Used to enable configuration of a GPIO to all zeros */ #define WM8904_GPIO_NO_CONFIG 0x8000 /* * R6 (0x06) - Mic Bias Control 0 */ #define WM8904_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */ #define WM8904_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */ #define WM8904_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */ #define WM8904_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */ #define WM8904_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */ #define WM8904_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */ #define WM8904_MICDET_ENA 0x0002 /* MICDET_ENA */ #define WM8904_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */ #define WM8904_MICDET_ENA_SHIFT 1 /* MICDET_ENA */ #define WM8904_MICDET_ENA_WIDTH 1 /* MICDET_ENA */ #define WM8904_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */ #define WM8904_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */ #define WM8904_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */ #define WM8904_MICBIAS_ENA_WIDTH 1 /* MICBIAS_ENA */ /* * R7 (0x07) - Mic Bias Control 1 */ #define WM8904_MIC_DET_FILTER_ENA 0x8000 /* MIC_DET_FILTER_ENA */ #define WM8904_MIC_DET_FILTER_ENA_MASK 0x8000 /* MIC_DET_FILTER_ENA */ #define WM8904_MIC_DET_FILTER_ENA_SHIFT 15 /* MIC_DET_FILTER_ENA */ #define WM8904_MIC_DET_FILTER_ENA_WIDTH 1 /* MIC_DET_FILTER_ENA */ #define WM8904_MIC_SHORT_FILTER_ENA 0x4000 /* MIC_SHORT_FILTER_ENA */ #define WM8904_MIC_SHORT_FILTER_ENA_MASK 0x4000 /* MIC_SHORT_FILTER_ENA */ #define WM8904_MIC_SHORT_FILTER_ENA_SHIFT 14 /* MIC_SHORT_FILTER_ENA */ #define WM8904_MIC_SHORT_FILTER_ENA_WIDTH 1 /* MIC_SHORT_FILTER_ENA */ #define WM8904_MICBIAS_SEL_MASK 0x0007 /* MICBIAS_SEL - [2:0] */ #define WM8904_MICBIAS_SEL_SHIFT 0 /* MICBIAS_SEL - [2:0] */ #define WM8904_MICBIAS_SEL_WIDTH 3 /* MICBIAS_SEL - [2:0] */ /* * R121 (0x79) - GPIO Control 1 */ #define WM8904_GPIO1_PU 0x0020 /* GPIO1_PU */ #define WM8904_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */ #define WM8904_GPIO1_PU_SHIFT 5 /* GPIO1_PU */ #define WM8904_GPIO1_PU_WIDTH 1 /* GPIO1_PU */ #define WM8904_GPIO1_PD 0x0010 /* GPIO1_PD */ #define WM8904_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */ #define WM8904_GPIO1_PD_SHIFT 4 /* GPIO1_PD */ #define WM8904_GPIO1_PD_WIDTH 1 /* GPIO1_PD */ #define WM8904_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ #define WM8904_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */ #define WM8904_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */ /* * R122 (0x7A) - GPIO Control 2 */ #define WM8904_GPIO2_PU 0x0020 /* GPIO2_PU */ #define WM8904_GPIO2_PU_MASK 0x0020 /* GPIO2_PU */ #define WM8904_GPIO2_PU_SHIFT 5 /* GPIO2_PU */ #define WM8904_GPIO2_PU_WIDTH 1 /* GPIO2_PU */ #define WM8904_GPIO2_PD 0x0010 /* GPIO2_PD */ #define WM8904_GPIO2_PD_MASK 0x0010 /* GPIO2_PD */ #define WM8904_GPIO2_PD_SHIFT 4 /* GPIO2_PD */ #define WM8904_GPIO2_PD_WIDTH 1 /* GPIO2_PD */ #define WM8904_GPIO2_SEL_MASK 0x000F /* GPIO2_SEL - [3:0] */ #define WM8904_GPIO2_SEL_SHIFT 0 /* GPIO2_SEL - [3:0] */ #define WM8904_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [3:0] */ /* * R123 (0x7B) - GPIO Control 3 */ #define WM8904_GPIO3_PU 0x0020 /* GPIO3_PU */ #define WM8904_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */ #define WM8904_GPIO3_PU_SHIFT 5 /* GPIO3_PU */ #define WM8904_GPIO3_PU_WIDTH 1 /* GPIO3_PU */ #define WM8904_GPIO3_PD 0x0010 /* GPIO3_PD */ #define WM8904_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */ #define WM8904_GPIO3_PD_SHIFT 4 /* GPIO3_PD */ #define WM8904_GPIO3_PD_WIDTH 1 /* GPIO3_PD */ #define WM8904_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ #define WM8904_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */ #define WM8904_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */ /* * R124 (0x7C) - GPIO Control 4 */ #define WM8904_GPI7_ENA 0x0200 /* GPI7_ENA */ #define WM8904_GPI7_ENA_MASK 0x0200 /* GPI7_ENA */ #define WM8904_GPI7_ENA_SHIFT 9 /* GPI7_ENA */ #define WM8904_GPI7_ENA_WIDTH 1 /* GPI7_ENA */ #define WM8904_GPI8_ENA 0x0100 /* GPI8_ENA */ #define WM8904_GPI8_ENA_MASK 0x0100 /* GPI8_ENA */ #define WM8904_GPI8_ENA_SHIFT 8 /* GPI8_ENA */ #define WM8904_GPI8_ENA_WIDTH 1 /* GPI8_ENA */ #define WM8904_GPIO_BCLK_MODE_ENA 0x0080 /* GPIO_BCLK_MODE_ENA */ #define WM8904_GPIO_BCLK_MODE_ENA_MASK 0x0080 /* GPIO_BCLK_MODE_ENA */ #define WM8904_GPIO_BCLK_MODE_ENA_SHIFT 7 /* GPIO_BCLK_MODE_ENA */ #define WM8904_GPIO_BCLK_MODE_ENA_WIDTH 1 /* GPIO_BCLK_MODE_ENA */ #define WM8904_GPIO_BCLK_SEL_MASK 0x000F /* GPIO_BCLK_SEL - [3:0] */ #define WM8904_GPIO_BCLK_SEL_SHIFT 0 /* GPIO_BCLK_SEL - [3:0] */ #define WM8904_GPIO_BCLK_SEL_WIDTH 4 /* GPIO_BCLK_SEL - [3:0] */ #define WM8904_MIC_REGS 2 #define WM8904_GPIO_REGS 4 #define WM8904_DRC_REGS 4 #define WM8904_EQ_REGS 24 /** * DRC configurations are specified with a label and a set of register * values to write (the enable bits will be ignored). At runtime an * enumerated control will be presented for each DRC block allowing * the user to choose the configuration to use. * * Configurations may be generated by hand or by using the DRC control * panel provided by the WISCE - see http://www.wolfsonmicro.com/wisce/ * for details. */ struct wm8904_drc_cfg { const char *name; u16 regs[WM8904_DRC_REGS]; }; /** * ReTune Mobile configurations are specified with a label, sample * rate and set of values to write (the enable bits will be ignored). * * Configurations are expected to be generated using the ReTune Mobile * control panel in WISCE - see http://www.wolfsonmicro.com/wisce/ */ struct wm8904_retune_mobile_cfg { const char *name; unsigned int rate; u16 regs[WM8904_EQ_REGS]; }; struct wm8904_pdata { int num_drc_cfgs; struct wm8904_drc_cfg *drc_cfgs; int num_retune_mobile_cfgs; struct wm8904_retune_mobile_cfg *retune_mobile_cfgs; u32 gpio_cfg[WM8904_GPIO_REGS]; u32 mic_cfg[WM8904_MIC_REGS]; }; #endif
Save
cmd:
run