FM / octeon

/usr/src/linux-headers-5.15.0-190/arch/mips/include/asm/octeon/

/usr/src/linux-headers-5.15.0-190/arch/mips/include/asm/octeon

Name	Size	Mode	Actions
cvmx-address.h	9370	0644	edit dl rm
cvmx-agl-defs.h	41472	0644	edit dl rm
cvmx-asm.h	5200	0644	edit dl rm
cvmx-asxx-defs.h	13834	0644	edit dl rm
cvmx-boot-vector.h	1606	0644	edit dl rm
cvmx-bootinfo.h	14012	0644	edit dl rm
cvmx-bootmem.h	11770	0644	edit dl rm
cvmx-ciu-defs.h	5876	0644	edit dl rm
cvmx-ciu2-defs.h	3033	0644	edit dl rm
cvmx-ciu3-defs.h	10966	0644	edit dl rm
cvmx-cmd-queue.h	18907	0644	edit dl rm
cvmx-config.h	6465	0644	edit dl rm
cvmx-coremask.h	2176	0644	edit dl rm
cvmx-dbg-defs.h	2646	0644	edit dl rm
cvmx-dpi-defs.h	20435	0644	edit dl rm
cvmx-fau.h	18651	0644	edit dl rm
cvmx-fpa-defs.h	28327	0644	edit dl rm
cvmx-fpa.h	8336	0644	edit dl rm
cvmx-gmxx-defs.h	56175	0644	edit dl rm
cvmx-gpio-defs.h	9093	0644	edit dl rm
cvmx-helper-board.h	4665	0644	edit dl rm
cvmx-helper-errata.h	1277	0644	edit dl rm
cvmx-helper-jtag.h	1530	0644	edit dl rm
cvmx-helper-loop.h	1976	0644	edit dl rm
cvmx-helper-npi.h	1957	0644	edit dl rm
cvmx-helper-rgmii.h	2964	0644	edit dl rm
cvmx-helper-sgmii.h	2814	0644	edit dl rm
cvmx-helper-spi.h	2781	0644	edit dl rm
cvmx-helper-util.h	5358	0644	edit dl rm
cvmx-helper-xaui.h	2809	0644	edit dl rm
cvmx-helper.h	5786	0644	edit dl rm
cvmx-iob-defs.h	20013	0644	edit dl rm
cvmx-ipd-defs.h	33621	0644	edit dl rm
cvmx-ipd.h	10740	0644	edit dl rm
cvmx-l2c-defs.h	8134	0644	edit dl rm
cvmx-l2c.h	11389	0644	edit dl rm
cvmx-l2d-defs.h	1941	0644	edit dl rm
cvmx-l2t-defs.h	5098	0644	edit dl rm
cvmx-led-defs.h	5060	0644	edit dl rm
cvmx-lmcx-defs.h	70048	0644	edit dl rm
cvmx-mio-defs.h	97717	0644	edit dl rm
cvmx-mixx-defs.h	10084	0644	edit dl rm
cvmx-npei-defs.h	84985	0644	edit dl rm
cvmx-npi-defs.h	59612	0644	edit dl rm
cvmx-packet.h	2115	0644	edit dl rm
cvmx-pci-defs.h	43270	0644	edit dl rm
cvmx-pciercx-defs.h	11497	0644	edit dl rm
cvmx-pcsx-defs.h	26539	0644	edit dl rm
cvmx-pcsxx-defs.h	19404	0644	edit dl rm
cvmx-pemx-defs.h	15316	0644	edit dl rm
cvmx-pescx-defs.h	13746	0644	edit dl rm
cvmx-pexp-defs.h	17041	0644	edit dl rm
cvmx-pip-defs.h	62364	0644	edit dl rm
cvmx-pip.h	16395	0644	edit dl rm
cvmx-pko-defs.h	48448	0644	edit dl rm
cvmx-pko.h	19611	0644	edit dl rm
cvmx-pow-defs.h	22571	0644	edit dl rm
cvmx-pow.h	65380	0644	edit dl rm
cvmx-rnm-defs.h	4085	0644	edit dl rm
cvmx-rst-defs.h	6482	0644	edit dl rm
cvmx-scratch.h	3869	0644	edit dl rm
cvmx-sli-defs.h	4055	0644	edit dl rm
cvmx-spi.h	9142	0644	edit dl rm
cvmx-spinlock.h	6385	0644	edit dl rm
cvmx-spxx-defs.h	10814	0644	edit dl rm
cvmx-sriox-defs.h	38100	0644	edit dl rm
cvmx-srxx-defs.h	3734	0644	edit dl rm
cvmx-stxx-defs.h	8241	0644	edit dl rm
cvmx-sysinfo.h	4043	0644	edit dl rm
cvmx-uctlx-defs.h	9492	0644	edit dl rm
cvmx-wqe.h	17491	0644	edit dl rm
cvmx.h	14181	0644	edit dl rm
octeon-feature.h	6533	0644	edit dl rm
octeon-model.h	16881	0644	edit dl rm
octeon.h	12451	0644	edit dl rm
pci-octeon.h	1751	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-190/arch/mips/include/asm/octeon/cvmx-sli-defs.h (4055B)

/***********************license start***************
 * Author: Cavium Networks
 *
 * Contact: support@caviumnetworks.com
 * This file is part of the OCTEON SDK
 *
 * Copyright (c) 2003-2017 Cavium, Inc.
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this file; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 * or visit http://www.gnu.org/licenses/.
 *
 * This file may also be available under a different license from Cavium.
 * Contact Cavium Networks for more information
 ***********************license end**************************************/

#ifndef __CVMX_SLI_DEFS_H__
#define __CVMX_SLI_DEFS_H__

#include <uapi/asm/bitfield.h>

#define CVMX_SLI_PCIE_MSI_RCV CVMX_SLI_PCIE_MSI_RCV_FUNC()
static inline uint64_t CVMX_SLI_PCIE_MSI_RCV_FUNC(void)
{
	switch (cvmx_get_octeon_family()) {
	case OCTEON_CNF71XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN61XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN63XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN66XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN68XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN70XX & OCTEON_FAMILY_MASK:
		return 0x0000000000003CB0ull;
	case OCTEON_CNF75XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN73XX & OCTEON_FAMILY_MASK:
	case OCTEON_CN78XX & OCTEON_FAMILY_MASK:
		if (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X))
			return 0x0000000000003CB0ull;
		fallthrough;
	default:
		return 0x0000000000023CB0ull;
	}
}

union cvmx_sli_ctl_portx {
	uint64_t u64;
	struct cvmx_sli_ctl_portx_s {
		__BITFIELD_FIELD(uint64_t reserved_22_63:42,
		__BITFIELD_FIELD(uint64_t intd:1,
		__BITFIELD_FIELD(uint64_t intc:1,
		__BITFIELD_FIELD(uint64_t intb:1,
		__BITFIELD_FIELD(uint64_t inta:1,
		__BITFIELD_FIELD(uint64_t dis_port:1,
		__BITFIELD_FIELD(uint64_t waitl_com:1,
		__BITFIELD_FIELD(uint64_t intd_map:2,
		__BITFIELD_FIELD(uint64_t intc_map:2,
		__BITFIELD_FIELD(uint64_t intb_map:2,
		__BITFIELD_FIELD(uint64_t inta_map:2,
		__BITFIELD_FIELD(uint64_t ctlp_ro:1,
		__BITFIELD_FIELD(uint64_t reserved_6_6:1,
		__BITFIELD_FIELD(uint64_t ptlp_ro:1,
		__BITFIELD_FIELD(uint64_t reserved_1_4:4,
		__BITFIELD_FIELD(uint64_t wait_com:1,
		;))))))))))))))))
	} s;
};

union cvmx_sli_mem_access_ctl {
	uint64_t u64;
	struct cvmx_sli_mem_access_ctl_s {
		__BITFIELD_FIELD(uint64_t reserved_14_63:50,
		__BITFIELD_FIELD(uint64_t max_word:4,
		__BITFIELD_FIELD(uint64_t timer:10,
		;)))
	} s;
};

union cvmx_sli_s2m_portx_ctl {
	uint64_t u64;
	struct cvmx_sli_s2m_portx_ctl_s {
		__BITFIELD_FIELD(uint64_t reserved_5_63:59,
		__BITFIELD_FIELD(uint64_t wind_d:1,
		__BITFIELD_FIELD(uint64_t bar0_d:1,
		__BITFIELD_FIELD(uint64_t mrrs:3,
		;))))
	} s;
};

union cvmx_sli_mem_access_subidx {
	uint64_t u64;
	struct cvmx_sli_mem_access_subidx_s {
		__BITFIELD_FIELD(uint64_t reserved_43_63:21,
		__BITFIELD_FIELD(uint64_t zero:1,
		__BITFIELD_FIELD(uint64_t port:3,
		__BITFIELD_FIELD(uint64_t nmerge:1,
		__BITFIELD_FIELD(uint64_t esr:2,
		__BITFIELD_FIELD(uint64_t esw:2,
		__BITFIELD_FIELD(uint64_t wtype:2,
		__BITFIELD_FIELD(uint64_t rtype:2,
		__BITFIELD_FIELD(uint64_t ba:30,
		;)))))))))
	} s;
	struct cvmx_sli_mem_access_subidx_cn68xx {
		__BITFIELD_FIELD(uint64_t reserved_43_63:21,
		__BITFIELD_FIELD(uint64_t zero:1,
		__BITFIELD_FIELD(uint64_t port:3,
		__BITFIELD_FIELD(uint64_t nmerge:1,
		__BITFIELD_FIELD(uint64_t esr:2,
		__BITFIELD_FIELD(uint64_t esw:2,
		__BITFIELD_FIELD(uint64_t wtype:2,
		__BITFIELD_FIELD(uint64_t rtype:2,
		__BITFIELD_FIELD(uint64_t ba:28,
		__BITFIELD_FIELD(uint64_t reserved_0_1:2,
		;))))))))))
	} cn68xx;
};

#endif

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