FM / asm

/usr/src/linux-headers-5.15.0-190/arch/parisc/include/asm/

/usr/src/linux-headers-5.15.0-190/arch/parisc/include/asm

Name	Size	Mode	Actions
agp.h	596	0644	edit dl rm
alternative.h	1954	0644	edit dl rm
asm-offsets.h	35	0644	edit dl rm
asmregs.h	2478	0644	edit dl rm
assembly.h	12496	0644	edit dl rm
atomic.h	5718	0644	edit dl rm
barrier.h	2563	0644	edit dl rm
bitops.h	5578	0644	edit dl rm
bug.h	2408	0644	edit dl rm
cache.h	2084	0644	edit dl rm
cacheflush.h	3773	0644	edit dl rm
checksum.h	4715	0644	edit dl rm
cmpxchg.h	3783	0644	edit dl rm
compat.h	3973	0644	edit dl rm
compat_ucontext.h	591	0644	edit dl rm
delay.h	533	0644	edit dl rm
dma-mapping.h	1012	0644	edit dl rm
dma.h	5849	0644	edit dl rm
dwarf.h	456	0644	edit dl rm
eisa_bus.h	492	0644	edit dl rm
eisa_eeprom.h	4318	0644	edit dl rm
elf.h	14381	0644	edit dl rm
fb.h	491	0644	edit dl rm
fixmap.h	1611	0644	edit dl rm
floppy.h	6193	0644	edit dl rm
ftrace.h	641	0644	edit dl rm
futex.h	2666	0644	edit dl rm
grfioctl.h	4090	0644	edit dl rm
hardirq.h	976	0644	edit dl rm
hardware.h	4239	0644	edit dl rm
hash.h	5194	0644	edit dl rm
hugetlb.h	1331	0644	edit dl rm
ide.h	1120	0644	edit dl rm
io.h	8307	0644	edit dl rm
irq.h	1171	0644	edit dl rm
irqflags.h	1046	0644	edit dl rm
jump_label.h	990	0644	edit dl rm
kbdleds.h	477	0644	edit dl rm
Kbuild	175	0644	edit dl rm
kexec.h	827	0644	edit dl rm
kgdb.h	1318	0644	edit dl rm
kprobes.h	1284	0644	edit dl rm
ldcw.h	2570	0644	edit dl rm
led.h	1362	0644	edit dl rm
linkage.h	738	0644	edit dl rm
machdep.h	349	0644	edit dl rm
mckinley.h	270	0644	edit dl rm
mmu.h	195	0644	edit dl rm
mmu_context.h	2355	0644	edit dl rm
mmzone.h	202	0644	edit dl rm
module.h	527	0644	edit dl rm
page.h	5533	0644	edit dl rm
parisc-device.h	1964	0644	edit dl rm
parport.h	358	0644	edit dl rm
patch.h	445	0644	edit dl rm
pci.h	5956	0644	edit dl rm
pdc.h	4269	0644	edit dl rm
pdcpat.h	16968	0644	edit dl rm
pdc_chassis.h	14745	0644	edit dl rm
perf.h	1936	0644	edit dl rm
perf_event.h	152	0644	edit dl rm
pgalloc.h	1722	0644	edit dl rm
pgtable.h	17062	0644	edit dl rm
prefetch.h	1147	0644	edit dl rm
processor.h	9486	0644	edit dl rm
psw.h	2464	0644	edit dl rm
ptrace.h	1603	0644	edit dl rm
ropes.h	10060	0644	edit dl rm
rt_sigframe.h	745	0644	edit dl rm
runway.h	320	0644	edit dl rm
seccomp.h	651	0644	edit dl rm
sections.h	494	0644	edit dl rm
serial.h	124	0644	edit dl rm
shmparam.h	263	0644	edit dl rm
signal.h	685	0644	edit dl rm
smp.h	1276	0644	edit dl rm
socket.h	310	0644	edit dl rm
sparsemem.h	345	0644	edit dl rm
special_insns.h	1554	0644	edit dl rm
spinlock.h	3182	0644	edit dl rm
spinlock_types.h	701	0644	edit dl rm
string.h	247	0644	edit dl rm
superio.h	3333	0644	edit dl rm
switch_to.h	332	0644	edit dl rm
syscall.h	1477	0644	edit dl rm
termios.h	1761	0644	edit dl rm
thread_info.h	3143	0644	edit dl rm
timex.h	403	0644	edit dl rm
tlb.h	288	0644	edit dl rm
tlbflush.h	1975	0644	edit dl rm
topology.h	900	0644	edit dl rm
traps.h	598	0644	edit dl rm
uaccess.h	6253	0644	edit dl rm
ucontext.h	327	0644	edit dl rm
unaligned.h	307	0644	edit dl rm
unistd.h	5776	0644	edit dl rm
unwind.h	2723	0644	edit dl rm
vmalloc.h	96	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-190/arch/parisc/include/asm/dma.h (5849B)

/* SPDX-License-Identifier: GPL-2.0 */
/* asm/dma.h: Defines for using and allocating dma channels.
 * Written by Hennus Bergman, 1992.
 * High DMA channel support & info by Hannu Savolainen
 * and John Boyd, Nov. 1992.
 * (c) Copyright 2000, Grant Grundler
 */

#ifndef _ASM_DMA_H
#define _ASM_DMA_H

#include <asm/io.h>		/* need byte IO */

#define dma_outb	outb
#define dma_inb		inb

/*
** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
** (or rather not merge) DMAs into manageable chunks.
** On parisc, this is more of the software/tuning constraint
** rather than the HW. I/O MMU allocation algorithms can be
** faster with smaller sizes (to some degree).
*/
#define DMA_CHUNK_SIZE	(BITS_PER_LONG*PAGE_SIZE)

/* The maximum address that we can perform a DMA transfer to on this platform
** New dynamic DMA interfaces should obsolete this....
*/
#define MAX_DMA_ADDRESS (~0UL)

/*
** We don't have DMA channels... well V-class does but the
** Dynamic DMA Mapping interface will support them... right? :^)
** Note: this is not relevant right now for PA-RISC, but we cannot 
** leave this as undefined because some things (e.g. sound)
** won't compile :-(
*/
#define MAX_DMA_CHANNELS 8
#define DMA_MODE_READ	0x44	/* I/O to memory, no autoinit, increment, single mode */
#define DMA_MODE_WRITE	0x48	/* memory to I/O, no autoinit, increment, single mode */
#define DMA_MODE_CASCADE 0xC0	/* pass thru DREQ->HRQ, DACK<-HLDA only */

#define DMA_AUTOINIT	0x10

/* 8237 DMA controllers */
#define IO_DMA1_BASE	0x00	/* 8 bit slave DMA, channels 0..3 */
#define IO_DMA2_BASE	0xC0	/* 16 bit master DMA, ch 4(=slave input)..7 */

/* DMA controller registers */
#define DMA1_CMD_REG		0x08	/* command register (w) */
#define DMA1_STAT_REG		0x08	/* status register (r) */
#define DMA1_REQ_REG            0x09    /* request register (w) */
#define DMA1_MASK_REG		0x0A	/* single-channel mask (w) */
#define DMA1_MODE_REG		0x0B	/* mode register (w) */
#define DMA1_CLEAR_FF_REG	0x0C	/* clear pointer flip-flop (w) */
#define DMA1_TEMP_REG           0x0D    /* Temporary Register (r) */
#define DMA1_RESET_REG		0x0D	/* Master Clear (w) */
#define DMA1_CLR_MASK_REG       0x0E    /* Clear Mask */
#define DMA1_MASK_ALL_REG       0x0F    /* all-channels mask (w) */
#define DMA1_EXT_MODE_REG	(0x400 | DMA1_MODE_REG)

#define DMA2_CMD_REG		0xD0	/* command register (w) */
#define DMA2_STAT_REG		0xD0	/* status register (r) */
#define DMA2_REQ_REG            0xD2    /* request register (w) */
#define DMA2_MASK_REG		0xD4	/* single-channel mask (w) */
#define DMA2_MODE_REG		0xD6	/* mode register (w) */
#define DMA2_CLEAR_FF_REG	0xD8	/* clear pointer flip-flop (w) */
#define DMA2_TEMP_REG           0xDA    /* Temporary Register (r) */
#define DMA2_RESET_REG		0xDA	/* Master Clear (w) */
#define DMA2_CLR_MASK_REG       0xDC    /* Clear Mask */
#define DMA2_MASK_ALL_REG       0xDE    /* all-channels mask (w) */
#define DMA2_EXT_MODE_REG	(0x400 | DMA2_MODE_REG)

static __inline__ unsigned long claim_dma_lock(void)
{
	return 0;
}

static __inline__ void release_dma_lock(unsigned long flags)
{
}

/* Get DMA residue count. After a DMA transfer, this
 * should return zero. Reading this while a DMA transfer is
 * still in progress will return unpredictable results.
 * If called before the channel has been used, it may return 1.
 * Otherwise, it returns the number of _bytes_ left to transfer.
 *
 * Assumes DMA flip-flop is clear.
 */
static __inline__ int get_dma_residue(unsigned int dmanr)
{
	unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
					 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;

/* using short to get 16-bit wrap around */
	unsigned short count;

count = 1 + dma_inb(io_port);
	count += dma_inb(io_port) << 8;
	
	return (dmanr<=3)? count : (count<<1);
}

/* enable/disable a specific DMA channel */
static __inline__ void enable_dma(unsigned int dmanr)
{
#ifdef CONFIG_SUPERIO
	if (dmanr<=3)
		dma_outb(dmanr,  DMA1_MASK_REG);
	else
		dma_outb(dmanr & 3,  DMA2_MASK_REG);
#endif
}

static __inline__ void disable_dma(unsigned int dmanr)
{
#ifdef CONFIG_SUPERIO
	if (dmanr<=3)
		dma_outb(dmanr | 4,  DMA1_MASK_REG);
	else
		dma_outb((dmanr & 3) | 4,  DMA2_MASK_REG);
#endif
}

/* reserve a DMA channel */
#define request_dma(dmanr, device_id)	(0)

/* Clear the 'DMA Pointer Flip Flop'.
 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
 * Use this once to initialize the FF to a known state.
 * After that, keep track of it. :-)
 * --- In order to do that, the DMA routines below should ---
 * --- only be used while holding the DMA lock ! ---
 */
static __inline__ void clear_dma_ff(unsigned int dmanr)
{
}

/* set mode (above) for a specific DMA channel */
static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
{
}

/* Set only the page register bits of the transfer address.
 * This is used for successive transfers when we know the contents of
 * the lower 16 bits of the DMA current address register, but a 64k boundary
 * may have been crossed.
 */
static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
{
}

/* Set transfer address & page bits for specific DMA channel.
 * Assumes dma flipflop is clear.
 */
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
{
}

/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
 * a specific DMA channel.
 * You must ensure the parameters are valid.
 * NOTE: from a manual: "the number of transfers is one more
 * than the initial word count"! This is taken into account.
 * Assumes dma flip-flop is clear.
 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
 */
static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
{
}

#define free_dma(dmanr)

#ifdef CONFIG_PCI
extern int isa_dma_bridge_buggy;
#else
#define isa_dma_bridge_buggy 	(0)
#endif

#endif /* _ASM_DMA_H */

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