FM / asm

/usr/src/linux-headers-5.15.0-190/arch/sh/include/asm/

/usr/src/linux-headers-5.15.0-190/arch/sh/include/asm

Name	Size	Mode	Actions
adc.h	211	0644	edit dl rm
addrspace.h	1896	0644	edit dl rm
alignment.h	654	0644	edit dl rm
asm-offsets.h	74	0644	edit dl rm
atomic-grb.h	2677	0644	edit dl rm
atomic-irq.h	1687	0644	edit dl rm
atomic-llsc.h	2186	0644	edit dl rm
atomic.h	840	0644	edit dl rm
barrier.h	1503	0644	edit dl rm
bitops-cas.h	1770	0644	edit dl rm
bitops-grb.h	6364	0644	edit dl rm
bitops-llsc.h	2858	0644	edit dl rm
bitops-op32.h	3842	0644	edit dl rm
bitops.h	1653	0644	edit dl rm
bl_bit.h	66	0644	edit dl rm
bl_bit_32.h	639	0644	edit dl rm
bug.h	2835	0644	edit dl rm
cache.h	1171	0644	edit dl rm
cacheflush.h	3735	0644	edit dl rm
cache_insns.h	71	0644	edit dl rm
cache_insns_32.h	642	0644	edit dl rm
checksum.h	68	0644	edit dl rm
checksum_32.h	5009	0644	edit dl rm
clock.h	436	0644	edit dl rm
cmpxchg-cas.h	549	0644	edit dl rm
cmpxchg-grb.h	2869	0644	edit dl rm
cmpxchg-irq.h	1065	0644	edit dl rm
cmpxchg-llsc.h	1085	0644	edit dl rm
cmpxchg-xchg.h	1274	0644	edit dl rm
cmpxchg.h	1822	0644	edit dl rm
device.h	442	0644	edit dl rm
dma-register.h	1708	0644	edit dl rm
dma.h	3652	0644	edit dl rm
dmabrg.h	536	0644	edit dl rm
dwarf.h	9896	0644	edit dl rm
elf.h	6009	0644	edit dl rm
entry-macros.S	1897	0644	edit dl rm
extable.h	135	0644	edit dl rm
fb.h	414	0644	edit dl rm
fixmap.h	2543	0644	edit dl rm
flat.h	863	0644	edit dl rm
fpu.h	1635	0644	edit dl rm
freq.h	212	0644	edit dl rm
ftrace.h	1138	0644	edit dl rm
futex-cas.h	728	0644	edit dl rm
futex-irq.h	482	0644	edit dl rm
futex-llsc.h	870	0644	edit dl rm
futex.h	1381	0644	edit dl rm
gpio.h	851	0644	edit dl rm
hardirq.h	267	0644	edit dl rm
hd64461.h	12068	0644	edit dl rm
heartbeat.h	383	0644	edit dl rm
hugetlb.h	915	0644	edit dl rm
hw_breakpoint.h	1970	0644	edit dl rm
hw_irq.h	915	0644	edit dl rm
i2c-sh7760.h	406	0644	edit dl rm
io.h	8699	0644	edit dl rm
io_generic.h	661	0644	edit dl rm
io_noioport.h	1502	0644	edit dl rm
io_trapped.h	1474	0644	edit dl rm
irq.h	1642	0644	edit dl rm
irqflags.h	226	0644	edit dl rm
Kbuild	141	0644	edit dl rm
kdebug.h	433	0644	edit dl rm
kexec.h	2672	0644	edit dl rm
kgdb.h	851	0644	edit dl rm
kprobes.h	1407	0644	edit dl rm
linkage.h	154	0644	edit dl rm
machvec.h	850	0644	edit dl rm
mmiowb.h	246	0644	edit dl rm
mmu.h	2231	0644	edit dl rm
mmu_context.h	4167	0644	edit dl rm
mmu_context_32.h	1136	0644	edit dl rm
mmzone.h	1052	0644	edit dl rm
module.h	276	0644	edit dl rm
page.h	5419	0644	edit dl rm
pci.h	3007	0644	edit dl rm
perf_event.h	797	0644	edit dl rm
pgalloc.h	1107	0644	edit dl rm
pgtable-2level.h	567	0644	edit dl rm
pgtable-3level.h	1464	0644	edit dl rm
pgtable.h	4305	0644	edit dl rm
pgtable_32.h	15899	0644	edit dl rm
platform_early.h	1850	0644	edit dl rm
posix_types.h	71	0644	edit dl rm
processor.h	4342	0644	edit dl rm
processor_32.h	4614	0644	edit dl rm
ptrace.h	3834	0644	edit dl rm
ptrace_32.h	307	0644	edit dl rm
push-switch.h	755	0644	edit dl rm
reboot.h	472	0644	edit dl rm
romimage-macros.h	1126	0644	edit dl rm
rtc.h	249	0644	edit dl rm
seccomp.h	546	0644	edit dl rm
sections.h	311	0644	edit dl rm
segment.h	860	0644	edit dl rm
setup.h	725	0644	edit dl rm
sfp-machine.h	2767	0644	edit dl rm
sh7760fb.h	5740	0644	edit dl rm
shmparam.h	489	0644	edit dl rm
sh_bios.h	743	0644	edit dl rm
siu.h	385	0644	edit dl rm
smc37c93x.h	5698	0644	edit dl rm
smp-ops.h	1012	0644	edit dl rm
smp.h	1847	0644	edit dl rm
sparsemem.h	319	0644	edit dl rm
spi.h	265	0644	edit dl rm
spinlock-cas.h	2001	0644	edit dl rm
spinlock-llsc.h	4149	0644	edit dl rm
spinlock.h	438	0644	edit dl rm
spinlock_types.h	463	0644	edit dl rm
sram.h	670	0644	edit dl rm
stackprotector.h	711	0644	edit dl rm
stacktrace.h	528	0644	edit dl rm
string.h	66	0644	edit dl rm
string_32.h	2208	0644	edit dl rm
suspend.h	2576	0644	edit dl rm
switch_to.h	190	0644	edit dl rm
switch_to_32.h	3631	0644	edit dl rm
syscall.h	201	0644	edit dl rm
syscalls.h	454	0644	edit dl rm
syscalls_32.h	979	0644	edit dl rm
syscall_32.h	1917	0644	edit dl rm
thread_info.h	5342	0644	edit dl rm
timex.h	637	0644	edit dl rm
tlb.h	625	0644	edit dl rm
tlbflush.h	1809	0644	edit dl rm
topology.h	645	0644	edit dl rm
traps.h	424	0644	edit dl rm
traps_32.h	1338	0644	edit dl rm
types.h	326	0644	edit dl rm
uaccess.h	4811	0644	edit dl rm
uaccess_32.h	5007	0644	edit dl rm
uncached.h	1372	0644	edit dl rm
unistd.h	919	0644	edit dl rm
unwinder.h	856	0644	edit dl rm
user.h	2440	0644	edit dl rm
vermagic.h	709	0644	edit dl rm
vga.h	137	0644	edit dl rm
vmalloc.h	84	0644	edit dl rm
vmlinux.lds.h	416	0644	edit dl rm
watchdog.h	3981	0644	edit dl rm
word-at-a-time.h	1321	0644	edit dl rm

Edit: /usr/src/linux-headers-5.15.0-190/arch/sh/include/asm/sh7760fb.h (5740B)

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver.
 *
 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
 * 			Manuel Lauss <mano@roarinelk.homelinux.net>
 * (c) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
 */

#ifndef _ASM_SH_SH7760FB_H
#define _ASM_SH_SH7760FB_H

/*
 * some bits of the colormap registers should be written as zero.
 * create a mask for that.
 */
#define SH7760FB_PALETTE_MASK 0x00f8fcf8

/* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */
#define SH7760FB_DMA_MASK 0x0C000000

/* palette */
#define LDPR(x) (((x) << 2))

/* framebuffer registers and bits */
#define LDICKR 0x400
#define LDMTR 0x402
/* see sh7760fb.h for LDMTR bits */
#define LDDFR 0x404
#define LDDFR_PABD (1 << 8)
#define LDDFR_COLOR_MASK 0x7F
#define LDSMR 0x406
#define LDSMR_ROT (1 << 13)
#define LDSARU 0x408
#define LDSARL 0x40c
#define LDLAOR 0x410
#define LDPALCR 0x412
#define LDPALCR_PALS (1 << 4)
#define LDPALCR_PALEN (1 << 0)
#define LDHCNR 0x414
#define LDHSYNR 0x416
#define LDVDLNR 0x418
#define LDVTLNR 0x41a
#define LDVSYNR 0x41c
#define LDACLNR 0x41e
#define LDINTR 0x420
#define LDPMMR 0x424
#define LDPSPR 0x426
#define LDCNTR 0x428
#define LDCNTR_DON (1 << 0)
#define LDCNTR_DON2 (1 << 4)

#ifdef CONFIG_CPU_SUBTYPE_SH7763
# define LDLIRNR       0x440
/* LDINTR bit */
# define LDINTR_MINTEN (1 << 15)
# define LDINTR_FINTEN (1 << 14)
# define LDINTR_VSINTEN (1 << 13)
# define LDINTR_VEINTEN (1 << 12)
# define LDINTR_MINTS (1 << 11)
# define LDINTR_FINTS (1 << 10)
# define LDINTR_VSINTS (1 << 9)
# define LDINTR_VEINTS (1 << 8)
# define VINT_START (LDINTR_VSINTEN)
# define VINT_CHECK (LDINTR_VSINTS)
#else
/* LDINTR bit */
# define LDINTR_VINTSEL (1 << 12)
# define LDINTR_VINTE (1 << 8)
# define LDINTR_VINTS (1 << 0)
# define VINT_START (LDINTR_VINTSEL)
# define VINT_CHECK (LDINTR_VINTS)
#endif

/* HSYNC polarity inversion */
#define LDMTR_FLMPOL (1 << 15)

/* VSYNC polarity inversion */
#define LDMTR_CL1POL (1 << 14)

/* DISPLAY-ENABLE polarity inversion */
#define LDMTR_DISPEN_LOWACT (1 << 13)

/* DISPLAY DATA BUS polarity inversion */
#define LDMTR_DPOL_LOWACT (1 << 12)

/* AC modulation signal enable */
#define LDMTR_MCNT (1 << 10)

/* Disable output of HSYNC during VSYNC period */
#define LDMTR_CL1CNT (1 << 9)

/* Disable output of VSYNC during VSYNC period */
#define LDMTR_CL2CNT (1 << 8)

/* Display types supported by the LCDC */
#define LDMTR_STN_MONO_4       0x00
#define LDMTR_STN_MONO_8       0x01
#define LDMTR_STN_COLOR_4      0x08
#define LDMTR_STN_COLOR_8      0x09
#define LDMTR_STN_COLOR_12     0x0A
#define LDMTR_STN_COLOR_16     0x0B
#define LDMTR_DSTN_MONO_8      0x11
#define LDMTR_DSTN_MONO_16     0x13
#define LDMTR_DSTN_COLOR_8     0x19
#define LDMTR_DSTN_COLOR_12    0x1A
#define LDMTR_DSTN_COLOR_16    0x1B
#define LDMTR_TFT_COLOR_16     0x2B

/* framebuffer color layout */
#define LDDFR_1BPP_MONO 0x00
#define LDDFR_2BPP_MONO 0x01
#define LDDFR_4BPP_MONO 0x02
#define LDDFR_6BPP_MONO 0x04
#define LDDFR_4BPP 0x0A
#define LDDFR_8BPP 0x0C
#define LDDFR_16BPP_RGB555 0x1D
#define LDDFR_16BPP_RGB565 0x2D

/* LCDC Pixclock sources */
#define LCDC_CLKSRC_BUSCLOCK 0
#define LCDC_CLKSRC_PERIPHERAL 1
#define LCDC_CLKSRC_EXTERNAL 2

#define LDICKR_CLKSRC(x) \
       (((x) & 3) << 12)

/* LCDC pixclock input divider. Set to 1 at a minimum! */
#define LDICKR_CLKDIV(x) \
       ((x) & 0x1f)

struct sh7760fb_platdata {

/* Set this member to a valid fb_videmode for the display you
	 * wish to use.  The following members must be initialized:
	 * xres, yres, hsync_len, vsync_len, sync,
	 * {left,right,upper,lower}_margin.
	 * The driver uses the above members to calculate register values
	 * and memory requirements. Other members are ignored but may
	 * be used by other framebuffer layer components.
	 */
	struct fb_videomode *def_mode;

/* LDMTR includes display type and signal polarity.  The
	 * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo
	 * data above; however the polarities of the following signals
	 * must be encoded in the ldmtr member:
	 * Display Enable signal (default high-active)  DISPEN_LOWACT
	 * Display Data signals (default high-active)   DPOL_LOWACT
	 * AC Modulation signal (default off)           MCNT
	 * Hsync-During-Vsync suppression (default off) CL1CNT
	 * Vsync-during-vsync suppression (default off) CL2CNT
	 * NOTE: also set a display type!
	 * (one of LDMTR_{STN,DSTN,TFT}_{MONO,COLOR}_{4,8,12,16})
	 */
	u16 ldmtr;

/* LDDFR controls framebuffer image format (depth, organization)
	 * Use ONE of the LDDFR_?BPP_* macros!
	 */
	u16 lddfr;

/* LDPMMR and LDPSPR control the timing of the power signals
	 * for the display. Please read the SH7760 Hardware Manual,
	 * Chapters 30.3.17, 30.3.18 and 30.4.6!
	 */
	u16 ldpmmr;
	u16 ldpspr;

/* LDACLNR contains the line numbers after which the AC modulation
	 * signal is to toggle. Set to ZERO for TFTs or displays which
	 * do not need it. (Chapter 30.3.15 in SH7760 Hardware Manual).
	 */
	u16 ldaclnr;

/* LDICKR contains information on pixelclock source and config.
	 * Please use the LDICKR_CLKSRC() and LDICKR_CLKDIV() macros.
	 * minimal value for CLKDIV() must be 1!.
	 */
	u16 ldickr;

/* set this member to 1 if you wish to use the LCDC's hardware
	 * rotation function.  This is limited to displays <= 320x200
	 * pixels resolution!
	 */
	int rotate;		/* set to 1 to rotate 90 CCW */

/* set this to 1 to suppress vsync irq use. */
	int novsync;

/* blanking hook for platform. Set this if your platform can do
	 * more than the LCDC in terms of blanking (e.g. disable clock
	 * generator / backlight power supply / etc.
	 */
	void (*blank) (int);
};

#endif /* _ASM_SH_SH7760FB_H */

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