/
usr
/
src
/
linux-headers-5.15.0-190
/
arch
/
x86
/
include
/
asm
/
/usr/src/linux-headers-5.15.0-190/arch/x86/include/asm
mkdir
upload
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e820/
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fpu/
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numachip/
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archrandom.h
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arch_hweight.h
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asm-offsets.h
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asm-prototypes.h
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asm.h
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atomic.h
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boot.h
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bootparam_utils.h
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cacheflush.h
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cpu.h
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cpufeatures.h
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gart.h
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genapic.h
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inst.h
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intel-family.h
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intel-mid.h
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intel_ds.h
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intel_pconfig.h
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intel_pt.h
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intel_punit_ipc.h
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intel_scu_ipc.h
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intel_telemetry.h
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invpcid.h
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io.h
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iomap.h
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iommu.h
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iommu_table.h
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iosf_mbi.h
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io_apic.h
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io_bitmap.h
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irq.h
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irqdomain.h
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irqflags.h
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irq_remapping.h
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irq_stack.h
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irq_vectors.h
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irq_work.h
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jailhouse_para.h
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kvm-x86-ops.h
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kvmclock.h
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kvm_host.h
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kvm_para.h
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kvm_types.h
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kvm_vcpu_regs.h
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linkage.h
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livepatch.h
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local.h
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mach_timer.h
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mach_traps.h
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math_emu.h
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mc146818rtc.h
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mce.h
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memtype.h
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mem_encrypt.h
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microcode.h
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microcode_amd.h
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microcode_intel.h
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misc.h
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mmconfig.h
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mmu.h
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mmu_context.h
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mmx.h
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module.h
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mpspec.h
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mpspec_def.h
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mshyperv.h
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msi.h
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msr-index.h
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msr-trace.h
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msr.h
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mtrr.h
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mwait.h
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nmi.h
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nops.h
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nospec-branch.h
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numa.h
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numa_32.h
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olpc.h
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parport.h
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pci-functions.h
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pci.h
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pci_x86.h
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percpu.h
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perf_event.h
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perf_event_p4.h
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pgalloc.h
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pgtable-2level.h
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pgtable.h
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pgtable_areas.h
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pgtable_types.h
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pkeys.h
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pkru.h
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platform_sst_audio.h
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pm-trace.h
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posix_types.h
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preempt.h
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probe_roms.h
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processor-cyrix.h
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processor-flags.h
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processor.h
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prom.h
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pvclock-abi.h
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pvclock.h
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qrwlock.h
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realmode.h
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reboot.h
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reboot_fixups.h
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required-features.h
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resctrl.h
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sections.h
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segment.h
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serial.h
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setup.h
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setup_arch.h
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set_memory.h
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sev-common.h
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sev.h
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sgx.h
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shmparam.h
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sigcontext.h
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sigframe.h
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sighandling.h
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signal.h
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simd.h
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smap.h
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smp.h
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softirq_stack.h
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sparsemem.h
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spec-ctrl.h
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special_insns.h
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spinlock.h
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spinlock_types.h
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sta2x11.h
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stackprotector.h
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stacktrace.h
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static_call.h
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string.h
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string_32.h
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string_64.h
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suspend.h
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suspend_32.h
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svm.h
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swiotlb.h
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switch_to.h
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sync_bitops.h
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sync_core.h
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text-patching.h
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thermal.h
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thread_info.h
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time.h
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timer.h
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timex.h
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tlb.h
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tlbbatch.h
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tlbflush.h
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topology.h
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trace_clock.h
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trapnr.h
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traps.h
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trap_pf.h
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tsc.h
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umip.h
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unistd.h
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unwind.h
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unwind_hints.h
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uprobes.h
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user.h
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user32.h
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user_32.h
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user_64.h
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vdso.h
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vermagic.h
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vgtod.h
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virtext.h
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vm86.h
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vmalloc.h
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vmware.h
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vmx.h
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vmxfeatures.h
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vsyscall.h
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vvar.h
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word-at-a-time.h
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x86_init.h
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xor.h
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xor_32.h
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xor_64.h
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xor_avx.h
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Edit:
/usr/src/linux-headers-5.15.0-190/arch/x86/include/asm/irq_vectors.h
(4296B)
/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_X86_IRQ_VECTORS_H #define _ASM_X86_IRQ_VECTORS_H #include <linux/threads.h> /* * Linux IRQ vector layout. * * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can * be defined by Linux. They are used as a jump table by the CPU when a * given vector is triggered - by a CPU-external, CPU-internal or * software-triggered event. * * Linux sets the kernel code address each entry jumps to early during * bootup, and never changes them. This is the general layout of the * IDT entries: * * Vectors 0 ... 31 : system traps and exceptions - hardcoded events * Vectors 32 ... 127 : device interrupts * Vector 128 : legacy int80 syscall interface * Vectors 129 ... LOCAL_TIMER_VECTOR-1 * Vectors LOCAL_TIMER_VECTOR ... 255 : special interrupts * * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table. * * This file enumerates the exact layout of them: */ /* This is used as an interrupt vector when programming the APIC. */ #define NMI_VECTOR 0x02 /* * IDT vectors usable for external interrupt sources start at 0x20. * (0x80 is the syscall vector, 0x30-0x3f are for ISA) */ #define FIRST_EXTERNAL_VECTOR 0x20 /* * Reserve the lowest usable vector (and hence lowest priority) 0x20 for * triggering cleanup after irq migration. 0x21-0x2f will still be used * for device interrupts. */ #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR #define IA32_SYSCALL_VECTOR 0x80 /* * Vectors 0x30-0x3f are used for ISA interrupts. * round up to the next 16-vector boundary */ #define ISA_IRQ_VECTOR(irq) (((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq) /* * Special IRQ vectors used by the SMP architecture, 0xf0-0xff * * some of the following vectors are 'rare', they are merged * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. * TLB, reschedule and local APIC vectors are performance-critical. */ #define SPURIOUS_APIC_VECTOR 0xff /* * Sanity check */ #if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F) # error SPURIOUS_APIC_VECTOR definition error #endif #define ERROR_APIC_VECTOR 0xfe #define RESCHEDULE_VECTOR 0xfd #define CALL_FUNCTION_VECTOR 0xfc #define CALL_FUNCTION_SINGLE_VECTOR 0xfb #define THERMAL_APIC_VECTOR 0xfa #define THRESHOLD_APIC_VECTOR 0xf9 #define REBOOT_VECTOR 0xf8 /* * Generic system vector for platform specific use */ #define X86_PLATFORM_IPI_VECTOR 0xf7 /* * IRQ work vector: */ #define IRQ_WORK_VECTOR 0xf6 /* 0xf5 - unused, was UV_BAU_MESSAGE */ #define DEFERRED_ERROR_VECTOR 0xf4 /* Vector on which hypervisor callbacks will be delivered */ #define HYPERVISOR_CALLBACK_VECTOR 0xf3 /* Vector for KVM to deliver posted interrupt IPI */ #ifdef CONFIG_HAVE_KVM #define POSTED_INTR_VECTOR 0xf2 #define POSTED_INTR_WAKEUP_VECTOR 0xf1 #define POSTED_INTR_NESTED_VECTOR 0xf0 #endif #define MANAGED_IRQ_SHUTDOWN_VECTOR 0xef #if IS_ENABLED(CONFIG_HYPERV) #define HYPERV_REENLIGHTENMENT_VECTOR 0xee #define HYPERV_STIMER0_VECTOR 0xed #endif #define LOCAL_TIMER_VECTOR 0xec #define NR_VECTORS 256 #ifdef CONFIG_X86_LOCAL_APIC #define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR #else #define FIRST_SYSTEM_VECTOR NR_VECTORS #endif #define NR_EXTERNAL_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) #define NR_SYSTEM_VECTORS (NR_VECTORS - FIRST_SYSTEM_VECTOR) /* * Size the maximum number of interrupts. * * If the irq_desc[] array has a sparse layout, we can size things * generously - it scales up linearly with the maximum number of CPUs, * and the maximum number of IO-APICs, whichever is higher. * * In other cases we size more conservatively, to not create too large * static arrays. */ #define NR_IRQS_LEGACY 16 #define CPU_VECTOR_LIMIT (64 * NR_CPUS) #define IO_APIC_VECTOR_LIMIT (32 * MAX_IO_APICS) #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_PCI_MSI) #define NR_IRQS \ (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \ (NR_VECTORS + CPU_VECTOR_LIMIT) : \ (NR_VECTORS + IO_APIC_VECTOR_LIMIT)) #elif defined(CONFIG_X86_IO_APIC) #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT) #elif defined(CONFIG_PCI_MSI) #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT) #else #define NR_IRQS NR_IRQS_LEGACY #endif #endif /* _ASM_X86_IRQ_VECTORS_H */
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